LMP7716MMX/NOPB [TI]
Single and Dual Precision, 17 MHz, Low Noise, CMOS Input Amplifiers;
| 型号： | LMP7716MMX/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Single and Dual Precision, 17 MHz, Low Noise, CMOS Input Amplifiers |
| 文件： | 总27页 (文件大小：1028K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LMP7715, LMP7716, LMP7716Q
www.ti.com
SNOSAV0E –MARCH 2006–REVISED MARCH 2013
Single and Dual Precision, 17 MHz, Low Noise, CMOS Input Amplifiers
Check for Samples: LMP7715, LMP7716, LMP7716Q
1
FEATURES
DESCRIPTION
The LMP7715/LMP7716/LMP7716Q are single and
23
•
Unless Otherwise Noted,
Typical Values at VS = 5V.
dual low noise, low offset, CMOS input, rail-to-rail
output precision amplifiers with high gain bandwidth
products. The LMP7715/LMP7716/LMP7716Q are
part of the LMP™ precision amplifier family and are
ideal for a variety of instrumentation applications.
–
–
–
–
–
–
Input Offset Voltage ±150 μV (Max)
Input Bias Current 100 fA
Input Voltage Noise 5.8 nV/√Hz
Gain Bandwidth Product 17 MHz
Supply Current (LMP7715) 1.15 mA
Utilizing
a
CMOS
input
stage,
the
LMP7715/LMP7716/LMP7716Q achieve an input bias
current of 100 fA, an input referred voltage noise of
5.8 nV/√Hz, and an input offset voltage of less than
Supply Current (LMP7716/LMP7716Q) 1.30
mA
±150
μV.
These
features
make
the
LMP7715/LMP7716/LMP7716Q superior choices for
precision applications.
–
–
–
Supply Voltage Range 1.8V to 5.5V
THD+N @ f = 1 kHz 0.001%
Consuming only 1.15 mA of supply current, the
LMP7715 offers a high gain bandwidth product of 17
MHz, enabling accurate amplification at high closed
loop gains.
Operating Temperature Range −40°C to
125°C
–
–
–
Rail-to-rail Output Swing
Space Saving SOT-23 Package (LMP7715)
The LMP7715/LMP7716/LMP7716Q have a supply
voltage range of 1.8V to 5.5V, which makes these
ideal choices for portable low power applications with
low supply voltage requirements.
8-Pin VSSOP Package
(LMP7716/LMP7716Q)
–
LMP7716Q is AEC-Q100 Grade 1 Qualified
and is Manufactured on an Automotive
Grade Flow
The LMP7715/LMP7716/LMP7716Q are built with
TI’s advanced VIP50 process technology. The
LMP7715 is offered in a 5-pin SOT-23 package and
the LMP7716/LMP7716Q is offered in an 8-pin
VSSOP.
APPLICATIONS
•
•
•
•
Active Filters and Buffers
Sensor Interface Applications
Transimpedance Amplifiers
Automotive
The
LMP7716Q
incorporates
enhanced
manufacturing and support processes for the
automotive market, including defect detection
methodologies. Reliability qualification is compliant
with the requirements and temperature grades
defined in the AEC-Q100 standard.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
LMP is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2013, Texas Instruments Incorporated
LMP7715, LMP7716, LMP7716Q
SNOSAV0E –MARCH 2006–REVISED MARCH 2013
www.ti.com
Typical Performance
25
100
V
V
= 5V
S
V
= 5.5V
S
= V /2
CM
S
20 UNITS TESTED: 10,000
V
= 2.5V
S
15
10
5
10
0
-200
1
1k
FREQUENCY (Hz)
1
10
100
10k
100k
-100
0
100
200
OFFSET VOLTAGE (mV)
Figure 1. Offset Voltage Distribution
Figure 2. Input Referred Voltage Noise
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
Human Body Model
Machine Model
2000V
200V
ESD Tolerance(3)
Charge-Device Model
1000V
VIN Differential
±0.3V
Supply Voltage (VS = V+ – V−)
Voltage on Input/Output Pins
Storage Temperature Range
Junction Temperature(4)
6.0V
V+ +0.3V, V− −0.3V
−65°C to 150°C
+150°C
Infrared or Convection (20 sec)
235°C
Soldering Information
Wave Soldering Lead Temp. (10 sec)
260°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics Tables.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of
JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
(4) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC Board.
Operating Ratings(1)
Temperature Range(2)
−40°C to 125°C
1.8V to 5.5V
2.0V to 5.5V
180°C/W
0°C ≤ TA ≤ 125°C
−40°C ≤ TA ≤ 125°C
5-Pin SOT-23
Supply Voltage (VS = V+ – V−)
(2)
Package Thermal Resistance (θJA
)
8-Pin VSSOP
236°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the Electrical Characteristics Tables.
(2) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC Board.
2
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LMP7715, LMP7716, LMP7716Q
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SNOSAV0E –MARCH 2006–REVISED MARCH 2013
2.5V Electrical Characteristics
Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 2.5V, V− = 0V ,VO = VCM = V+/2. Boldface limits apply at
the temperature extremes.
Symbol
Parameter
Conditions
−20°C ≤ TA ≤ 85°C
Min(1)
Typ(2)
Max(1)
Units
VOS
±20
±180
±330
Input Offset Voltage
μV
±20
±180
±430
−40°C ≤ TA ≤ 125°C
TC VOS Input Offset Voltage Temperature
Drift(3)(4)
LMP7715
-1
±4
μV/°C
LMP7716/LMP7716Q
-1.75
0.05
IB
−40°C ≤ TA ≤ 85°C
1
25
Input Bias Current
VCM = 1.0V(4)(5)
pA
−40°C ≤ TA ≤ 125°C
0.05
0.006
100
100
98
1
100
IOS
0.5
50
Input Offset Current
VCM = 1V(4)
pA
dB
83
80
CMRR Common Mode Rejection Ratio
0V ≤ VCM ≤ 1.4V
PSRR
2.0V ≤ V+ ≤ 5.5V
85
80
V− = 0V, VCM = 0
Power Supply Rejection Ratio
dB
V
1.8V ≤ V+ ≤ 5.5V
85
V− = 0V, VCM = 0
CMVR
CMRR ≥ 80 dB
CMRR ≥ 78 dB
−0.3
–0.3
1.5
1.5
Common Mode Voltage Range
AVOL
LMP7715, VO = 0.15 to 2.2V
88
82
98
92
RL = 2 kΩ to V+/2
LMP7716/LMP7716Q, VO = 0.15 to 2.2V
84
80
RL = 2 kΩ to V+/2
Open Loop Voltage Gain
dB
LMP7715, VO = 0.15 to 2.2V
92
88
110
95
RL = 10 kΩ to V+/2
LMP7716/ LMP7716Q, VO = 0.15 to 2.2V
90
86
RL = 10 kΩ to V+/2
VOUT
25
70
77
RL = 2 kΩ to V+/2
RL = 10 kΩ to V+/2
RL = 2 kΩ to V+/2
Output Voltage Swing
High
20
60
66
mV from
either rail
30
70
73
Output Voltage Swing
Low
15
60
62
RL = 10 kΩ to V+/2
IOUT
Sourcing to V−
VIN = 200 mV
36
30
52
(6)
Output Current
mA
Sinking to V+
7.5
5.0
15
VIN = −200 mV(6)
IS
0.95
1.10
1.30
1.65
LMP7715
Supply Current
mA
1.50
1.85
LMP7716/LMP7716Q (per channel)
SR
AV = +1, Rising (10% to 90%)
AV = +1, Falling (90% to 10%)
8.3
Slew Rate
V/μs
10.3
(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using the
Statistical Quality Control (SQC) method.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped
production material.
(3) Offset voltage average drift is determined by dividing the change in VOS at the temperature extremes by the total temperature change.
(4) This parameter is specified by design and/or characterization and is not tested in production.
(5) Positive current corresponds to current flowing into the device.
(6) The short circuit test is a momentary open loop test.
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2.5V Electrical Characteristics (continued)
Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 2.5V, V− = 0V ,VO = VCM = V+/2. Boldface limits apply at
the temperature extremes.
Symbol
GBW
en
Parameter
Gain Bandwidth
Conditions
Min(1)
Typ(2)
14
Max(1)
Units
MHz
f = 400 Hz
f = 1 kHz
f = 1 kHz
6.8
Input Referred Voltage Noise Density
Input Referred Current Noise Density
nV/
5.8
in
0.01
pA/√Hz
THD+N
f = 1 kHz, AV = 1, RL = 100 kΩ
VO = 0.9 VPP
0.003
0.004
Total Harmonic Distortion + Noise
%
f = 1 kHz, AV = 1, RL = 600Ω
VO = 0.9 VPP
5V Electrical Characteristics
Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 5V, V− = 0V, VCM = V+/2. Boldface limits apply at the
temperature extremes.
Symbol
Parameter
Input Offset Voltage
Conditions
−20°C ≤ TA ≤ 85°C
Min(1)
Typ(2)
Max(1)
Units
VOS
±10
±150
±300
μV
−40°C ≤ TA ≤ 125°C
±10
±150
±400
TC VOS Input Offset Voltage Temperature
Drift(3)(4)
LMP7715
-1
±4
μV/°C
LMP7716/LMP7716Q
-1.75
0.1
IB
1
25
−40°C ≤ TA ≤ 85°C
−40°C ≤ TA ≤ 125°C
Input Bias Current
VCM = 2.0V(4)(5)
pA
0.1
0.01
100
100
98
1
100
IOS
0.5
50
Input Offset Current
VCM = 2.0V(4)
pA
dB
CMRR
85
82
Common Mode Rejection Ratio
0V ≤ VCM ≤ 3.7V
PSRR
2.0V ≤ V+ ≤ 5.5V
85
80
V− = 0V, VCM = 0
Power Supply Rejection Ratio
dB
V
1.8V ≤ V+ ≤ 5.5V
85
V− = 0V, VCM = 0
CMVR
CMRR ≥ 80 dB
CMRR ≥ 78 dB
−0.3
–0.3
4
4
Common Mode Voltage Range
AVOL
LMP7715, VO = 0.3 to 4.7V
88
82
107
90
RL = 2 kΩ to V+/2
LMP7716/LMP7716Q, VO = 0.3 to 4.7V
84
80
RL = 2 kΩ to V+/2
Open Loop Voltage Gain
dB
LMP7715, VO = 0.3 to 4.7V
92
88
110
95
RL = 10 kΩ to V+/2
LMP7716/LMP7716Q, VO = 0.3 to 4.7V
90
86
RL = 10 kΩ to V+/2
(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using the
Statistical Quality Control (SQC) method.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped
production material.
(3) Offset voltage average drift is determined by dividing the change in VOS at the temperature extremes by the total temperature change.
(4) This parameter is specified by design and/or characterization and is not tested in production.
(5) Positive current corresponds to current flowing into the device.
4
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Product Folder Links: LMP7715 LMP7716 LMP7716Q
LMP7715, LMP7716, LMP7716Q
www.ti.com
SNOSAV0E –MARCH 2006–REVISED MARCH 2013
5V Electrical Characteristics (continued)
Unless otherwise specified, all limits are ensured for TA = 25°C, V+ = 5V, V− = 0V, VCM = V+/2. Boldface limits apply at the
temperature extremes.
Symbol
Parameter
Conditions
RL = 2 kΩ to V+/2
Min(1)
Typ(2)
Max(1)
Units
VOUT
32
70
77
Output Voltage Swing
High
22
42
60
66
RL = 10 kΩ to V+/2
mV from
either rail
RL = 2 kΩ to V+/2
70
(LMP7715)
73
Output Voltage Swing
Low
RL = 2 kΩ to V+/2
(LMP7716/LMP7716Q)
45
75
78
20
60
62
RL = 10 kΩ to V+/2
IOUT
Sourcing to V−
VIN = 200 mV(6)
46
38
66
Output Current
Supply Current
mA
mA
Sinking to V+
10.5
6.5
23
VIN = −200 mV(6)
IS
1.15
1.30
1.40
1.75
LMP7715
1.70
2.05
LMP7716/LMP7716Q (per channel)
SR
AV = +1, Rising (10% to 90%)
AV = +1, Falling (90% to 10%)
6.0
7.5
9.5
11.5
17
Slew Rate
V/μs
MHz
GBW
en
Gain Bandwidth
f = 400 Hz
f = 1 kHz
f = 1 kHz
7.0
Input Referred Voltage Noise Density
Input Referred Current Noise Density
nV/√Hz
pA/√Hz
5.8
in
0.01
0.001
THD+N
f = 1 kHz, AV = 1, RL = 100 kΩ
VO = 4 VPP
Total Harmonic Distortion + Noise
%
f = 1 kHz, AV = 1, RL = 600Ω
0.004
VO = 4 VPP
(6) The short circuit test is a momentary open loop test.
Connection Diagram
5-Pin SOT-23
8-Pin VSSOP
1
5
+
1
2
3
4
8
7
6
5
+
V
OUTPUT
OUT A
-IN A
V
-
OUT B
-IN B
+
2
3
-
V
+IN A
-
+
-
+
-
4
+IN B
V
-IN
+IN
Figure 3. Top View
Figure 4. Top View
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Typical Performance Characteristics
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.
Offset Voltage Distribution
= 2.5V
TCVOS Distribution (LMP7715)
25
20
25
20
V
V
S
-40°C Ç T Ç 125èC
A
= V /2
CM
S
V
V
= 2.5V, 5V
S
UNITS TESTED:10,000
= V /2
CM
S
UNITS TESTED:
10,000
15
10
5
15
10
5
0
-200
0
-100
0
100
200
-4
-3
-2
TCV
-1
0
1
2
(mV/°C)
OS
OFFSET VOLTAGE (mV)
Figure 5.
Figure 6.
Offset Voltage Distribution
TCVOS Distribution (LMP7716/LMP7716Q)
25
25
-40°C Ç T Ç 125°C
A
V
V
= 5V
S
V
= 2.5V, 5V
S
= V /2
CM
S
20
20 UNITS TESTED: 10,000
V
= V /2
CM
S
UNITS TESTED:
10,000
15
10
5
15
10
5
0
0
-4
-3
-2
(mV/°C)
-1
0
-200
-100
0
100
200
TCV
OS
OFFSET VOLTAGE (mV)
Figure 7.
Figure 8.
Offset Voltage vs. VCM
Offset Voltage vs. VCM
200
150
100
50
200
150
100
50
V
S
= 1.8V
V = 2.5V
S
-40°C
-40°C
25°C
25°C
0
0
125°C
-50
-50
125°C
-100
-150
-200
-100
-150
-200
-0.3
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1
(V)
-0.3
0
0.3
0.9
1.2
1.5
0.6
(V)
V
V
CM
CM
Figure 9.
Figure 10.
6
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SNOSAV0E –MARCH 2006–REVISED MARCH 2013
Typical Performance Characteristics (continued)
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.
Offset Voltage vs. VCM
Offset Voltage vs. Supply Voltage
200
200
150
100
50
V
S
= 5V
150
100
-40°C
25°C
-40°C
25°C
50
0
0
125°C
125°C
-50
-50
-100
-100
-150
-200
-150
-200
-0.3
0.7
1.7
2.7
(V)
3.7
4.7
1.5
2.5
3.5
V
4.5
5.5
6
(V)
V
S
CM
Figure 11.
Figure 12.
CMRR vs. Frequency
Offset Voltage vs. Temperature
150
100
120
100
V
S
= 2.5V
50
0
V
= 2.5V
S
80
60
V
= 5V
S
LMP7711
-50
40
20
-100
-150
V
= 5V
S
LMP7712
-200
0
10
10k
100
1k
100k
1M
-40 -20
0
20 40 60 80 100 120 125
FREQUENCY (Hz)
TEMPERATURE (°C)
Figure 13.
Figure 14.
Input Bias Current vs. VCM
Input Bias Current vs. VCM
= 5V
1000
500
50
40
30
V
S
= 5V
V
S
25°C
0
20
10
125°C
-500
-1000
-1500
-2000
-2500
-3000
-40°C
0
-10
-20
85°C
-30
-40
-50
0
1
2
3
4
0
1
2
3
4
V
(V)
V
CM
(V)
CM
Figure 15.
Figure 16.
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Typical Performance Characteristics (continued)
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.
Supply Current vs. Supply Voltage (LMP7715)
2
Supply Current vs. Supply Voltage (LMP7716/LMP7716Q)
2
125°C
1.6
1.6
125°C
25°C
25°C
1.2
1.2
-40°C
0.8
0.8
-40°C
0.4
0
0.4
0
1.5
2.5
3.5
(V)
4.5
5.5
1.5
2.5
3.5
(V)
4.5
5.5
V
V
S
S
Figure 17.
Figure 18.
Crosstalk Rejection Ratio (LMP7716/LMP7716Q)
Sourcing Current vs. Supply Voltage
160
80
70
125°C
140
120
100
80
60
40
20
0
60
50
-40°C
25°C
40
30
20
10
0
1M
1k
10k
100k
10M
100M
1.5
2.5
3.5
4.5
5.5
FREQUENCY (Hz)
V
(V)
S
Figure 19.
Figure 20.
Sinking Current vs. Supply Voltage
Sourcing Current vs. Output Voltage
35
30
25
20
15
70
60
125°C
125°C
50
40
30
20
25°C
-40°C
25°C
10
5
-40°C
10
0
0
1.5
2.5
3.5
(V)
4.5
5.5
0
1
2
3
4
5
V
(V)
V
OUT
S
Figure 21.
Figure 22.
8
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SNOSAV0E –MARCH 2006–REVISED MARCH 2013
Typical Performance Characteristics (continued)
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.
Sinking Current vs. Output Voltage
Output Swing High vs. Supply Voltage
30
50
40
30
R
L
= 10 kW
125°C
25
20
25°C
125°C
25°C
15
20
10
0
10
-40°C
-40°C
5
0
0
1
2
3
4
5
1.5
2.5
3.5
(V)
4.5
5.5
V
S
V
(V)
OUT
Figure 23.
Figure 24.
Output Swing Low vs. Supply Voltage
Output Swing High vs. Supply Voltage
50
40
30
50
40
30
R
L
=10 kW
R = 2 kW
L
125°C
25°C
-40°C
20
10
0
20
10
0
-40°C
125°C
25°C
1.5
2.5
3.5
(V)
4.5
5.5
1.5
2.5
3.5
(V)
4.5
5.5
V
V
S
S
Figure 25.
Figure 26.
Output Swing Low vs. Supply Voltage
Output Swing High vs. Supply Voltage
50
40
30
150
120
90
R
= 600W
L
-40°C
125°C
125°C
25°C
25°C
20
10
0
60
30
0
-40°C
R
= 2 kW
L
1.5
2.5
3.5
(V)
4.5
5.5
1.5
2.5
3.5
(V)
4.5
5.5
V
V
S
S
Figure 27.
Figure 28.
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Typical Performance Characteristics (continued)
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.
Output Swing Low vs. Supply Voltage
Open Loop Frequency Response
120
120
100
80
150
PHASE
R
L
= 600W
100
C
L
= 20 pF
120
90
80
60
25°C
C
L
= 50 pF
60
125°C
GAIN
C
L
= 100 pF
40
20
0
40
20
0
-40°C
60
30
0
C
C
= 20 pF
= 50 pF
L
-20
-40
-20
-40
-60
L
C
= 100 pF
L
-60
1k
10k
100k
1M
10M
100M
1.5
2.5
3.5
(V)
4.5
5.5
V
FREQUENCY (Hz)
S
Figure 29.
Figure 30.
Open Loop Frequency Response
120
Phase Margin vs. Capacitive Load
50
40
120
100
80
PHASE
100
80
60
R
= 600W
L
60
30
20
40
20
0
R = 10 kW
L
40
20
0
GAIN
R
L
= 10 MW
-20
-40
-60
-20
-40
10
0
V
= 2.5V
S
R
= 600W, 10 kW, 10 MW
L
-60
10k
100k
1M
10M
100M
10
100
1000
CAPACITIVE LOAD (pF)
FREQUENCY (Hz)
Figure 31.
Figure 32.
Phase Margin vs. Capacitive Load
Overshoot and Undershoot vs. Capacitive Load
50
70
UNDERSHOOT%
60
R
= 600W
L
40
30
50
R
L
= 10 kW
OVERSHOOT %
40
30
20
20
10
0
R
L
= 10 MW
10
0
V
= 5V
S
0
20
40
80
100 120
60
10
100
1000
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
Figure 33.
Figure 34.
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Typical Performance Characteristics (continued)
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.
Slew Rate vs. Supply Voltage
Small Signal Step Response
12
FALLING EDGE
11
10
9
RISING EDGE
V
= 20 mV
PP
IN
8
f = 1 MHz, A = +1
V
V
= 2.5V, C = 10 pF
L
S
7
1.5
200 ns/DIV
2.5
3.5
4.5
5.5
6
V
(V)
S
Figure 35.
Figure 36.
Large Signal Step Response
Small Signal Step Response
V
= 20 mV
PP
V
= 1 V
PP
IN
IN
f = 1 MHz, A = +1
f = 200 kHz, A = +1
V
V
V
= 5V, C = 10 pF
L
V
= 2.5V, C = 10 pF
L
S
S
800 ns/DIV
200 ns/DIV
Figure 37.
Figure 38.
Large Signal Step Response
THD+N vs. Output Voltage
0
V
= 1.8V
S
f = 1 kHz
-20
-40
A
= +2
V
-60
-80
R
= 600W
L
V
= 1 V
PP
IN
f = 200 kHz, A = +1
-100
V
V
= 5V, C = 10 pF
L
S
R
L
= 100 kW
-120
800 ns/DIV
0.01
0.1
1
10
OUTPUT AMPLITUDE (V
)
PP
Figure 39.
Figure 40.
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Typical Performance Characteristics (continued)
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.
THD+N vs. Output Voltage
THD+N vs. Frequency
= 1.8V
0
0.006
0.005
0.004
0.003
0.002
0.001
0
V
V
A
S
O
V
V
= 5.5V
f = 1 kHz
S
= 0.9 V
PP
-20
-40
R
= 600W
L
= +2
A
= +2
V
-60
-80
R
L
= 100 kW
R
L
= 600W
-100
-120
-140
R
= 100 kW
L
10
100
1k
10k
100k
0.01
0.1
1
10
FREQUENCY (Hz)
OUTPUT AMPLITUDE (V
)
PP
Figure 41.
Figure 42.
THD+N vs. Frequency
= 5V
PSRR vs. Frequency
120
100
0.006
V
V
A
S
O
V
V
= 5.5V, -PSRR
S
= 4 V
V
= 1.8V, -PSRR
PP
S
0.005
0.004
0.003
0.002
0.001
0
= +2
80
60
40
20
R
= 600W
L
V
= 5.5V, +PSRR
S
V
= 1.8V, +PSRR
S
R
= 100 kW
L
0
10
100
1k
10k
100k
10k
1M
10
1k
100k
10M
100
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 43.
Figure 44.
Input Referred Voltage Noise vs. Frequency
Time Domain Voltage Noise
100
V
V
= ±2.5V
S
V
= 5.5V
S
= 0.0V
CM
V
= 2.5V
S
10
1
1 s/DIV
1k
1
10
100
10k
100k
FREQUENCY (Hz)
Figure 45.
Figure 46.
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Typical Performance Characteristics (continued)
Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.
Closed Loop Frequency Response
Closed Loop Output Impedance vs. Frequency
100
5
4
3
2
225
180
135
V
= 5V
S
R
C
= 2 kW
= 20 pF
L
L
10
1
V
A
= 2 V
= +1
O
V
PP
90
1
0
45
0
-45
-90
-135
-1
-2
-3
-4
-5
PHASE
GAIN
0.1
-180
0.01
-225
100M
10 100 1k 10k 100k 1M 10M
100 k
1M
100
1k
10k
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 47.
Figure 48.
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APPLICATION INFORMATION
LMP7715/LMP7716/LMP7716Q
The LMP7715/LMP7716/LMP7716Q are single and dual, low noise, low offset, rail-to-rail output precision
amplifiers with a wide gain bandwidth product of 17 MHz and low supply current. The wide bandwidth makes the
LMP7715/LMP7716/LMP7716Q ideal choices for wide-band amplification in portable applications.
The LMP7715/LMP7716/LMP7716Q are superior for sensor applications. The very low input referred voltage
noise of only 5.8 nV/√Hz at 1 kHz and very low input referred current noise of only 10 fA/√Hz mean more signal
fidelity and higher signal-to-noise ratio.
The LMP7715/LMP7716/LMP7716Q have a supply voltage range of 1.8V to 5.5V over a wide temperature range
of 0°C to 125°C. This is optimal for low voltage commercial applications. For applications where the ambient
temperature might be less than 0°C, the LMP7715/LMP7716/LMP7716Q are fully operational at supply voltages
of 2.0V to 5.5V over the temperature range of −40°C to 125°C.
The outputs of the LMP7715/LMP7716/LMP7716Q swing within 25 mV of either rail providing maximum dynamic
range in applications requiring low supply voltage. The input common mode range of the
LMP7715/LMP7716/LMP7716Q extends to 300 mV below ground. This feature enables users to utilize this
device in single supply applications.
The use of a very innovative feedback topology has enhanced the current drive capability of the
LMP7715/LMP7716/LMP7716Q, resulting in sourcing currents of as much as 47 mA with a supply voltage of only
1.8V.
The LMP7715 is offered in the space saving SOT-23 package and the LMP7716/LMP7716Q is offered in an 8-
pin VSSOP. These small packages are ideal solutions for applications requiring minimum PC board footprint.
CAPACITIVE LOAD
The unity gain follower is the most sensitive configuration to capacitive loading. The combination of a capacitive
load placed directly on the output of an amplifier along with the output impedance of the amplifier creates a
phase lag which in turn reduces the phase margin of the amplifier. If phase margin is significantly reduced, the
response will be either underdamped or the amplifier will oscillate.
The LMP7715/LMP7716/LMP7716Q can directly drive capacitive loads of up to 120 pF without oscillating. To
drive heavier capacitive loads, an isolation resistor, RISO as shown in Figure 49, should be used. This resistor
and CL form a pole and hence delay the phase lag or increase the phase margin of the overall system. The
larger the value of RISO, the more stable the output voltage will be. However, larger values of RISO result in
reduced output swing and reduced output current drive.
Figure 49. Isolating Capacitive Load
INPUT CAPACITANCE
CMOS input stages inherently have low input bias current and higher input referred voltage noise. The
LMP7715/LMP7716/LMP7716Q enhance this performance by having the low input bias current of only 50 fA, as
well as, a very low input referred voltage noise of 5.8 nV/√Hz. In order to achieve this a larger input stage has
been used. This larger input stage increases the input capacitance of the LMP7715/LMP7716/LMP7716Q.
Figure 50 shows typical input common mode capacitance of the LMP7715/LMP7716/LMP7716Q.
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25
20
V
S
= 5V
15
10
5
0
0
1
2
3
4
V
CM
(V)
Figure 50. Input Common Mode Capacitance
This input capacitance will interact with other impedances, such as gain and feedback resistors which are seen
on the inputs of the amplifier, to form a pole. This pole will have little or no effect on the output of the amplifier at
low frequencies and under DC conditions, but will play a bigger role as the frequency increases. At higher
frequencies, the presence of this pole will decrease phase margin and also cause gain peaking. In order to
compensate for the input capacitance, care must be taken in choosing feedback resistors. In addition to being
selective in picking values for the feedback resistor, a capacitor can be added to the feedback path to increase
stability.
The DC gain of the circuit shown in Figure 51 is simply −R2/R1.
C
F
R
2
R
1
-
+
C
IN
V
+
-
IN
+
V
OUT
-
R2
R1
VOUT
VIN
-
AV
=
-
=
Figure 51. Compensating for Input Capacitance
For the time being, ignore CF. The AC gain of the circuit in Figure 51 can be calculated as follows:
VOUT
-R2/R1
(s) =
VIN
s2
s
«
«
∆
1 +
+
A0 R1
A0
∆
≈
≈
∆
«
≈
≈
∆
«
CIN R2
R1 + R2
(1)
(2)
This equation is rearranged to find the location of the two poles:
2
«
∆
4 A0CIN
R2
≈
1
1
-1
1
1
-
≈
P1,2
=
+
ê
+
∆
«
R1
R2
R
R2
2CIN
1
As shown in Equation 2, as the values of R1 and R2 are increased, the magnitude of the poles are reduced,
which in turn decreases the bandwidth of the amplifier. Figure 52 shows the frequency response with different
value resistors for R1 and R2. Whenever possible, it is best to chose smaller feedback resistors.
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15
10
5
A
= -1
V
0
-5
R
1,
R
= 30 kW
2
-10
-15
-20
-25
R
R
= 10 kW
2
1,
R
1,
R
= 1 kW
2
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 52. Closed Loop Frequency Response
As mentioned before, adding a capacitor to the feedback path will decrease the peaking. This is because CF will
form yet another pole in the system and will prevent pairs of poles, or complex conjugates from forming. It is the
presence of pairs of poles that cause the peaking of gain. Figure 53 shows the frequency response of the
schematic presented in Figure 51 with different values of CF. As can be seen, using a small value capacitor
significantly reduces or eliminates the peaking.
20
R , R = 30 kW
1
2
C
F
= 0 pF
A
= -1
V
10
0
C
= 5 pF
F
-10
-20
-30
-40
C
F
= 2 pF
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 53. Closed Loop Frequency Response
TRANSIMPEDANCE AMPLIFIER
In many applications the signal of interest is a very small amount of current that needs to be detected. Current
that is transmitted through a photodiode is a good example. Barcode scanners, light meters, fiber optic receivers,
and industrial sensors are some typical applications utilizing photodiodes for current detection. This current
needs to be amplified before it can be further processed. This amplification is performed using a current-to-
voltage converter configuration or transimpedance amplifier. The signal of interest is fed to the inverting input of
an op amp with a feedback resistor in the current path. The voltage at the output of this amplifier will be equal to
the negative of the input current times the value of the feedback resistor. Figure 54 shows a transimpedance
amplifier configuration. CD represents the photodiode parasitic capacitance and CCM denotes the common-mode
capacitance of the amplifier. The presence of all of these capacitances at higher frequencies might lead to less
stable topologies at higher frequencies. Care must be taken when designing a transimpedance amplifier to
prevent the circuit from oscillating.
With a wide gain bandwidth product, low input bias current and low input voltage and current noise, the
LMP7715/LMP7716/LMP7716Q are ideal for wideband transimpedance applications.
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C
F
R
F
I
IN
C
-
CM
+
-
+
V
OUT
C
D
V
B
CIN = CD + CCM
VOUT
- R
=
F
IIN
Figure 54. Transimpedance Amplifier
A feedback capacitance CF is usually added in parallel with RF to maintain circuit stability and to control the
frequency response. To achieve a maximally flat, 2nd order response, RF and CF should be chosen by using
Equation 3
CIN
CF =
GBWP * 2 p RF
(3)
Calculating CF from Equation 3 can sometimes result in capacitor values which are less than 2 pF. This is
especially the case for high speed applications. In these instances, it is often more practical to use the circuit
shown in Figure 55 in order to allow more sensible choices for CF. The new feedback capacitor, CF′, is (1+
RB/RA) CF. This relationship holds as long as RA << RF.
R
A
R
B
C
F
R
F
-
+
IF RA < < RF
«
∆
≈
RB
≈
1 +
C Å =
F
CF
∆
RA
«
Figure 55. Modified Transimpedance Amplifier
SENSOR INTERFACE
The LMP7715/LMP7716/LMP7716Q have low input bias current and low input referred noise, which make them
ideal choices for sensor interfaces such as thermopiles, Infra Red (IR) thermometry, thermocouple amplifiers,
and pH electrode buffers.
Thermopiles generate voltage in response to receiving radiation. These voltages are often only a few microvolts.
As a result, the operational amplifier used for this application needs to have low offset voltage, low input voltage
noise, and low input bias current. Figure 56 shows a thermopile application where the sensor detects radiation
from a distance and generates a voltage that is proportional to the intensity of the radiation. The two resistors, RA
and RB, are selected to provide high gain to amplify this signal, while CF removes the high frequency noise.
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THERMOPILE
+
-
+
V
-
+
= KI
IN
R
B
V
OUT
-
IR RADIATION
INTENSITY, I
R
A
C
F
V
R
A
OUT
I =
K(R
R )
B
A +
Figure 56. Thermopile Sensor Interface
PRECISION RECTIFIER
Rectifiers are electrical circuits used for converting AC signals to DC signals. Figure 57 shows a full-wave
precision rectifier. Each operational amplifier used in this circuit has a diode on its output. This means for the
diodes to conduct, the output of the amplifier needs to be positive with respect to ground. If VIN is in its positive
half cycle then only the output of the bottom amplifier will be positive. As a result, the diode on the output of the
bottom amplifier will conduct and the signal will show at the output of the circuit. If VIN is in its negative half cycle
then the output of the top amplifier will be positive, resulting in the diode on the output of the top amplifier
conducting and delivering the signal from the amplifier's output to the circuit's output.
For R2/ R1 ≥ 2, the resistor values can be found by using the equation shown in Figure 57. If R2/ R1 = 1, then R3
should be left open, no resistor needed, and R4 should simply be shorted.
R
2
V
IN
R
1
+
V
V
OUT
-
-
-
V
R
R
3
4
R
R
R
R
2
1
4
3
= 1 +
+
V
-
10 kW
V
Figure 57. Precision Rectifier
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SNOSAV0E –MARCH 2006–REVISED MARCH 2013
REVISION HISTORY
Changes from Revision D (March 2013) to Revision E
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 18
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PACKAGE OPTION ADDENDUM
www.ti.com
25-Feb-2015
PACKAGING INFORMATION
Orderable Device
LMP7715MF/NOPB
LMP7715MFE/NOPB
LMP7715MFX/NOPB
LMP7716MM/NOPB
LMP7716MME/NOPB
LMP7716MMX/NOPB
LMP7716QMM/NOPB
LMP7716QMME/NOPB
LMP7716QMMX/NOPB
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
ACTIVE
SOT-23
SOT-23
SOT-23
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
DBV
5
5
5
8
8
8
8
8
8
1000
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
AV3A
AV3A
AV3A
AX3A
AX3A
AX3A
AR5A
AR5A
AR5A
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DBV
DBV
DGK
DGK
DGK
DGK
DGK
DGK
250
3000
1000
250
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
3500
1000
250
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
3500
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Feb-2015
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LMP7716, LMP7716-Q1 :
Catalog: LMP7716
•
Automotive: LMP7716-Q1
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
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Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Dec-2014
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LMP7715MF/NOPB
LMP7715MFE/NOPB
LMP7715MFX/NOPB
LMP7716MM/NOPB
LMP7716MME/NOPB
LMP7716MMX/NOPB
LMP7716QMM/NOPB
SOT-23
SOT-23
SOT-23
VSSOP
VSSOP
VSSOP
VSSOP
DBV
DBV
DBV
DGK
DGK
DGK
DGK
DGK
DGK
5
5
5
8
8
8
8
8
8
1000
250
178.0
178.0
178.0
178.0
178.0
330.0
178.0
178.0
330.0
8.4
8.4
3.2
3.2
3.2
5.3
5.3
5.3
5.3
5.3
5.3
3.2
3.2
3.2
3.4
3.4
3.4
3.4
3.4
3.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q1
Q1
Q1
Q1
Q1
Q1
3000
1000
250
8.4
8.0
12.4
12.4
12.4
12.4
12.4
12.4
12.0
12.0
12.0
12.0
12.0
12.0
3500
1000
250
LMP7716QMME/NOPB VSSOP
LMP7716QMMX/NOPB VSSOP
3500
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Dec-2014
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LMP7715MF/NOPB
LMP7715MFE/NOPB
LMP7715MFX/NOPB
LMP7716MM/NOPB
LMP7716MME/NOPB
LMP7716MMX/NOPB
LMP7716QMM/NOPB
LMP7716QMME/NOPB
LMP7716QMMX/NOPB
SOT-23
SOT-23
SOT-23
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
DBV
DBV
DBV
DGK
DGK
DGK
DGK
DGK
DGK
5
5
5
8
8
8
8
8
8
1000
250
210.0
210.0
210.0
210.0
210.0
367.0
210.0
210.0
367.0
185.0
185.0
185.0
185.0
185.0
367.0
185.0
185.0
367.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
3000
1000
250
3500
1000
250
3500
Pack Materials-Page 2
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