LMV339M/NOPB [TI]
四路通用、低电压、Tiny Pack 比较器 | D | 14 | -40 to 85;
| 型号： | LMV339M/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 四路通用、低电压、Tiny Pack 比较器 | D | 14 | -40 to 85 放大器 信息通信管理 光电二极管 放大器电路 比较器 |
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| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LMV331-N, LMV339-N, LMV393-N
www.ti.com
SNOS018G –AUGUST 1999–REVISED FEBRUARY 2013
LMV331-N Single / LMV393-N Dual / LMV339-N Quad General Purpose, Low Voltage, Tiny
Pack Comparators
Check for Samples: LMV331-N, LMV339-N, LMV393-N
1
FEATURES
DESCRIPTION
The LMV393-N and LMV339-N are low voltage (2.7-
5V) versions of the dual and quad comparators,
LM393/339, which are specified at 5-30V. The
LMV331-N is the single version, which is available in
space saving 5-pin SC70 and 5-pin SOT23 packages.
The 5-pin SC70 is approximately half the size of the
5-pin SOT23.
2
•
(For 5V Supply, Typical Unless Otherwise
Noted)
•
•
•
•
Guaranteed 2.7V and 5V Performance
Industrial Temperature Range −40°C to +85°C
Low Supply Current 60 µA/Channel
Input Common Mode Voltage Range Includes
Ground
The LMV393-N is available in 8-pin SOIC and
VSSOP. The LMV339-N is available in 14-pin SOIC
and TSSOP.
•
•
•
Low Output Saturation Voltage 200 mV
Propagation Delay 200 ns
The LMV331-N/393-N/339-N is the most cost-
effective solution where space, low voltage, low
power and price are the primary specification in
circuit design for portable consumer products. They
offer specifications that meet or exceed the familiar
LM393/339 at a fraction of the supply current.
Space Saving 5-pin SC70 and 5-Pin SOT23
Packages
APPLICATIONS
•
•
•
•
•
Mobile Communications
The chips are built with TI's advanced Submicron
Silicon-Gate BiCMOS process. The LMV331-N/393-
N/339-N have bipolar input and output stages for
improved noise performance.
Notebooks and PDA's
Battery Powered Electronics
General Purpose Portable Device
General Purpose Low Voltage Applications
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2013, Texas Instruments Incorporated
LMV331-N, LMV339-N, LMV393-N
SNOS018G –AUGUST 1999–REVISED FEBRUARY 2013
www.ti.com
Typical Applications
Figure 1. Squarewave Oscillator
Figure 2. Positive Peak Detector
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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SNOS018G –AUGUST 1999–REVISED FEBRUARY 2013
(1)(2)
Absolute Maximum Ratings
ESD Tolerance
(3)
Human Body Model
LMV331-N/393-N/339-N
800V
Machine Model
LMV331-N/339-N/393-N
120V
±Supply Voltage
5.5V
Differential Input Voltage
Voltage on any pin
(referred to V− pin)
Soldering Information
Infrared or Convection (20 sec)
235°C
−65°C to +150°C
150°C
Storage Temp. Range
(4)
Junction Temperature
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test
conditions, see the Electrical characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for
availability and specifications.
(3) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of
JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
(4) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC board.
(1)
Operating Ratings
Supply Voltage
2.7V to 5.0V
(2)
Temperature Range
LMV393-N. LMV339-N, LMV331-N
−40°C to +85°C
Thermal Resistance (θJA
)
5-Pin SC70
478°C/W
265°C/W
190°C/W
235°C/W
145°C/W
155°C/W
5-Pin SOT23
8-Pin SOIC
8-Pin VSSOP
14-Pin SOIC
14-Pin TSSOP
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test
conditions, see the Electrical characteristics.
(2) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC board.
2.7V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 2.7V, V− = 0V. Boldface limits apply at the temperature
extremes.
Symbol
Parameter
Input Offset Voltage
Conditions
Min
Typ
Max
Units
(1)
(2)
(1)
VOS
1.7
5
7
mV
TCVOS
IB
Input Offset Voltage Average Drift
Input Bias Current
µV/°C
10
250
400
nA
nA
IOS
Input Offset Current
5
50
150
(1) All limits are guaranteed by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
Copyright © 1999–2013, Texas Instruments Incorporated
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2.7V DC Electrical Characteristics (continued)
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 2.7V, V− = 0V. Boldface limits apply at the temperature
extremes.
Symbol
Parameter
Input Voltage Range
Conditions
Min
Typ
Max
Units
(1)
(2)
(1)
VCM
−0.1
2.0
120
23
V
V
VSAT
IO
Saturation Voltage
Output Sink Current
Supply Current
I
SINK ≤ 1 mA
mV
mA
µA
µA
V
O ≤ 1.5V
5
IS
LMV331-N
LMV393-N
40
100
140
70
Both Comparators
LMV339-N
All four Comparators
140
200
µA
µA
Output Leakage Current
.003
1
2.7V AC Electrical Characteristics
TJ = 25°C, V+ = 2.7V, RL = 5.1 kΩ, V− = 0V.
Symbol
tPHL
Parameter
Conditions
Min
Typ
Max
Units
(1)
(2)
(1)
Propagation Delay (High to Low)
Input Overdrive = 10 mV
Input Overdrive = 100 mV
Input Overdrive = 10 mV
Input Overdrive = 100 mV
1000
350
500
400
ns
ns
ns
ns
tPLH
Propagation Delay (Low to High)
(1) All limits are guaranteed by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
5V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 5V, V− = 0V. Boldface limits apply at the temperature
extremes.
Symbol
Parameter
Input Offset Voltage
Conditions
Min
Typ
max
Units
(1)
(2)
(1)
VOS
1.7
7
9
mV
µV/°C
nA
TCVOS
IB
Input Offset Voltage Average Drift
Input Bias Current
5
25
250
400
IOS
Input Offset Current
Input Voltage Range
2
50
150
nA
VCM
−0.1
4.2
V
V
AV
Voltage Gain
20
50
V/mV
Vsat
Saturation Voltage
I
SINK ≤ 4 mA
200
400
700
mV
mA
IO
Output Sink Current
V
O ≤ 1.5V
84
10
(1) All limits are guaranteed by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
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SNOS018G –AUGUST 1999–REVISED FEBRUARY 2013
5V DC Electrical Characteristics (continued)
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 5V, V− = 0V. Boldface limits apply at the temperature
extremes.
Symbol
Parameter
Supply Current
Conditions
Min
Typ
max
Units
(1)
(2)
(1)
IS
LMV331-N
LMV393-N
60
120
150
µA
µA
100
170
.003
200
250
Both Comparators
LMV339-N
300
350
µA
µA
All four Comparators
Output Leakage Current
1
5V AC Electrical Characteristics
TJ = 25°C, V+ = 5V, RL = 5.1 kΩ, V− = 0V.
Symbol
tPHL
Parameter
Conditions
Min
Typ
Max
Units
(1)
(2)
(1)
Propagation Delay (High to Low)
Input Overdrive = 10 mV
Input Overdrive = 100 mV
Input Overdrive = 10 mV
Input Overdrive = 100 mV
600
200
450
300
ns
ns
ns
ns
tPLH
Propagation Delay (Low to High)
(1) All limits are guaranteed by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
Copyright © 1999–2013, Texas Instruments Incorporated
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TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified, VS = +5V, single supply, TA = 25°C
Supply Current
Supply Current
vs.
Supply Voltage Output Low (LMV331-N)
vs.
Supply Voltage Output High (LMV331-N)
Figure 3.
Figure 4.
Output Voltage
vs.
Output Current at 5V Supply
Output Voltage
vs.
Output Current at 2.7 Supply
500
-40°C
400
85°C
300
25°C
200
100
0
0
1
2
3
4
5
6
7
8
9
10
I
(mA)
SINK
Figure 5.
Figure 6.
Input Bias Current
vs.
Supply Voltage
Response Time
vs.
Input Overdrives Negative Transition
Figure 7.
Figure 8.
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SNOS018G –AUGUST 1999–REVISED FEBRUARY 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Unless otherwise specified, VS = +5V, single supply, TA = 25°C
Response Time
vs.
Input Overdrives Negative Transition
Response Time for Input Overdrive Positive Transition
Figure 9.
Figure 10.
Response Time for Input Overdrive Positive Transition
Figure 11.
SIMPLIFIED SCHEMATIC
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APPLICATION CIRCUITS
BASIC COMPARATOR
A basic comparator circuit is used for converting analog signals to a digital output. The LMV331-N/393-N/339-N
have an open-collector output stage, which requires a pull-up resistor to a positive supply voltage for the output
to switch properly. When the internal output transistor is off, the output voltage will be pulled up to the external
positive voltage.
The output pull-up resistor should be chosen high enough so as to avoid excessive power dissipation yet low
enough to supply enough drive to switch whatever load circuitry is used on the comparator output. On the
LMV331-N/393-N/339-N the pull-up resistor should range between 1k to 10kΩ.
The comparator compares the input voltage (VIN) at the non-inverting pin to the reference voltage (VREF) at the
inverting pin. If VIN is less than VREF, the output voltage (VO) is at the saturation voltage. On the other hand, if VIN
is greater than VREF, the output voltage (VO) is at VCC
.
Figure 12. Basic Comparator
COMPARATOR WITH HYSTERESIS
The basic comparator configuration may oscillate or produce a noisy output if the applied differential input
voltage is near the comparator's offset voltage. This usually happens when the input signal is moving very slowly
across the comparator's switching threshold. This problem can be prevented by the addition of hysteresis or
positive feedback.
INVERTING COMPARATOR WITH HYSTERESIS
The inverting comparator with hysteresis requires a three resistor network that are referenced to the supply
voltage VCC of the comparator. When Vin at the inverting input is less than Va, the voltage at the non-inverting
node of the comparator (Vin < Va), the output voltage is high (for simplicity assume VO switches as high as VCC).
The three network resistors can be represented as R1//R3 in series with R2. The lower input trip voltage Va1 is
defined as
(1)
When Vin is greater than Va (Vin > Va), the output voltage is low very close to ground. In this case the three
network resistors can be presented as R2//R3 in series with R1. The upper trip voltage Va2 is defined as
(2)
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SNOS018G –AUGUST 1999–REVISED FEBRUARY 2013
The total hysteresis provided by the network is defined as
ΔVa = Va1 - Va2
(3)
To assure that the comparator will always switch fully to VCC and not be pulled down by the load the resistors
values should be chosen as follow:
RPULL-UP << RLOAD
and R1 > RPULL-UP
(4)
(5)
.
Figure 13. Inverting Comparator with Hysteresis
NON-INVERTING COMPARATOR WITH HYSTERESIS
Non inverting comparator with hysteresis requires a two resistor network, and a voltage reference (Vref) at the
inverting input. When Vin is low, the output is also low. For the output to switch from low to high, Vin must rise up
to Vin1 where Vin1 is calculated by
(6)
When Vin is high, the output is also high, to make the comparator switch back to it's low state, Vin must equal Vref
before VA will again equal Vref. Vin can be calculated by:
(7)
The hysteresis of this circuit is the difference between Vin1 and Vin2
.
ΔVin = VCCR1/R2
(8)
9
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Figure 14.
Figure 15.
SQUAREWAVE OSCILLATOR
Comparators are ideal for oscillator applications. This square wave generator uses the minimum number of
components. The output frequency is set by the RC time constant of the capacitor C1 and the resistor in the
negative feedback R4. The maximum frequency is limited only by the large signal propagation delay of the
comparator in addition to any capacitive loading at the output, which would degrade the output slew rate.
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SNOS018G –AUGUST 1999–REVISED FEBRUARY 2013
Figure 16. Squarewave Oscillator
To analyze the circuit, assume that the output is initially high. For this to be true, the voltage at the inverting input
Vc has to be less than the voltage at the non-inverting input Va. For Vc to be low, the capacitor C1 has to be
discharged and will charge up through the negative feedback resistor R4. When it has charged up to value equal
to the voltage at the positive input Va1, the comparator output will switch.
Va1 will be given by:
(9)
If:
Then:
R1 = R2 = R3
(10)
(11)
(12)
Va1 = 2VCC/3
When the output switches to ground, the value of Va is reduced by the hysteresis network to a value given by:
Va2 = VCC/3
Capacitor C1 must now discharge through R4 towards ground. The output will return to its high state when the
voltage across the capacitor has discharged to a value equal to Va2.
For the circuit shown, the period for one cycle of oscillation will be twice the time it takes for a single RC circuit to
charge up to one half of its final value. The time to charge the capacitor can be calculated from
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(13)
Where Vmax is the max applied potential across the capacitor = (2VCC/3)
and VC = Vmax/2 = VCC/3
One period will be given by:
1/freq = 2t
(14)
(15)
or calculating the exponential gives:
1/freq = 2(0.694) R4 C1
Resistors R3 and R4 must be at least two times larger than R5 to insure that VO will go all the way up to VCC in
the high state. The frequency stability of this circuit should strictly be a function of the external components.
FREE RUNNING MULTIVIBRATOR
A simple yet very stable oscillator that generates a clock for slower digital systems can be obtained by using a
resonator as the feedback element. It is similar to the free running multivibrator, except that the positive feedback
is obtained through a quartz crystal. The circuit oscillates when the transmission through the crystal is at a
maximum, so the crystal in its series-resonant mode.
The value of R1 and R2 are equal so that the comparator will switch symmetrically about +VCC/2. The RC
constant of R3 and C1 is set to be several times greater than the period of the oscillating frequency, insuring a
50% duty cycle by maintaining a DC voltage at the inverting input equal to the absolute average of the output
waveform.
When specifying the crystal, be sure to order series resonant with the desired temperature coefficient.
Figure 17. Crystal controlled Oscillator
PULSE GENERATOR WITH VARIABLE DUTY CYCLE
The pulse generator with variable duty cycle is just a minor modification of the basic square wave generator.
Providing a separate charge and discharge path for capacitor C1generates a variable duty cycle. One path,
through R2 and D2 will charge the capacitor and set the pulse width (t1). The other path, R1 and D1 will discharge
the capacitor and set the time between pulses (t2).
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By varying resistor R1, the time between pulses of the generator can be changed without changing the pulse
width. Similarly, by varying R2, the pulse width will be altered without affecting the time between pulses. Both
controls will change the frequency of the generator. The pulse width and time between pulses can be found from:
Figure 18. Pulse Generator
(16)
Solving these equations for t1 and t2
t1 =R4C1ln2
t2 =R5C1ln2
(17)
(18)
These terms will have a slight error due to the fact that Vmax is not exactly equal to 2/3 VCC but is actually
reduced by the diode drop to:
(19)
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(20)
(21)
POSITIVE PEAK DETECTOR
Positive peak detector is basically the comparator operated as a unit gain follower with a large holding capacitor
from the output to ground. Additional transistor is added to the output to provide a low impedance current source.
When the output of the comparator goes high, current is passed through the transistor to charge up the
capacitor. The only discharge path will be the 1 MΩ resistor shunting C1 and any load that is connected to the
output. The decay time can be altered simply by changing the 1 MΩ resistor. The output should be used through
a high impedance follower to a avoid loading the output of the peak detector.
Figure 19. Positive Peak Detector
NEGATIVE PEAK DETECTOR
For the negative detector, the output transistor of the comparator acts as a low impedance current sink. The only
discharge path will be the 1 MΩ resistor and any load impedance used. Decay time is changed by varying the 1
MΩ resistor.
Figure 20. Negative Peak Detector
DRIVING CMOS AND TTL
The comparator's output is capable of driving CMOS and TTL Logic circuits.
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Figure 21. Driving CMOS
Figure 22. Driving TTL
AND GATES
The comparator can be used as three input AND gate. The operation of the gate is as follows:
The resistor divider at the inverting input establishes a reference voltage at that node. The non-inverting input is
the sum of the voltages at the inputs divided by the voltage dividers. The output will go high only when all three
inputs are high, casing the voltage at the non-inverting input to go above that at inverting input. The circuit values
shown work for a "0" equal to ground and a "1" equal to 5V.
The resistor values can be altered if different logic levels are desired. If more inputs are required, diodes are
recommended to improve the voltage margin when all but one of the inputs are high.
Figure 23. AND Gate
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OR GATES
A three input OR gate is achieved from the basic AND gate simply by increasing the resistor value connected
from the inverting input to Vcc, thereby reducing the reference voltage.
A logic "1" at any of the inputs will produce a logic "1" at the output.
Figure 24. OR Gate
ORing THE OUTPUT
By the inherit nature of an open collector comparator, the outputs of several comparators can be tied together
with a pull up resistor to VCC. If one or more of the comparators outputs goes low, the output VO will go low.
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Figure 25. ORing the Outputs
Figure 26. Large Fan-In AND Gate
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Connection Diagram
Figure 27. 5-Pin SC70/SOT23
Top View
Figure 28. 8-Pin SOIC/VSSOP
Top View
Figure 29. 14-Pin SOIC/TSSOP
Top View
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REVISION HISTROY
Changes from Revision F (February 2013) to Revision G
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 18
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PACKAGE OPTION ADDENDUM
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7-Oct-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
LMV331M5
ACTIVE
SOT-23
SOT-23
DBV
5
5
1000
TBD
Call TI
CU CU
Call TI
-40 to 85
-40 to 85
C12
C12
LMV331M5/NOPB
ACTIVE
DBV
1000
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV331M5X
ACTIVE
ACTIVE
SOT-23
SOT-23
DBV
DBV
5
5
3000
3000
TBD
Call TI
CU CU
Call TI
-40 to 85
-40 to 85
C12
C12
LMV331M5X/NOPB
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV331M7
ACTIVE
ACTIVE
SC70
SC70
DCK
DCK
5
5
1000
1000
TBD
Call TI
CU SN
Call TI
-40 to 85
-40 to 85
C13
C13
LMV331M7/NOPB
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV331M7X
ACTIVE
ACTIVE
SC70
SC70
DCK
DCK
5
5
3000
3000
TBD
Call TI
CU SN
Call TI
-40 to 85
-40 to 85
C13
C13
LMV331M7X/NOPB
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV339M
ACTIVE
ACTIVE
SOIC
SOIC
D
D
14
14
55
55
TBD
Call TI
CU SN
Call TI
-40 to 85
-40 to 85
LMV339M
LMV339M
LMV339M/NOPB
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV339MT
LMV339MT/NOPB
LMV339MTX
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
TSSOP
TSSOP
SOIC
PW
PW
PW
PW
D
14
14
14
14
14
8
94
94
TBD
Call TI
CU SN
Call TI
CU SN
CU SN
Call TI
CU SN
Call TI
Call TI
Level-1-260C-UNLIM
Call TI
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
LMV339
MT
Green (RoHS
& no Sb/Br)
LMV339
MT
2500
2500
2500
95
TBD
LMV339
MT
LMV339MTX/NOPB
LMV339MX/NOPB
LMV393M
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Call TI
LMV339
MT
Green (RoHS
& no Sb/Br)
LMV339M
SOIC
D
TBD
LMV
393M
LMV393M/NOPB
LMV393MM
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Call TI
LMV
393M
VSSOP
DGK
8
1000
TBD
V393
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
7-Oct-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
LMV393MM/NOPB
ACTIVE
VSSOP
DGK
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
V393
LMV393MMX
ACTIVE
ACTIVE
VSSOP
VSSOP
DGK
DGK
8
8
3500
3500
TBD
Call TI
CU SN
Call TI
-40 to 85
-40 to 85
V393
V393
LMV393MMX/NOPB
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV393MX
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
2500
2500
TBD
Call TI
CU SN
Call TI
-40 to 85
-40 to 85
LMV
393M
LMV393MX/NOPB
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV
393M
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
7-Oct-2013
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LMV331M5
LMV331M5X
SOT-23
SOT-23
SC70
DBV
DBV
DCK
DCK
DCK
DCK
PW
5
5
1000
3000
1000
1000
3000
3000
2500
2500
2500
1000
1000
3500
3500
2500
2500
178.0
178.0
178.0
178.0
178.0
178.0
330.0
330.0
330.0
178.0
178.0
330.0
330.0
330.0
330.0
8.4
8.4
3.2
3.2
3.2
3.2
1.4
1.4
1.2
1.2
1.2
1.2
1.6
1.6
2.3
1.4
1.4
1.4
1.4
2.0
2.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
LMV331M7
5
8.4
2.25
2.25
2.25
2.25
6.95
6.95
6.5
2.45
2.45
2.45
2.45
8.3
8.0
LMV331M7/NOPB
LMV331M7X
SC70
5
8.4
8.0
SC70
5
8.4
8.0
LMV331M7X/NOPB
LMV339MTX
SC70
5
8.4
8.0
TSSOP
TSSOP
SOIC
14
14
14
8
12.4
12.4
16.4
12.4
12.4
12.4
12.4
12.4
12.4
12.0
12.0
16.0
12.0
12.0
12.0
12.0
12.0
12.0
LMV339MTX/NOPB
LMV339MX/NOPB
LMV393MM
PW
8.3
D
9.35
3.4
VSSOP
VSSOP
VSSOP
VSSOP
SOIC
DGK
DGK
DGK
DGK
D
5.3
LMV393MM/NOPB
LMV393MMX
8
5.3
3.4
8
5.3
3.4
LMV393MMX/NOPB
LMV393MX
8
5.3
3.4
8
6.5
5.4
LMV393MX/NOPB
SOIC
D
8
6.5
5.4
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Sep-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LMV331M5
LMV331M5X
SOT-23
SOT-23
SC70
DBV
DBV
DCK
DCK
DCK
DCK
PW
5
5
1000
3000
1000
1000
3000
3000
2500
2500
2500
1000
1000
3500
3500
2500
2500
210.0
210.0
210.0
210.0
210.0
210.0
367.0
367.0
367.0
210.0
210.0
367.0
367.0
367.0
367.0
185.0
185.0
185.0
185.0
185.0
185.0
367.0
367.0
367.0
185.0
185.0
367.0
367.0
367.0
367.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
LMV331M7
5
LMV331M7/NOPB
LMV331M7X
SC70
5
SC70
5
LMV331M7X/NOPB
LMV339MTX
SC70
5
TSSOP
TSSOP
SOIC
14
14
14
8
LMV339MTX/NOPB
LMV339MX/NOPB
LMV393MM
PW
D
VSSOP
VSSOP
VSSOP
VSSOP
SOIC
DGK
DGK
DGK
DGK
D
LMV393MM/NOPB
LMV393MMX
8
8
LMV393MMX/NOPB
LMV393MX
8
8
LMV393MX/NOPB
SOIC
D
8
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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