LMV342MA [TI]
Single with Shutdown/Dual/Quad General Purpose, 2.7V,Rail-to-Rail Output, 125C, Operational Amplifiers;型号: | LMV342MA |
厂家: | TEXAS INSTRUMENTS |
描述: | Single with Shutdown/Dual/Quad General Purpose, 2.7V,Rail-to-Rail Output, 125C, Operational Amplifiers |
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LMV341,LMV342,LMV344
LMV341/LMV342/LMV344 Single with Shutdown/Dual/Quad General Purpose,
2.7V,Rail-to-Rail Output, 125C, Operational Amplifiers
Literature Number: SNOS990F
January 25, 2008
LMV341/LMV342/LMV344
Single with Shutdown/Dual/Quad General Purpose, 2.7V,
Rail-to-Rail Output, 125°C, Operational Amplifiers
strained PC board requirements include portable electronics
such as cellular handsets and PDAs.
General Description
The LMV341/LMV342/LMV344 are single, dual, and quad low
voltage, low power Operational Amplifiers. They are designed
specifically for low voltage portable applications. Other im-
portant product characteristics are low input bias current, rail-
Features
(Typical 2.7V supply values; unless otherwise noted)
Guaranteed 2.7V and 5V specifications
Input referred voltage noise (@ 10kHz)
Supply current (per amplifier)
Gain bandwidth product
to-rail output, and wide temperature range.
■
■
■
■
■
■
■
■
29nV/√Hz
The patented class AB turnaround stage significantly reduces
the noise at higher frequencies, power consumption, and off-
set voltage. The PMOS input stage provides the user with
ultra-low input bias current of 20fA (typical) and high input
impedance.
100μA
1.0MHz
1.0V/μs
45pA
Slew rate
Shutdown Current (LMV341)
Turn-on time from shutdown (LMV341)
Input bias current
The industrial-plus temperature range of −40°C to 125°C al-
lows the LMV341/LMV342/LMV344 to accommodate a broad
range of extended environment applications. LMV341 ex-
pands National Semiconductor's Silicon Dust™ amplifier port-
folio offering enhancements in size, speed, and power
savings. The LMV341/LMV342/LMV344 are guaranteed to
operate over the voltage range of 2.7V to 5.5V and all have
rail-to-rail output.
5μs
20fA
Applications
Cordless/cellular phones
■
■
■
■
■
■
■
■
Laptops
PDAs
The LMV341 offers a shutdown pin that can be used to disable
the device. Once in shutdown mode, the supply current is re-
duced to 45pA (typical). The LMV341/LMV342/LMV344 have
29nV Voltage Noise at 10KHz, 1MHz GBW, 1.0V/μs Slew
Rate, 0.25mVos, and 0.1μA shutdown current (LMV341.)
The LMV341 is offered in the tiny 6-Pin SC70 package, the
LMV342 in space saving 8-Pin MSOP and SOIC, and the
LMV344 in 14-Pin TSSOP and SOIC. These small package
amplifiers offer an ideal solution for applications requiring
minimum PC board footprint. Applications with area con-
PCMCIA/Audio
Portable/battery-powered electronic equipment
Supply current monitoring
Battery monitoring
Buffer
Filter
■
■
Driver
Sample and Hold Circuit
20030444
Silicon Dust™ is a trademark of National Semiconductor Corporation.
© 2008 National Semiconductor Corporation
200304
www.national.com
Infrared or Convection Reflow
(20 sec.)
Wave Soldering Lead Temp.
(10 sec.)
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
235°C
260°C
ESD Tolerance (Note 2)
Machine Model
Human Body Model
Differential Input Voltage
Supply Voltage (V + -V −)
Output Short Circuit to V +
Output Short Circuit to V −
Storage Temperature Range
Junction Temperature (Note 5)
Mounting Temperature
Operating Ratings (Note 1)
200V
2000V
± Supply Voltage
6.0V
Supply Voltage
2.7V to 5.5V
−40°C to 125°C
Temperature Range
Thermal Resistance (θ JA
)
6-Pin SC70
8-Pin SOIC
8-Pin MSOP
14-Pin TSSOP
14-Pin SOIC
414°C/W
190°C/W
235°C/W
155°C/W
145°C/W
(Note 3)
(Note 4)
−65°C to 150°C
150°C
2.7V DC Electrical Characteristics (Note 10)
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = V+/2, VO = V+/2 and RL > 1MΩ. Boldface
limits apply at the temperature extremes.
Symbol
VOS
Parameter
Conditions
Min
(Note 7)
Typ
(Note 6)
Max
(Note 7)
Units
Input Offset Voltage
LMV341
LMV342/LMV344
0.25
0.55
1.7
4
4.5
mV
5
5.5
TCVOS
IB
Input Offset Voltage Average
Drift
µV/°C
pA
Input Bias Current
0.02
120
250
IOS
IS
Input Offset Current
Supply Current
6.6
fA
Per Amplifier
100
170
230
μA
Shutdown Mode, VSD = 0V
(LMV341)
45pA
80
1μA
1.5μA
CMRR
Common Mode Rejection Ratio
56
50
dB
0V ≤ VCM ≤ 1.7V
0V ≤ VCM ≤ 1.6V
2.7V ≤ V+ ≤ 5V
PSRR
VCM
AV
Power Supply Rejection Ratio
Input Common Mode Voltage
Large Signal Voltage Gain
65
60
82
dB
V
0
−0.2 to 1.9
(Range)
1.7
For CMRR ≥ 50dB
RL = 10kΩ to 1.35V
RL = 2kΩ to 1.35V
RL = 2kΩ to 1.35V
78
70
113
103
24
dB
72
64
VO
Output Swing
60
95
60
26
95
mV
5.0
5.3
30
40
RL = 10kΩ to 1.35V
30
40
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2
Symbol
IO
Parameter
Conditions
Sourcing
Min
(Note 7)
Typ
(Note 6)
Max
(Note 7)
Units
Output Short Circuit Current
20
18
15
32
24
LMV341/LMV342
Sourcing
LMV344
mA
Sinking
24
5
ton
Turn-on Time from Shutdown
Shutdown Pin Voltage Range
(LMV341)
μs
VSD
ON Mode (LMV341)
Shutdown Mode (LMV341)
1.7 to 2.7
0 to 1
2.4 to 2.7
0 to 0.8
V
2.7V AC Electrical Characteristics (Note 10)
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = V+/2, VO = V+/2 and RL > 1MΩ.
Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 7)
(Note 6)
(Note 7)
SR
Slew Rate
1.0
1.0
RL = 10kΩ, (Note 9)
RL = 100kΩ, CL = 200pF
RL = 100kΩ
V/μs
MHz
deg
dB
GBW
Gain Bandwidth Product
Phase Margin
72
Φm
Gm
en
Gain Margin
20
RL = 100kΩ
Input-Referred Voltage Noise
Input-Referred Current Noise
Total Harmonic Distortion
f = 1kHz
40
nV/
pA/
in
f = 1kHz
0.001
0.017
THD
f = 1kHz, AV = +1
%
RL = 600Ω, VIN = 1VPP
5V DC Electrical Characteristics (Note 10)
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 5V, V− = 0V, VCM = V+/2, VO = V+/2 and R L > 1MΩ. Bold-
face limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 7)
(Note 6)
(Note 7)
VOS
Input Offset Voltage
LMV341
LMV342/LMV344
0.025
0.70
1.9
4
4.5
mV
5
5.5
TCVOS
IB
Input Offset Voltage Average
Drift
µV/°C
pA
Input Bias Current
0.02
200
375
IOS
IS
Input Offset Current
Supply Current
6.6
fA
Per Amplifier
107
200
260
μA
Shutdown Mode, VSD = 0V
(LMV341)
0.033
86
1
1.5
μA
CMRR
Common Mode Rejection Ratio
56
50
dB
0V ≤ VCM ≤ 4.0V
0V ≤ VCM ≤ 3.9V
2.7V ≤ V+ ≤ 5V
PSRR
VCM
Power Supply Rejection Ratio
Input Common Mode Voltage
65
60
82
dB
V
0
−0.2 to 4.2
(Range)
4
For CMRR ≥ 50dB
3
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Symbol
AV
Parameter
Conditions
RL = 10kΩ to 2.5V
RL = 2kΩ to 2.5V
RL = 2kΩ to 2.5V
Min
(Note 7)
Typ
(Note 6)
Max
(Note 7)
Units
Large Signal Voltage Gain (Note
8)
78
70
116
107
32
34
7
dB
72
64
VO
Output Swing
60
95
mV
mV
60
95
30
40
RL = 10kΩ to 2.5V
30
7
40
IO
Output Short Circuit Current
Sourcing
85
50
113
75
mA
µs
V
Sinking
ton
Turn-on Time from Shutdown
Shutdown Pin Voltage Range
(LMV341)
5
VSD
ON Mode (LMV341)
Shutdown Mode (LMV341)
3.1 to 5
0 to 1
4.5 to 5.0
0 to 0.8
5V AC Electrical Characteristics (Note 10)
Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 5V, V− = 0V, VCM = V+/2, VO = V+/2 and R L > 1MΩ. Bold-
face limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 7)
(Note 6)
(Note 7)
SR
Slew Rate
1.0
1.0
V/µs
MHz
deg
dB
RL = 10kΩ, (Note 9)
RL = 10kΩ, CL = 200pF
RL = 100kΩ
GBW
Gain-Bandwidth Product
Phase Margin
70
Φm
Gm
en
Gain Margin
20
RL = 100kΩ
Input-Referred Voltage Noise
Input-Referred Current Noise
Total Harmonic Distortion
f = 1kHz
39
nV/
pA/
in
f = 1kHz
0.001
0.012
THD
f = 1kHz, AV = +1
%
RL = 600Ω, VIN = 1VPP
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)
Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 3: Shorting output to V+ will adversely affect reliability.
Note 4: Shorting output to V- will adversely affect reliability.
Note 5: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature
is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.
Note 6: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 7: All limits are guaranteed by testing or statistical analysis.
Note 8: RL is connected to mid-supply. The output voltage is GND + 0.2V ≤ VO ≤ V+ −0.2V
Note 9: Connected as voltage follower with 2VPP step input. Number specified is the slower of the positive and negative slew rates.
Note 10: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating
of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ
TA.
>
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4
Connection Diagrams
6-Pin SC70
8-Pin MSOP/SOIC
14-Pin TSSOP/SOIC
20030452
20030451
20030441
Top View
Top View
Top View
Ordering Information
Package
Part Number
Package Marking
Transport Media
NSC Drawing
LMV341MG
LMV341MGX
LMV342MM
LMV342MMX
LMV342MA
LMV342MAX
LMV344MT
LMV344MTX
LMV344MA
LMV344MAX
1k Units Tape and Reel
3k Units Tape and Reel
1k Units Tape and Reel
3.5k Units Tape and Reel
95 Units/Rail
6-Pin SC70
A78
MAA06A
8-Pin MSOP
8-Pin SOIC
A82A
MUA08A
M08A
LMV342MA
LMV344MT
LMV344MA
2.5k Units Tape and Reel
Rails
14-Pin TSSOP
14-Pin SOIC
MTC14
M14A
2.5k Units Tape and Reel
55 Units/Rail
2.5k Units Tape and Reel
5
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Typical Performance Characteristics
Supply Current vs. Supply Voltage (LMV341)
Input Current vs. Temperature
20030428
20030446
Output Voltage Swing vs. Supply Voltage
Output Voltage Swing vs. Supply Voltage
20030426
20030427
ISOURCE vs. VOUT
ISOURCE vs. VOUT
20030429
20030430
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6
ISINK vs. VOUT
ISINK vs. VOUT
20030432
20030431
VOS vs. VCM
VOS vs. VCM
20030433
20030434
VIN vs. VOUT
VIN vs. VOUT
20030435
20030436
7
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CMRR vs. Frequency
PSRR vs. Frequency
20030401
20030403
Input Voltage Noise vs. frequency
Slew Rate vs. VSUPPLY
20030404
20030402
Slew Rate vs. Temperature
Slew Rate vs. Temperature
20030422
20030423
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8
THD+N vs. Frequency
THD+N vs. VOUT
Open Loop Frequency Response
Gain and Phase vs. CL
20030425
20030424
Open Loop Frequency Over Temperature
20030421
20030420
Open Loop Frequency Response
20030419
20030417
9
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Gain and Phase vs. CL
Stability vs. Capacitive Load
20030448
20030418
Stability vs. Capacitive Load
Non-Inverting Small Signal Pulse Response
20030405
20030449
Non-Inverting Large Signal Pulse Response
Non-Inverting Small Signal Pulse Response
20030408
20030406
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Non-Inverting Large Signal Pulse Response
Non-Inverting Small Signal Pulse Response
20030409
20030407
Non-Inverting Large Signal Pulse Response
Inverting Small Signal Pulse Response
20030410
20030411
Inverting Large Signal Pulse Response
Inverting Small Signal Pulse Response
20030414
20030412
11
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Inverting Large Signal Pulse Response
Inverting Small Signal Pulse Response
20030415
20030413
Inverting Large Signal Pulse Response
Crosstalk Rejection vs. Frequency
20030416
20030454
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12
Application Section
LMV341/LMV342/LMV344
SAMPLE AND HOLD CIRCUIT
The LMV341/LMV342/LMV344 family of amplifiers features
low voltage, low power, and rail-to-rail output operational am-
plifiers designed for low voltage portable applications. The
family is designed using all CMOS technology. This results in
an ultra low input bias current. The LMV341 has a shutdown
option, which can be used in portable devices to increase
battery life.
The lower input bias current of the LMV341 results in a very
high input impedance. The output impedance when the de-
vice is in shutdown mode is quite high. These high
impedances, along with the ability of the shutdown pin to be
derived from a separate power source, make LMV341 a good
choice for sample and hold circuits. The sample clock should
be connected to the shutdown pin of the amplifier to rapidly
turn the device on or off.
A simplified schematic of the LMV341/LMV342/LMV344 fam-
ily of amplifiers is shown in Figure 1. The PMOS input differ-
ential pair allows the input to include ground. The output of
this differential pair is connected to the Class AB turnaround
stage. This Class AB turnaround has a lower quiescent cur-
rent, compared to regular turnaround stages. This results in
lower offset, noise, and power dissipation, while slew rate
equals that of a conventional turnaround stage. The output of
the Class AB turnaround stage provides gate voltage to the
complementary common-source transistors at the output
stage. These transistors enable the device to have rail-to-rail
output.
Figure 2 shows the schematic of a simple sample and hold
circuit. When the sample clock is high the first amplifier is in
normal operation mode and the second amplifier acts as a
buffer. The capacitor, which appears as a load on the first
amplifier, will be charging at this time. The voltage across the
capacitor is that of the non-inverting input of the first amplifier
since it is connected as a voltage-follower. When the sample
clock is low the first amplifier is shut off, bringing the output
impedance to a high value. The high impedance of this output,
along with the very high impedance on the input of the second
amplifier, prevents the capacitor from discharging. There is
very little voltage droop while the first amplifier is in shutdown
mode. The second amplifier, which is still in normal operation
mode and is connected as a voltage follower, also provides
the voltage sampled on the capacitor at its output.
20030453
20030444
FIGURE 1. Simplified Schematic
FIGURE 2. Sample and Hold Circuit
CLASS AB TURNAROUND STAGE AMPLIFIER
This patented folded cascode stage has a combined class AB
amplifier stage, which replaces the conventional folded cas-
code stage. Therefore, the class AB folded cascode stage
runs at a much lower quiescent current compared to conven-
tional folded cascode stages. This results in significantly
smaller offset and noise contributions. The reduced offset and
noise contributions in turn reduce the offset voltage level and
the voltage noise level at the input of the LMV341/LMV342/
LMV344. Also the lower quiescent current results in a high
open-loop gain for the amplifier. The lower quiescent current
does not affect the slew rate of the amplifier nor its ability to
handle the total current swing coming from the input stage.
SHUTDOWN FEATURE
The LMV341 is capable of being turned off in order to con-
serve power and increase battery life in portable devices.
Once in shutdown mode the supply current is drastically re-
duced, 1µA maximum, and the output will be "tri-stated."
The device will be disabled when the shutdown pin voltage is
pulled low. The shutdown pin should never be left unconnect-
ed. Leaving the pin floating will result in an undefined opera-
tion mode and the device may oscillate between shutdown
and active modes.
The LMV341 typically turns on 2.8µs after the shutdown volt-
age is pulled high. The device turns off in less than 400ns after
shutdown voltage is pulled low. Figure 3 and Figure 4 show
the turn-on and turn-off time of the LMV341, respectively. In
order to reduce the effect of the capacitance added to the
circuit by the scope probe, in the turn-off time circuit a resistive
load of 600Ω is added. Figure 5 and Figure 6 show the test
circuits used to obtain the two plots.
The input voltage noise of the device at low frequencies, be-
low 1kHz, is slightly higher than devices with a BJT input
stage; However the PMOS input stage results in a much lower
input bias current and the input voltage noise drops at fre-
quencies above 1kHz.
13
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20030443
FIGURE 6. Turn-off Time
LOW INPUT BIAS CURRENT
20030440
The LMV341/LMV342/LMV344 Amplifiers have a PMOS in-
put stage. As a result, they will have a much lower input bias
current than devices with BJT input stages. This feature
makes these devices ideal for sensor circuits. A typical curve
of the input bias current of the LMV341 is shown in Figure 7.
FIGURE 3. Turn-on Time
20030439
FIGURE 4. Turn-off Time
20030447
FIGURE 7. Input Bias Current vs. VCM
20030442
FIGURE 5. Turn-on Time
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14
Physical Dimensions inches (millimeters) unless otherwise noted
6-Pin SC70
NS Package Number MAA06A
8-Pin MSOP
NS Package Number MUA08A
15
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8-Pin SOIC
NS Package Number M08A
14-Pin TSSOP
NS Package Number MTC14
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16
14-Pin SOIC
NS Package Number M14A
17
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Notes
For more National Semiconductor product information and proven design tools, visit the following Web sites at:
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