LMV716MM/NOPB [TI]

双路 5V 5MHz 低噪声 (12.8-nV/√Hz) 运算放大器 | DGK | 8 | -40 to 85;
LMV716MM/NOPB
型号: LMV716MM/NOPB
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

双路 5V 5MHz 低噪声 (12.8-nV/√Hz) 运算放大器 | DGK | 8 | -40 to 85

放大器 运算放大器
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LMV716  
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SNOSAT9B APRIL 2006REVISED MARCH 2013  
LMV716 5 MHz, Low Noise, RRO, Dual Operational Amplifier with CMOS Input  
Check for Samples: LMV716  
1
FEATURES  
DESCRIPTION  
The LMV716 is a dual operational amplifier with both  
low supply voltage and low supply current, making it  
ideal for portable applications. The LMV716 CMOS  
input stage drives the IBIAS current down to 0.6 pA;  
this coupled with the low noise voltage of 12.8  
nV/Hz makes the LMV716 perfect for applications  
requiring active filters, transimpedance amplifiers,  
and HDD vibration cancellation circuitry.  
2
(Typical Values, V+ = 3.3V, TA = 25°C, unless  
Otherwise Specified)  
Input Noise Voltage 12.8 nV/Hz  
Input Bias Current 0.6 pA  
Offset Voltage 1.6 mV  
CMRR 80 dB  
Open Loop Gain 122 dB  
Rail-to-Rail Output  
Along with great noise sensitivity, small signal  
applications will benefit from the large gain bandwidth  
of 5 MHz coupled with the minimal supply current of  
1.6 mA and a slew rate of 5.8 V/μs.  
GBW 5 MHz  
Slew Rate 5.8 V/µs  
The LMV716 provides rail-to-rail output swing into  
heavy loads. The input common-mode voltage range  
includes ground, which is ideal for ground sensing  
applications.  
Supply Current 1.6 mA  
Supply Voltage Range 2.7V to 5V  
Operating Temperature 40°C to 85°C  
8-pin VSSOP Package  
The LMV716 has a supply voltage spanning 2.7V to  
5V and is offered in an 8-pin VSSOP package that  
functions across the wide temperature range of  
40°C to 85°C. This small package makes it possible  
to place the LMV716 next to sensors, thus reducing  
external noise pickup.  
APPLICATIONS  
Active Filters  
Transimpedance Amplifiers  
Audio Preamp  
HDD Vibration Cancellation Circuitry  
Typical Application Circuit  
1 nF  
357 kW  
357 kW  
220 nF  
47 nF  
22 nF  
V
IN  
-
357 kW  
357 kW  
2
3
1
-
6
5
7
357 kW  
V
OUT  
+
22 nF  
+
HIGH PASS SECTION  
PASS BAND GAIN = 50  
LOW PASS SECTION  
PASS BAND GAIN = 25  
= 3 kHz  
f
c
= 1 kHz  
f
c
Figure 1. High Gain Band Pass Filter  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2006–2013, Texas Instruments Incorporated  
LMV716  
SNOSAT9B APRIL 2006REVISED MARCH 2013  
www.ti.com  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
(1)(2)  
Absolute Maximum Ratings  
ESD Tolerance  
(3)  
Human Body Model  
Machine Model  
2000V  
200V  
Supply Voltage (V+ – V)  
5.5V  
Storage Temperature Range  
65°C to 150°C  
150°C max  
(4)  
Junction Temperature  
Mounting Temperature  
Infrared or Convection (20 sec)  
260°C  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test  
conditions, see the Electrical Characteristics.  
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and  
specifications.  
(3) Human Body Model is 1.5 kin series with 100 pF. Machine Model is 0in series with 100 pF.  
(4) The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient  
temperature is PD = (TJ(MAX)-TA)/θJA. All numbers apply for packages soldered directly into a PC board.  
(1)  
Operating Ratings  
Supply Voltage  
2.7V to 5V  
Temperature Range  
Thermal Resistance (θJA  
8-Pin VSSOP  
40°C to 85°C  
)
195°C/W  
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for  
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test  
conditions, see the Electrical Characteristics.  
2
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SNOSAT9B APRIL 2006REVISED MARCH 2013  
(1)  
3.3V Electrical Characteristics  
Unless otherwise specified, all limits are ensured for TJ = 25°C, V+ = 3.3V, V= 0V. VCM = V+/2. Boldface limits apply at the  
(2)  
temperature extremes  
.
(3)  
(4)  
(3)  
Symbol  
Parameter  
Condition  
Min  
Typ  
1.6  
Max  
Units  
VOS  
Input Offset Voltage  
VCM = 1V  
5
6
mV  
(5)  
IB  
Input Bias Current  
0.6  
115  
pA  
130  
IOS  
Input Offset Current  
1
pA  
dB  
CMRR  
Common Mode Rejection Ratio  
0 VCM 2.1V  
60  
80  
50  
PSRR  
Power Supply Rejection Ratio  
2.7V V+ 5V, VCM = 1V  
For CMRR 50 dB  
70  
60  
82  
dB  
V
CMVR  
AVOL  
Common Mode Voltage Range  
Open Loop Voltage Gain  
0.2  
2.2  
Sourcing  
80  
76  
122  
122  
105  
112  
RL = 10 kto V+/2,  
VO = 1.65V to 2.9V  
Sinking  
80  
76  
RL = 10 kto V+/2,  
VO = 0.4V to 1.65V  
dB  
Sourcing  
80  
76  
RL = 600to V+/2,  
VO = 1.65V to 2.8V  
Sinking  
80  
76  
RL = 600to V+/2,  
VO = 0.5V to 1.65V  
VO  
Output Swing High  
Output Swing Low  
Output Current  
RL = 10 kto V+/2  
RL = 600to V+/2  
RL = 10 kto V+/2  
RL = 600to V+/2  
Sourcing, VO = 0V  
Sinking, VO = 3.3V  
3.22  
3.17  
3.29  
3.22  
0.03  
0.07  
31  
3.12  
3.07  
V
0.12  
0.16  
0.23  
0.27  
IOUT  
20  
15  
mA  
mA  
30  
41  
25  
IS  
Supply Current  
VCM = 1V  
1.6  
2.0  
3
(6)  
SR  
GBW  
en  
Slew Rate  
5.8  
5
V/µs  
MHz  
Gain Bandwidth  
Input-Referred Voltage Noise  
Input-Referred Current Noise  
f = 1 kHz  
f = 1 kHz  
12.8  
0.01  
nV/Hz  
pA/Hz  
in  
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factor testing conditions result in very  
limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical  
tables under conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond  
which the device maybe permanently degraded, either mechanically or electrically.  
(2) Boldface limits apply to temperature range of 40°C to 85°C.  
(3) All limits are specified by testing or statistical analysis.  
(4) Typical values represent the most likely parametric norm.  
(5) Input bias current is specified by design.  
(6) Number specified is the lower of the positive and negative slew rates.  
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CONNECTION DIAGRAM  
8
7
1
2
+
OUT A  
IN A-  
V
OUT B  
IN B-  
+
6
5
3
4
IN A+  
+
-
V
IN B+  
Figure 2. Top View - 8-Pin VSSOP  
Simplified Schematic  
+
V
V
BIAS  
I
P
MP3  
MP4  
Q2  
Q1  
MP1  
MP2  
-
IN  
+
IN  
CLASS AB  
CONTROL  
OUT  
MN3  
Q3  
Q4  
Q5  
Q6  
V
BIAS  
-
V
4
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SNOSAT9B APRIL 2006REVISED MARCH 2013  
Typical Performance Characteristics  
Unless otherwise specified, V+ 3.3V, TJ = 25°C.  
Supply Current  
Offset Voltage  
vs.  
Common Mode  
vs.  
Supply Voltage  
2
1.9  
1.8  
1.7  
1.6  
1.5  
1.4  
1.3  
1.2  
1.7  
1.6  
1.5  
1.4  
1.3  
1.2  
1.1  
1
V
= 3.3V  
S
85°C  
85°C  
25°C  
25°C  
-40°C  
-40°C  
1.1  
1
0.9  
2.7  
3.2  
3.7  
4.2  
4.7  
0
0.5  
1
1.5  
2
2.3  
SUPPLY VOLTAGE (V)  
V
CM  
(V)  
Figure 3.  
Figure 4.  
Input Bias Current  
vs.  
Common Mode  
Input Bias Current  
vs.  
Common Mode  
0
0
T = 85°C  
T = 25°C  
-10  
-100  
-200  
-300  
-400  
-500  
-600  
-700  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
V
CM  
(V)  
V
(V)  
CM  
Figure 5.  
Figure 6.  
Input Bias Current  
vs.  
Common Mode  
Output Positive Swing  
vs.  
Supply Voltage  
160  
140  
120  
100  
80  
0
R
L
= 600W  
T = -40°C  
-5  
-10  
-15  
-20  
-25  
-30  
-35  
25°C  
85°C  
-40°C  
60  
40  
20  
0
2.7  
3.2  
3.7  
4.2  
4.7  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
SUPPLY VOLTAGE (V)  
V
(V)  
CM  
Figure 7.  
Figure 8.  
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Typical Performance Characteristics (continued)  
Unless otherwise specified, V+ 3.3V, TJ = 25°C.  
Output Negative Swing  
Output Positive Swing  
vs.  
vs.  
Supply Voltage  
120  
Supply Voltage  
20  
18  
16  
14  
12  
10  
8
R
= 600W  
R
L
= 10 kW  
L
100  
85°C  
25°C  
80  
60  
85°C  
25°C  
-40°C  
40  
20  
0
6
4
-40°C  
2
0
2.7  
2.7  
3.2  
3.7  
4.2  
4.7  
3.2  
3.7  
4.2  
4.7  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
Figure 9.  
Figure 10.  
Output Negative Swing  
vs.  
Sinking Current  
vs.  
Supply Voltage  
VOUT  
40  
35  
30  
25  
20  
15  
10  
5
50  
40  
30  
20  
R
= 10 kW  
L
V
= 3.3V  
S
85°C  
25°C  
85°C  
25°C  
-40°C  
-40°C  
10  
0
0
2.7  
3.2  
3.7  
4.2  
4.7  
0
0.5  
1
1.5  
2
2.5  
3 3.3  
SUPPLY VOLTAGE (V)  
V
(V)  
OUT  
Figure 11.  
Figure 12.  
Sourcing Current  
PSRR  
vs.  
Frequency  
vs.  
VOUT  
120  
100  
80  
40  
30  
20  
V
= 3.3V  
S
85°C  
-PSRR  
25°C  
+PSRR  
60  
-40°C  
40  
20  
0
10  
0
0
0.5  
1
1.5  
2
2.5  
3 3.3  
100  
1k  
10k  
100k  
1M  
V
(V)  
FREQUENCY (Hz)  
OUT  
Figure 13.  
Figure 14.  
6
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Typical Performance Characteristics (continued)  
Unless otherwise specified, V+ 3.3V, TJ = 25°C.  
CMRR  
vs.  
Frequency  
Crosstalk Rejection  
90  
80  
70  
140  
120  
100  
60  
50  
40  
30  
20  
80  
60  
40  
20  
0
10  
0
10k  
10  
100  
1k  
100k  
1M  
10k  
100k  
10  
100  
1k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 15.  
Figure 16.  
Inverting Large Signal Pulse Response  
Inverting Small Signal Pulse Response  
TIME (10 ms/DIV)  
TIME (10 ms/DIV)  
Figure 17.  
Figure 18.  
Non-Inverting Large Signal Pulse Response  
Non-Inverting Small Signal Pulse Response  
TIME (10 ms/DIV)  
TIME (10 ms/DIV)  
Figure 19.  
Figure 20.  
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Typical Performance Characteristics (continued)  
Unless otherwise specified, V+ 3.3V, TJ = 25°C.  
Open Loop Frequency  
vs.  
RL  
Open Loop Frequency Response over Temperature  
180  
160  
140  
120  
100  
80  
203  
180  
203  
180  
158  
135  
113  
90  
V
±1.65V  
= 10 kW  
= 20 pF  
TEMP = 25°C  
S
180  
158  
135  
113  
90  
160  
R
V
= ±1.65V  
= 20 pF  
L
L
S
140  
120  
100  
80  
C
C
L
PHASE  
PHASE  
-40°C  
R
L
= 10 MW  
60  
68  
60  
68  
85°C  
R
= 10 kW  
L
GAIN  
40  
45  
40  
45  
GAIN  
25°C  
R
= 600W  
L
R
= 600W  
L
20  
23  
20  
23  
R
= 10 kW  
L
0
0
0
0
-40°C, 25°C, 85°C  
10k 100k  
R
= 10 MW  
L
-23  
10M  
-20  
1k  
-23  
10M  
-20  
1k  
1M  
10k  
100k  
1M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 21.  
Figure 22.  
Open Loop Frequency Response  
Open Loop Frequency Response  
vs.  
CL  
vs.  
CL  
180  
160  
140  
120  
100  
80  
180  
160  
140  
120  
100  
80  
203  
203  
C
= 20 pF, 50 pF, 100 pF, 200 pF,  
C = 20 pF, 50 pF, 100 pF, 200 pF,  
L
500 pF, 1000 pF  
L
180  
158  
135  
113  
90  
180  
158  
135  
113  
90  
500 pF, 1000 pF  
PHASE  
PHASE  
C
L
= 20 pF  
C
L
= 20 pF  
60  
60  
68  
68  
GAIN  
GAIN  
40  
40  
45  
45  
TEMP = 25°C  
TEMP = 25°C  
20  
20  
23  
23  
V
= ±1.65V  
S
V
= ±1.65V  
S
0
0
0
0
R
L
= 10 kW  
C
= 1000 pF  
L
R
L
= 600W  
C
= 1000 pF  
L
-23  
10M  
-20  
-20  
-23  
10M  
1k  
10k  
100k  
1M  
1k  
10k  
100k  
1M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
Figure 23.  
Figure 24.  
Voltage Noise  
vs.  
Frequency  
1000  
100  
10  
12.8 (nV/ Hz)  
1
1
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
Figure 25.  
8
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APPLICATION INFORMATION  
With the low supply current of only 1.6 mA, the LMV716 offers users the ability to maximize battery life. This  
makes the LMV716 ideal for battery powered systems. The LMV716’s rail-to-rail output swing provides the  
maximum possible dynamic range at the output. This is particularly important when operating on low supply  
voltages.  
CAPACITIVE LOAD TOLERANCE  
The LMV716, when in a unity-gain configuration, can directly drive large capacitive loads in unity-gain without  
oscillation. The unity-gain follower is the most sensitive configuration to capacitive loading; direct capacitive  
loading reduces the phase margin of amplifiers. The combination of the amplifier’s output impedance and the  
capacitive load induces phase lag. This results in either an underdamped pulse response or oscillation. To drive  
a heavier capacitive load, the circuit in Figure 26 can be used.  
Figure 26. Indirectly Driving a Capacitive Load using Resistive Isolation  
In Figure 26, the isolation resistor RISO and the load capacitor CL form a pole to increase stability by adding more  
phase margin to the overall system. The desired performance depends on the value of RISO. The bigger the RISO  
resistor value, the more stable VOUT will be.  
The circuit in Figure 27 is an improvement to the one in Figure 26 because it provides DC accuracy as well as  
AC stability. If there were a load resistor in Figure 26, the output would be voltage divided by RISO and the load  
resistor. Instead, in Figure 27, RF provides the DC accuracy by using feed-forward techniques to connect VIN to  
RL. Due to the input bias current of the LMV716, the designer must be cautious when choosing the value of RF.  
CF and RISO serve to counteract the loss of phase margin by feeding the high frequency component of the output  
signal back to the amplifier’s inverting input, thereby preserving phase margin in the overall feedback loop.  
Increased capacitive drive is possible by increasing the value of CF. This in turn will slow down the pulse  
response.  
Figure 27. Indirectly Driving a Capacitive Load with DC Accuracy  
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DIFFERENCE AMPLIFIER  
The difference amplifier allows the subtraction of two voltages or, as a special case, the cancellation of a signal  
common to two inputs. It is useful as a computational amplifier in making a differential to single-ended conversion  
or in rejecting a common mode signal.  
Figure 28. Difference Amplifier  
(1)  
SINGLE-SUPPLY INVERTING AMPLIFIER  
There may be cases where the input signal going into the amplifier is negative. Because the amplifier is  
operating in single supply voltage, a voltage divider using R3 and R4 is implemented to bias the amplifier so the  
inverting input signal is within the input common voltage range of the amplifier. The capacitor C1 is placed  
between the inverting input and resistor R1 to block the DC signal going into the AC signal source, VIN. The  
values of R1 and C1 affect the cutoff frequency, fc = ½π R1C1. As a result, the output signal is centered around  
mid-supply (if the voltage divider provides V+/2 at the non-inverting input). The output can swing to both rails,  
maximizing the signal-to-noise ratio in a low voltage system.  
Figure 29. Single-supply Inverting Amplifier  
(2)  
INSTRUMENTATION AMPLIFIER  
Measurement of very small signals with an amplifier requires close attention to the input impedance of the  
amplifier, the overall signal gain from both inputs to the output, as well as, the gain from each input to the output.  
This is because we are only interested in the difference of the two inputs and the common signal is considered  
noise. A classic solution is an instrumentation amplifier. Instrumentation amplifiers have a finite, accurate, and  
stable gain. Also they have extremely high input impedances and very low output impedances. Finally they have  
an extremely high CMRR so that the amplifier can only respond to the differential signal.  
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Three-Op-Amp Instrumentation Amplifier  
A typical instrumentation amplifier is shown in Figure 30.  
V
1
V
R
+
-
KR  
2
01  
2
R
1
-
R
a
1
R
=
11  
V
OUT  
+
R
1
-
V
02  
R
V
2
KR  
2
2
+
Figure 30. Three-Op-Amp Instrumentation Amplifier  
There are two stages in this configuration. The last stage, the output stage, is a differential amplifier. In an ideal  
case the two amplifiers of the first stage, the input stage, would be set up as buffers to isolate the inputs.  
However they cannot be connected as followers due to the mismatch of real amplifiers. The circuit in Figure 30  
utilizes a balancing resistor between the two amplifiers to compensate for this mismatch. The product of the two  
stages of gain will be the gain of the instrumentation amplifier circuit. Ideally, the CMRR should be infinite.  
However the output stage has a small non-zero common mode gain which results from resistor mismatch.  
In the input stage of the circuit, current is the same across all resistors. This is due to the high input impedance  
and low input bias current of the LMV716. With the node equations we have:  
GIVEN: I  
= I  
R
1
R
11  
(3)  
By Ohm’s Law:  
R
R
V
- V = (2R +  
1
) I  
11  
O1  
O2  
R
11  
ñ I  
= (2a + 1)  
11  
R
11  
= (2a + 1) V  
R
11  
(4)  
However:  
V
R
11  
= V - V  
1 2  
(5)  
(6)  
So we have:  
Now looking at the output of the instrumentation amplifier:  
KR  
2
V
=
(V - V  
)
O1  
O
O2  
R
2
= -K (V - V  
)
O2  
O1  
(7)  
Substituting from Equation 6:  
V
O
= -K (2a + 1) (V - V )  
1 2  
(8)  
11  
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This shows the gain of the instrumentation amplifier to be:  
K(2a+1)  
(9)  
Typical values for this circuit can be obtained by setting: a = 12 and K = 4. This results in an overall gain of 100.  
Three LMV716 amplifiers are used along with 1% resistors to minimize resistor mismatch. Resistors used to build  
the circuit are: R1 = 21.6 k, R11 = 1.8 k, R2 = 2.5 kwith K = 40 and a = 12. This results in an overall gain of  
K(2a+1) = 1000.  
Two-Op-Amp Instrumentation Amplifier  
A two-op-amp instrumentation amplifier can also be used to make a high-input impedance DC differential  
amplifier Figure 31). As in the three op amp circuit, this instrumentation amplifier requires precise resistor  
matching for good CMRR. R4 should be equal to R1, and R3 should equal R2.  
Figure 31. Two-Op-Amp Instrumentation Amplifier  
(10)  
ACTIVE FILTERS  
Active filters are circuits with amplifiers, resistors, and capacitors. The use of amplifiers instead of inductors,  
which are used in passive filters, enhances the circuit performance while reducing the size and complexity of the  
filter. The simplest active filters are designed using an inverting op amp configuration where at least one reactive  
element has been added to the configuration. This means that the op amp will provide "frequency-dependent"  
amplification, since reactive elements are frequency dependent devices.  
Low Pass Filter  
The following shows a very simple low pass filter.  
C
R
R
2
1
V
i
-
V
OUT  
+
Figure 32. Low Pass Filter  
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The transfer function can be expressed as follows:  
By KCL:  
-V  
V
V
i
O
O
-
-
= O  
R
1
R
1
2
jwc  
(11)  
(12)  
(13)  
Simplifying this further results in:  
-R  
2
1
V
V
=
i
O
R
jwcR +1  
2
1
or  
V
-R  
R
O
2
1
=
V
jwcR +1  
2
i
1
Now, substituting ω=2πf, so that the calculations are in f(Hz) rather than in ω(rad/s), and setting the DC gain  
-
R
V
O
2
= H  
O
H =  
R
1
V
i
and  
1
H = H  
O
j2pfcR +1  
2
(14)  
1
fO =  
2pR1C  
set:  
1
H = H  
O
1 + j (f/f )  
o
(15)  
Low pass filters are known as lossy integrators because they only behave as integrators at higher frequencies.  
The general form of the bode plot can be predicted just by looking at the transfer function. When the f/fO ratio is  
small, the capacitor is, in effect, an open circuit and the amplifier behaves at a set DC gain. Starting at fO, which  
is the 3 dB corner, the capacitor will have the dominant impedance and hence the circuit will behave as an  
integrator and the signal will be attenuated and eventually cut. The bode plot for this filter is shown in Figure 33.  
dB  
|H|  
|H  
|
O
-20dB/dec  
0
f = f  
o
f (Hz)  
Figure 33. Low Pass Filter Transfer Function  
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High Pass Filter  
The transfer function of a high pass filter can be derived in much the same way as the previous example. A  
typical first order high pass filter is shown below:  
C
R
1
R
2
V
i
-
V
OUT  
+
Figure 34. High Pass Filter  
Writing the KCL for this circuit :  
(V1 denotes the voltage between C and R1)  
-
V
- V  
V
1 -  
V
i
1
=
1
R
1
jwC  
(16)  
(17)  
-
V- + V  
V + V  
O
1
=
R
2
R
1
Solving these two equations to find the transfer function and using:  
1
fO =  
2pR1C  
(18)  
V
-R  
O
2
H =  
H
=
O
R
1
V
i
(high frequency gain)  
Which gives:  
and  
j (f/f )  
o
H = H  
O
1 + j (f/f )  
o
(19)  
Looking at the transfer function, it is clear that when f/fO is small, the capacitor is open and therefore, no signal is  
getting to the amplifier. As the frequency increases the amplifier starts operating. At f = fO the capacitor behaves  
like a short circuit and the amplifier will have a constant, high frequency gain of HO. Figure 35 shows the transfer  
function of this high pass filter.  
|H|  
|H  
dB  
|
O
-20dB/dec  
0
f = f  
f (Hz)  
o
Figure 35. High Pass Filter Transfer Function  
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Band Pass Filter  
Combining a low pass filter and a high pass filter will generate a band pass filter. Figure 36 offers an example of  
this type of circuit.  
C
2
R
C
R
1
2
1
V
i
-
V
OUT  
+
Figure 36. Band Pass Filter  
In this network the input impedance forms the high pass filter while the feedback impedance forms the low pass  
filter. If the designer chooses the corner frequencies so that f1 < f2, then all the frequencies between, f1 f f2,  
will pass through the filter while frequencies below f1 and above f2 will be cut off.  
The transfer function can be easily calculated using the same methodology as before and is shown in Figure 37.  
j (f/f )  
1
H = H  
O
[1 + j (f/f )] [1 + j (f/f )]  
1
2
(20)  
Where  
1
f
=
=
1
2pR C  
1
1
2
1
f
2
2pR C  
2
-R  
R
2
H
=
O
1
(21)  
|H  
|
dB  
|H  
O
|
-20dB/dec  
20dB/dec  
0
f
f
2
f (Hz)  
1
Figure 37. Band Pass Filter Transfer Function  
STATE VARIABLE ACTIVE FILTER  
State variable active filters are circuits that can simultaneously represent high pass, band pass, and low pass  
filters. The state variable active filter uses three separate amplifiers to achieve this task. A typical state variable  
active filter is shown in Figure 38. The first amplifier in the circuit is connected as a gain stage. The second and  
third amplifiers are connected as integrators, which means they behave as low pass filters. The feedback path  
from the output of the third amplifier to the first amplifier enables this low frequency signal to be fed back with a  
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finite and fairly low closed loop gain. This is while the high frequency signal on the input is still gained up by the  
open loop gain of the first amplifier. This makes the first amplifier a high pass filter. The high pass signal is then  
fed into a low pass filter. The outcome is a band pass signal, meaning the second amplifier is a band pass filter.  
This signal is then fed into the third amplifiers input and so, the third amplifier behaves as a simple low pass  
filter.  
R
4
R
1
C
2
C
3
-
R
2
A
-
1
R
5
R
V
IN  
3
V
HP  
-
+
A
2
V
BP  
A
3
+
V
LP  
+
R
6
Figure 38. State Variable Active Filter  
The transfer function of each filter needs to be calculated. The derivations will be more trivial if each stage of the  
filter is shown on its own.  
The three components are:  
R
4
R
1
V
O
-
R
A
5
1
V
IN  
V
O1  
+
R
6
V
O2  
C
2
R
2
V
O1  
-
A
V
O2  
2
+
C
3
3
R
3
V
O2  
-
V
A
O
+
For A1 the relationship between input and output is:  
-R  
R
R
5
R
1
+ R  
R + R  
1 4  
4
6
4
V
O2  
V
O1  
=
+
V
IN  
+
V
0
R
R + R  
5 6  
R1  
R
+ R  
R
1
5
6
1
(22)  
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This relationship depends on the output of all the filters. The input-output relationship for A2 can be expressed  
as:  
-1  
V
O2  
=
V
O1  
s C R  
2
2
(23)  
And finally this relationship for A3 is as follows:  
-1  
V
O
=
V
O2  
s C R  
3
3
(24)  
Re-arranging these equations, one can find the relationship between VO and VIN (transfer function of the low  
pass filter), VO1 and VIN (transfer function of the high pass filter), and VO2 and VIN (transfer function of the band  
pass filter) These relationships are as follows:  
Low Pass Filter  
R + R  
R
6
1
4
1
R
1
R + R C C R R  
5
6
2
3
2
3
V
O
=
V
IN  
R + R  
R
1
4
5
1
1
2
s
+ s  
+
C R  
2
R + R  
5
R
1
C C R R  
2 3 2  
2
6
3
(25)  
(26)  
High Pass Filter  
R + R  
R
6
1
4
2
s
R
R + R  
5
1
6
V
O1  
=
V
IN  
R + R  
R
1
4
5
1
1
2
s
+ s  
+
C R  
2
R + R  
5
R
1
C C R R  
2 3 2  
2
6
3
(27)  
Band Pass Filter  
R + R  
1
R
4
6
1
s
C R  
2
R
1
R + R  
5 6  
2
V
O2  
=
V
IN  
R + R  
R
1
4
5
1
1
2
s
+ s  
+
C R  
2
R + R  
5
R
1
C C R R  
2 3 2  
2
6
3
(28)  
The center frequency and Quality Factor for all of these filters is the same. The values can be calculated in the  
following manner:  
1
w
c
=
C C R R  
3 2 3  
2
and  
C R  
R
5
+ R  
R
1
2
2
3
6
Q =  
C R  
3
R
6
R + R  
1 4  
(29)  
Designing a band pass filter with a center frequency of 10 kHz and Quality Factor of 5.5  
To do this, first consider the Quality Factor. It is best to pick convenient values for the capacitors. C2 = C3 = 1000  
pF. Also, choose R1 = R4 = 30 k. Now values of R5 and R6 need to be calculated. With the chosen values for  
the capacitors and resistors, Q reduces to:  
R
5
+ R  
6
11  
2
1
2
Q =  
=
R
6
(30)  
17  
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or  
R5 = 10R6 R6 = 1.5 kR5 = 15 kΩ  
(31)  
Also, for f = 10 kHz, the center frequency is ωc = 2πf = 62.8 kHz.  
Using the expressions above, the appropriate resistor values will be R2 = R3 = 16 k.  
The DC gain of this circuit is:  
R
1
+ R  
R
6
4
DC GAIN =  
= -14.8 dB  
R
R + R  
5 6  
1
(32)  
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SNOSAT9B APRIL 2006REVISED MARCH 2013  
REVISION HISTORY  
Changes from Revision A (March 2013) to Revision B  
Page  
Changed layout of National Data Sheet to TI format .......................................................................................................... 18  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
LMV716MM/NOPB  
ACTIVE  
VSSOP  
DGK  
8
1000 RoHS & Green  
SN  
Level-1-260C-UNLIM  
-40 to 85  
AR3A  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
29-Oct-2021  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
LMV716MM/NOPB  
VSSOP  
DGK  
8
1000  
178.0  
12.4  
5.3  
3.4  
1.4  
8.0  
12.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
29-Oct-2021  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
VSSOP DGK  
SPQ  
Length (mm) Width (mm) Height (mm)  
208.0 191.0 35.0  
LMV716MM/NOPB  
8
1000  
Pack Materials-Page 2  
IMPORTANT NOTICE AND DISCLAIMER  
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE  
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”  
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY  
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD  
PARTY INTELLECTUAL PROPERTY RIGHTS.  
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate  
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable  
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These resources are subject to change without notice. TI grants you permission to use these resources only for development of an  
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