LMV7235M5 [TI]
LMV7235/LMV7239/LMV7239Q 75 nsec, Ultra Low Power, Low Voltage, Rail-to-Rail Input Comparator with Open-Drain/Push-Pull Output; LMV7235 / LMV7239 / LMV7239Q 75纳秒，超低功耗，低电压轨至轨输入比较器具有漏极开路/推挽输出
| 型号： | LMV7235M5 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LMV7235/LMV7239/LMV7239Q 75 nsec, Ultra Low Power, Low Voltage, Rail-to-Rail Input Comparator with Open-Drain/Push-Pull Output |
| 文件： | 总22页 (文件大小：996K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LMV7235, LMV7239
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SNOS532M –SEPTEMBER 2000–REVISED FEBRUARY 2013
LMV7235/LMV7239/LMV7239Q 75 nsec, Ultra Low Power, Low Voltage, Rail-to-Rail Input
Comparator with Open-Drain/Push-Pull Output
Check for Samples: LMV7235, LMV7239
1
FEATURES
DESCRIPTION
The LMV7235/LMV7239/LMV7239Q are ultra low
power, low voltage, 75 nsec comparators. They are
guaranteed to operate over the full supply voltage
range of 2.7V to 5.5V. These devices achieve a 75
nsec propagation delay while consuming only 65µA
of supply current at 5V.
2
•
(VS = 5V, TA = 25°C
•
•
•
•
•
•
Typical values unless otherwise specified)
Propagation delay 75 nsec
Low supply current 65µA
Rail-to-Rail input
The LMV7235/LMV7239/LMV7239Q have a greater
than rail-to-rail common mode voltage range. The
input common mode voltage range extends 200mV
below ground and 200mV above supply, allowing
both ground and supply sensing.
Open drain and push-pull output
Ideal for 2.7V and 5V single supply
applications
•
Available in space saving packages
–
–
5-pin SOT-23
5-pin SC70
The LMV7235 features an open drain output. By
connecting an external resistor, the output of the
comparator can be used as a level shifter.
•
LMV7239Q is an automotive grade product
that is AECQ grade 1 qualified and is
manufactured on an automotive grade flow.
The LMV7239/LMV7239Q features a push-pull output
stage. This feature allows operation without the need
of an external pull-up resistor.
APPLICATIONS
The LMV7235/LMV7239/LMV7239Q are available in
the 5-Pin SC70 and 5-Pin SOT-23 packages, which
are ideal for systems where small size and low power
is critical.
•
•
•
•
•
•
•
•
Portable and battery powered systems
Scanners
Set top boxes
High speed differential line receiver
Window comparators
Zero-crossing detectors
High speed sampling circuits
Automotive
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2013, Texas Instruments Incorporated
LMV7235, LMV7239
SNOS532M –SEPTEMBER 2000–REVISED FEBRUARY 2013
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Typical Application
VCC
100K
100K
Crystal
VOUT
100K
0.1uF
Figure 1. Crystal Oscillator
Connection Diagram
1
2
3
5
VOUT
V+
SC70
SOT-23
V-
4
Non-Inverting
Input
Inverting
Input
Figure 2. 5-Pin SC70/SOT-23 (Top View)
Simplified Schematic
2
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1)(2)
Absolute Maximum Ratings
ESD Tolerance
(3)
Human Model Body
1000V
100V
Machine Body
Differential Input Voltage
Output Short Circuit Duration
Supply Voltage (V+ - V−)
Soldering Information
± Supply Voltage
(4)
6V
Infrared or Convection (20 sec)
Wave Soldering (10 sec)
Voltage at Input/Output Pins
235°C
260°C (lead temp)
(V+) +0.3V, (V−) −0.3V
±10mA
(5)
Current at Input Pin
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test
conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for
availability and specifications.
(3) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of
JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
(4) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30mA over long term may adversely
affect reliability.
(5) Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.
Operating Ratings
Supply Voltages (V+ - V−)
2.7V to 5.5V
(1)
Temperature Range
LMV7235/LMV7239
LMV7239Q
−40°C to +85°C
−40°C to +125°C
−65°C to +150°C
Storage Temperature Range
Package Thermal Resistance
5-Pin SC70
478°C/W
265°C/W
5-Pin SOT-23
(1) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) – TA) / θJA. All numbers apply for packages soldered directly onto a PC Board.
2.7V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TA = 25°C, VCM = V+/2, V+ = 2.7V, V− = 0V−. Boldface limits apply at the
temperature extremes.
(1)
(2)
(1)
Symbol
Parameter
Conditions
Min
Typ
0.8
Max
Units
6
8
VOS
Input Offset Voltage
mV
30
5
400
600
IB
Input Bias Current
Input Offset Current
nA
nA
200
400
IOS
(1) All limits are guaranteed by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
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2.7V Electrical Characteristics (continued)
Unless otherwise specified, all limits guaranteed for TA = 25°C, VCM = V+/2, V+ = 2.7V, V− = 0V−. Boldface limits apply at the
temperature extremes.
(1)
(2)
(1)
Symbol
Parameter
Conditions
Min
52
65
Typ
62
85
Max
Units
0V < VCM < 2.7V
CMRR
Common Mode Rejection Ratio
dB
(3)
PSRR
VCM
Power Supply Rejection Ratio
V+ = 2.7V to 5V
CMRR > 50dB
dB
V
Input Common-Mode Voltage Range
V− −0.1V−
−0.2 to 2.9
V+ −0.26
V+ +0.1V+
IL = 4mA,
V+ −0.35
V
V
VID = 500mV
Output Swing High
(LMV7239 only)
IL = 0.4mA,
VID = 500mV
V+ −0.02
VO
IL = −4mA,
230
350
mV
mV
VID = −500mV
450
Output Swing Low
(LMV7235/LMV7239/LMV7239Q)
IL = −0.4mA,
VID = −500mV
15
15
Sourcing, VO = 0V
(LMV7239 only)
mA
(4)
ISC
Output Short Circuit Current
Supply Current
Sinking, VO = 2.7V
(LMV7235, RL = 10k)
20
52
mA
µA
ns
(4)
85
100
IS
No load
Overdrive = 20mV
CLOAD = 15pF
96
87
85
(5)
Overdrive = 50mV
tPD
Propagation Delay
CLOAD = 15pF
ns
ns
(5)
Overdrive = 100mV
CLOAD = 15pF
(5)
Propagation Delay Skew
(LMV7239 only)
Overdrive = 20mV
tSKEW
2
ns
ns
(6)
LMV7239/LMV7239Q
10% to 90%
1.7
tr
Output Rise Time
LMV7235
10% to 90%
112
ns
(5)
tf
Output Fall Time
90% to 10%
1.7
3
ns
Output Leakage Current
(LMV7235 only)
ILEAKAGE
nA
(3) CMRR is not linear over the common mode range. Limits are guaranteed over the worst case from 0 to VCC/2 or VCC/2 to VCC
.
(4) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30mA over long term may adversely
affect reliability.
(5) A 10k pull-up resistor was used when measuring the LMV7235. The rise time of the LMV7235 is a function of the R-C time constant.
(6) Propagation Delay Skew is defined as the absolute value of the difference between tPDLH and tPDHL
.
4
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5V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TA = 25°C, VCM = V+/2, V+ = 5V, V− = 0V. Boldface limits apply at the
temperature extremes.
(1)
(2)
(1)
Symbol
Parameter
Conditions
Min
Typ
Limits
Units
1
6
8
VOS
Input Offset Voltage
mV
30
400
600
IB
Input Bias Current
Input Offset Current
nA
nA
5
200
400
IOS
CMRR
PSRR
VCM
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Common-Mode Voltage Range
0V < VCM < 5V
V+ = 2.7V to 5V
52
65
67
85
dB
dB
V
CMRR > 50dB
V− −0.1V−
−0.2 to 5.2
V+ −0.15
V+ +0.1V+
IL = 4mA,
VID = 500mV
V+ −0.25
V
V
Output Swing High
(LMV7239 only)
IL = 0.4mA,
VID = 500mV
V+ −0.01
VO
IL = −4mA,
VID = −500mV
230
350
450
mV
mV
Output Swing Low
(LMV7235/LMV7239/LMV7239Q)
IL = −0.4mA,
VID = −500mV
10
55
Sourcing, VO = 0V
25
(LMV7239 only)
15
mA
(3)
ISC
Output Short Circuit Current
Supply Current
Sinking, VO = 5V
30
20
60
65
89
82
75
(LMV7235, RL = 10k)
mA
µA
ns
(3)
95
110
IS
No load
Overdrive = 20mV
CLOAD = 15pF
(4)
Overdrive = 50mV
tPD
Propagation Delay
CLOAD = 15pF
ns
ns
(4)
Overdrive = 100mV
CLOAD = 15pF
(4)
Propagation Delay Skew
(LMV7239 only)
Overdrive = 20mV
tSKEW
1
ns
ns
(5)
LMV7239
10% to 90%
1.2
tr
Output Rise Time
Output Fall Time
LMV7235
10% to 90%
100
ns
(4)
tf
90% to 10%
1.2
3
ns
Output Leakeage Current
(LMV7235 only)
ILEAKAGE
nA
(1) All limits are guaranteed by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
(3) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30mA over long term may adversely
affect reliability.
(4) A 10k pull-up resistor was used when measuring the LMV7235. The rise time of the LMV7235 is a function of the R-C time constant.
(5) Propagation Delay Skew is defined as the absolute value of the difference between tPDLH and tPDHL
.
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TYPICAL PERFORMANCE CHARACTERISTICS
(Unless otherwise specified, VS = 5V, CL = 10pF, TA = 25°C).
Supply Current vs. Supply Voltage
Sourcing Current vs. Output Voltage
100
10
1
120
100
80
60
40
20
0
-40°C
25°C
V
= 5V
S
85°C
125°C
.1
0
1
2
3
4
5
.01
.1
1
10
SUPPLY VOLTAGE (V)
OUTPUT VOLTAGE REFERENCED TO V+ (V)
Figure 3.
Figure 4.
Sourcing Current vs. Output Voltage
Sinking Current vs. Output Voltage
100
10
1
100
10
1
V
= 2.7V
V
= 5V
S
S
.1
.1
.01
.1
1
10
.01
.1
1
10
OUTPUT VOLTAGE REFERENCED TO V+ (V)
OUTPUT VOLTAGE REFERENCED TO GND (V)
Figure 5.
Figure 6.
6
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SNOS532M –SEPTEMBER 2000–REVISED FEBRUARY 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
(Unless otherwise specified, VS = 5V, CL = 10pF, TA = 25°C).
Sinking Current vs. Output Voltage
Input Bias Current vs. Input Voltage
50
100
40
V
= 2.7V
S
VS = 5V
30
IBIAS+
20
10
10
1
0
-10
-20
-30
-40
-50
IBIAS
-
.1
-0.2
1
2
3
4
5
.01
.1
1
10
OUTPUT VOLTAGE REFERENCED TO GND (V)
VIN (V)
Figure 8.
Propagation Delay vs. Temperature
Figure 7.
Input Bias Current vs. Input Voltage
70
60
160
150
140
130
120
110
100
90
V =2.7V
S
V
=20mV
VS = 2.7V
50
40
30
20
10
0
OD
C
=15pF
LOAD
IBIAS
+
Falling Edge
-10
-20
-30
-40
IBIAS
-
Rising Edge
20 40 60 80 100 120 140
-50
-60
80
2
0
1
2.7
-40 -20
0
TEMPERATURE (°C)
VIN (V)
Figure 9.
Figure 10.
Propagation Delay vs. Temperature
Propagation Delay vs. Capacitive Load
106
140
130
120
110
100
90
V =5V
S
V = 2.7V
S
V
=20mV
OD
V
=20mV
OD
104
102
100
98
C
LOAD
=15pF
Falling Edge
Falling Edge
96
Rising Edge
Rising Edge
20 40 60 80 100 120 140
80
94
-40 -20
0
0
20
40
60
80
100
TEMPERATURE (°C)
CAPACITANCE (pF)
Figure 11.
Figure 12.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
(Unless otherwise specified, VS = 5V, CL = 10pF, TA = 25°C).
Propagation Delay vs. Capacitive Load
Propagation Delay vs. Input Overdrive
100
96
V = 2.7V
LOAD
V = 5V
S
S
C
=15pF
V
=20mV
OD
94
92
90
88
95
90
85
80
Rising Edge
Falling Edge
Rising Edge
Falling Edge
0
20
40
60
80
100
20 30 40 50 60 70 80 90 100
INPUT OVERDRIVE (mV)
CAPACITANCE (pF)
Figure 13.
Figure 14.
Propagation Delay vs. Input Overdrive
90
Propagation Delay vs. Common Mode Voltage
120
V = 2.7V
S
V = 5V
S
115
110
105
100
95
V
=20mV
C
=15pF
OD
LOAD
C
LOAD
=15pF
85
80
75
70
Rising Edge
90
Falling Edge
85
Rising Edge
Falling Edge
80
20
40
60
80
100
0.0
0.5
1.0
1.5
2.0
2.5
3.0
INPUT OVERDRIVE (mV)
INPUT COMMON MODE VOLTAGE (V)
Figure 15.
Figure 16.
Propagation Delay vs. Common Mode Voltage
110
V = 5V
S
V
=20mV
OD
C
LOAD
=15pF
100
90
Falling Edge
Rising Edge
80
0
1
2
3
4
5
INPUT COMMON MODE VOLTAGE (V)
Figure 17.
8
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SNOS532M –SEPTEMBER 2000–REVISED FEBRUARY 2013
APPLICATION INFORMATION
The LMV7235/LMV7239/LMV7239Q are single supply comparators with 75ns of propagation delay and only
65µA of supply current.
The LMV7235/LMV7239/LMV7239Q are rail-to-rail input and output. The typical input common mode voltage
range of −0.2V below the ground to 0.2V above the supply. The LMV7235/LMV7239/LMV7239Q use a
complimentary PNP and NPN input stage in which the PNP stage senses common mode voltage near V− and the
NPN stage senses common mode voltage near V+. If either of the input signals falls below the negative common
mode limit, the parasitic PN junction formed by the substrate and the base of the PNP will turn on resulting in an
increase of input bias current.
If one of the input goes above the positive common mode limit, the output will still maintain the correct logic level
as long as the other input stays within the common mode range. However, the propagation delay will increase.
When both inputs are outside the common mode voltage range, current saturation occurs in the input stage, and
the output becomes unpredictable.
The propagation delay does not increase significantly with large differential input voltages. However, large
differential voltages greater than the supply voltage should be avoided to prevent damage to the input stage.
The LMV7239 has a push-pull output. When the output switches, there is a direct path between VCC and ground,
causing high output sinking or sourcing current during the transition. After the transition, the output current
decreases and the supply current settles back to about 65µA at 5V, thus conserving power consumption.
The LMV7235 has an open drain that requires a pull-up resistor to a positive supply voltage for the output to
switch properly. When the internal output transistor is off, the output voltage will be pulled up to the external
positive voltage.
CIRCUIT LAYOUT AND BYPASSING
The LMV7235/LMV7239/LMV7239Q require high speed layout. Follow these layout guidelines:
1. Use printed circuit board with a good, unbroken low-inductance ground plane.
2. Place a decoupling capacitor (0.1µF ceramic surface mount capacitor) as close as possible to VCC pin.
3. On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback
around the comparator. Keep inputs away from output.
4. Solder the device directly to the printed circuit board rather than using a socket.
5. For slow moving input signals, take care to prevent parasitic feedback. A small capacitor (1000pF or less)
placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some
degradation to tPD when the source impedance is low.
6. The topside ground plane runs between the output and inputs.
7. Ground trace from the ground pin runs under the device up to the bypass capacitor, shielding the inputs from
the outputs.
COMPARATOR WITH HYSTERESIS
The basic comparator configuration may oscillate or produce a noisy output if the applied differential input
voltage is near the comparator's offset voltage. This usually happens when the input signal is moving very slowly
across the comparator's switching threshold. This problem can be prevented by the addition of hysteresis or
positive feedback.
INVERTING COMPARATOR WITH HYSTERESIS
The inverting comparator with hysteresis requires a three resistor network that is referenced to the supply voltage
VCC of the comparator, as shown in Figure 18. When VIN at the inverting input is less than VA, the voltage at the
non-inverting node of the comparator (VIN < VA), the output voltage is high (for simplicity assume VO switches as
high as VCC). The three network resistors can be represented as R1||R3 in series with R2. The lower input trip
voltage VA1 is defined as:
VA1 = VCCR2 / [(R1||R3) + R2]
(1)
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When VIN is greater than VA (VIN > VA), the output voltage is low, very close to ground. In this case the three
network resistors can be presented as R2 || R3 in series with R1. The upper trip voltage VA2 is defined as:
VA2 = VCC (R2||R3) / [(R1)+ (R2||R3)]
(2)
The total hysteresis provided by the network is defined as:
Delta VA = VA1- VA2
(3)
To assure that the comparator will always switch fully to VCC and not be pulled down by the load the resistors,
values should be chosen as follows:
RPULL-UP << RLOAD
(4)
Figure 18. Inverting Comparator with Hysteresis
NON-INVERTING COMPARATOR WITH HYSTERESIS
A non inverting comparator with hysteresis requires a two resistor network, and a voltage reference (VREF) at the
inverting input. When VIN is low, the output is also low. For the output to switch from low to high, VIN must rise up
to VIN1 where VIN1 is calculated by:
VIN1 = R1*(VREF / R2) + VREF
(5)
When VIN is high, the output is also high, to make the comparator switch back to it's low state, VIN must equal
VREF before VA will again equal VREF. VIN can be calculated by:
VIN2 = [VREF (R1+ R2) - VCC R1] / R2
(6)
The hysteresis of this circuit is the difference between VIN1 and VIN2
.
Delta VIN = VCC R1 / R2
(7)
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Figure 19. Non-Inverting Comparator with Hysteresis
ZERO-CROSSING DETECTOR
The inverting input is connected to ground and the non-inverting input is connected to 100mVp-p signal. As the
signal at the non-inverting input crosses 0V, the comparator's output changes state.
+
OUT
-
Figure 20. Zero-Crossing Detector
THRESHOLD DETECTOR
Instead of tying the inverting input to 0V, the inverting input can be tied to a reference voltage. The non-inverting
input is connected to the input. As the input passes the VREF threshold, the comparator's output changes state.
Figure 21. Threshold Detector
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CRYSTAL OSCILLATOR
A simple crystal oscillator using the LMV7239 is shown below. Resistors R1 and R2 set the bias point at the
comparator's non-inverting input. Resistors R3, R4 and C1 sets the inverting input node at an appropriate DC
average level based on the output. The crystal's path provides resonant positive feedback and stable oscillation
occurs. The output duty cycle for this circuit is roughly 50%, but it is affected by resistor tolerances and to a
lesser extent by the comparator offset.
Figure 22. Crystal Oscillator
IR RECEIVER
The LMV7239 is an ideal candidate to be used as an infrared receiver. The infrared photo diode creates a
current relative to the amount of infrared light present. The current creates a voltage across RD. When this
voltage level cross the voltage applied by the voltage divider to the inverting input, the output transitions.
Figure 23. IR Receiver
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REVISION HISTORY
Changes from Revision L (February 2013) to Revision M
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 12
Copyright © 2000–2013, Texas Instruments Incorporated
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Product Folder Links: LMV7235 LMV7239
PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
1000
1000
(1)
(2)
(6)
(3)
(4/5)
LMV7235M5
NRND
ACTIVE
SOT-23
SOT-23
DBV
5
5
TBD
Call TI
CU SN
Call TI
-40 to 85
-40 to 85
C21A
C21A
LMV7235M5/NOPB
DBV
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV7235M5X
NRND
SOT-23
SOT-23
DBV
DBV
5
5
3000
3000
TBD
Call TI
CU SN
Call TI
-40 to 85
-40 to 85
C21A
C21A
LMV7235M5X/NOPB
ACTIVE
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV7235M7
NRND
SC70
SC70
DCK
DCK
5
5
1000
1000
TBD
Call TI
CU SN
Call TI
-40 to 85
-40 to 85
C21
C21
LMV7235M7/NOPB
ACTIVE
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV7235M7X
NRND
SC70
SC70
DCK
DCK
5
5
3000
3000
TBD
Call TI
CU SN
Call TI
-40 to 85
-40 to 85
C21
C21
LMV7235M7X/NOPB
ACTIVE
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV7239M5
NRND
SOT-23
SOT-23
DBV
DBV
5
5
1000
1000
TBD
Call TI
CU SN
Call TI
-40 to 85
-40 to 85
C20A
C20A
LMV7239M5/NOPB
ACTIVE
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV7239M5X
NRND
SOT-23
SOT-23
DBV
DBV
5
5
3000
3000
TBD
Call TI
CU SN
Call TI
-40 to 85
-40 to 85
C20A
C20A
LMV7239M5X/NOPB
ACTIVE
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV7239M7
NRND
SC70
SC70
DCK
DCK
5
5
1000
1000
TBD
Call TI
CU SN
Call TI
-40 to 85
-40 to 85
C20
C20
LMV7239M7/NOPB
ACTIVE
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV7239M7X
NRND
SC70
SC70
DCK
DCK
5
5
3000
3000
TBD
Call TI
CU SN
Call TI
-40 to 85
-40 to 85
C20
C20
LMV7239M7X/NOPB
ACTIVE
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LMV7239QM7/NOPB
LMV7239QM7X/NOPB
ACTIVE
ACTIVE
SC70
SC70
DCK
DCK
5
5
1000
3000
Green (RoHS
& no Sb/Br)
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
C42
C42
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LMV7239, LMV7239-Q1 :
Catalog: LMV7239
•
Automotive: LMV7239-Q1
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LMV7235M5
LMV7235M5/NOPB
LMV7235M5X
SOT-23
SOT-23
SOT-23
SOT-23
SC70
DBV
DBV
DBV
DBV
DCK
DCK
DCK
DCK
DBV
DBV
DBV
DBV
DCK
DCK
DCK
DCK
DCK
DCK
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
1000
1000
3000
3000
1000
1000
3000
3000
1000
1000
3000
3000
1000
1000
3000
3000
1000
3000
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
3.2
3.2
3.2
3.2
1.4
1.4
1.4
1.4
1.2
1.2
1.2
1.2
1.4
1.4
1.4
1.4
1.2
1.2
1.2
1.2
1.2
1.2
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
3.2
3.2
LMV7235M5X/NOPB
LMV7235M7
3.2
3.2
2.25
2.25
2.25
2.25
3.2
2.45
2.45
2.45
2.45
3.2
LMV7235M7/NOPB
LMV7235M7X
SC70
SC70
LMV7235M7X/NOPB
LMV7239M5
SC70
SOT-23
SOT-23
SOT-23
SOT-23
SC70
LMV7239M5/NOPB
LMV7239M5X
3.2
3.2
3.2
3.2
LMV7239M5X/NOPB
LMV7239M7
3.2
3.2
2.25
2.25
2.25
2.25
2.25
2.25
2.45
2.45
2.45
2.45
2.45
2.45
LMV7239M7/NOPB
LMV7239M7X
SC70
SC70
LMV7239M7X/NOPB
LMV7239QM7/NOPB
LMV7239QM7X/NOPB
SC70
SC70
SC70
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Mar-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LMV7235M5
LMV7235M5/NOPB
LMV7235M5X
SOT-23
SOT-23
SOT-23
SOT-23
SC70
DBV
DBV
DBV
DBV
DCK
DCK
DCK
DCK
DBV
DBV
DBV
DBV
DCK
DCK
DCK
DCK
DCK
DCK
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
1000
1000
3000
3000
1000
1000
3000
3000
1000
1000
3000
3000
1000
1000
3000
3000
1000
3000
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
LMV7235M5X/NOPB
LMV7235M7
LMV7235M7/NOPB
LMV7235M7X
SC70
SC70
LMV7235M7X/NOPB
LMV7239M5
SC70
SOT-23
SOT-23
SOT-23
SOT-23
SC70
LMV7239M5/NOPB
LMV7239M5X
LMV7239M5X/NOPB
LMV7239M7
LMV7239M7/NOPB
LMV7239M7X
SC70
SC70
LMV7239M7X/NOPB
LMV7239QM7/NOPB
LMV7239QM7X/NOPB
SC70
SC70
SC70
Pack Materials-Page 2
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