LP2951-50QDRGRQ1 [TI]
ADJUSTABLE MICROPOWER VOLTAGE REGULATORS WITH SHUTDOWN; 具有关断功能可调节微功耗电压稳压器
| 型号： | LP2951-50QDRGRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | ADJUSTABLE MICROPOWER VOLTAGE REGULATORS WITH SHUTDOWN |
| 文件： | 总24页 (文件大小：3299K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LP2951-33-Q1
LP2951-50-Q1
www.ti.com
SLVSAW6D –JUNE 2011–REVISED APRIL 2013
ADJUSTABLE MICROPOWER VOLTAGE REGULATORS WITH SHUTDOWN
Check for Samples: LP2951-33-Q1, LP2951-50-Q1
1
FEATURES
•
•
•
•
•
•
•
•
Qualified for Automotive Applications
•
•
•
•
Can Be Used as a Regulator or Reference
Wide Input Range: Up to 35 V
Rated Output Current of 100 mA
Low Dropout: 380 mV (Typ) at 100 mA
Low Quiescent Current: 75 μA (Typ)
Tight Line Regulation: 0.03% (Typ)
Tight Load Regulation: 0.04% (Typ)
High VO Accuracy
Stable With Low ESR (>12 mΩ) Capacitors
Current- and Thermal-Limiting Features
8-Pin Package
–
–
–
–
Fixed Voltages: 5 V/ADJ and 3.3 V/ADJ
Low-Voltage Error Signal on Falling Output
Shutdown Capability
Remote Sense Capability for Optimal
Output Regulation and Accuracy
–
–
1.4% at 25°C
2% Over Temperature
DRG PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
OUTPUT
SENSE
INPUT
FEEDBACK
VTAP
Thermal
Pad
SHUTDOWN
GND
ERROR
DESCRIPTION
The LP2951-xx-Q1 devices are bipolar, low-dropout voltage regulators that can accommodate a wide input
supply-voltage range of up to 35 V. The 8-pin LP2951-xx-Q1 is able to output either a fixed or adjustable output
from the same device. By tying the OUTPUT and SENSE pins together, and the FEEDBACK and VTAP pins
together, the LP2951-xx-Q1 outputs a fixed 5 V and 3.3 V (depending on the version). Alternatively, by leaving
the SENSE and VTAP pins open and connecting FEEDBACK to an external resistor divider, the output can be set
to any value between 1.235 V to 30 V.
The 8-pin LP2951-xx-Q1 also offers additional functionality that makes it particularly suitable for battery-powered
applications. For example, a logic-compatible shutdown feature allows the regulator to be put in standby mode
for power savings. In addition, there is a built-in supervisor reset function in which the ERROR output goes low
when VOUT drops by 6% of its nominal value for whatever reasons – due to a drop in VIN, current limiting, or
thermal shutdown.
The LP295x-xx-Q1 devices are designed to minimize all error contributions to the output voltage. With a tight
output tolerance (0.5% at 25°C), a very low output voltage temperature coefficient (20 ppm typical), extremely
good line and load regulation (0.3% and 0.4% typical), and remote sensing capability, the parts can be used as
either low-power voltage references or 100-mA regulators.
For the most-current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI Web site at www.ti.com.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2011–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LP2951-33-Q1
LP2951-50-Q1
SLVSAW6D –JUNE 2011–REVISED APRIL 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
FUNCTIONAL BLOCK DIAGRAM
Unregulated DC
V
OUT
I
L
3 100 mA
+
7
8
1
INPUT
OUTPUT
FEEDBACK
2
SENSE
+
−
6
+
ERROR
3
See Application
Information
Amplifier
From
CMOS
or TTL
V
TAP
SHUTDOWN
330 kW
See Application Information
5
+
+
−
To CMOS
or TTL
ERROR
60 mV
+
1.235-V
Reference
4
GND
ERROR Detection Comparator
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
VIN
Input voltage range
–0.3 V to 35 V
–1.5 V to 35 V
–1.5 V to 30 V
–1.5 V to 30 V
150°C
VSHDN
SHUTDOWN input voltage range
ERROR comparator output voltage range(2)
FEEDBACK input voltage range(2) (3)
Operating virtual-junction temperature
Storage temperature range
VFDBK
TJ
Tstg
–65°C to 150°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) May exceed input supply voltage
(3) If load is returned to a negative power supply, the output must be diode clamped to GND.
2
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SLVSAW6D –JUNE 2011–REVISED APRIL 2013
RECOMMENDED OPERATING CONDITIONS
MIN
MAX
30
UNIT
V
(1)
VIN
TA
Supply input voltage
See
Operating temperature
–40
125
°C
(1) Minimum VIN is the greater of:
(a) 2 V (25°C), 2.3 V (over temperature), or
(b) VOUT(MAX) + Dropout (Max) at rated IL
THERMAL INFORMATION
LP2951-xx-Q1
THERMAL METRIC
UNIT
DRG 8 PINS
55.7
θJA
Junction-to-ambient thermal resistance
θJCtop
θJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
66.5
30.2
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
1.1
ψJB
30.4
θJCbot
10
ELECTRICAL CHARACTERISTICS
VIN = VOUT (nominal) + 1 V, IL = 100 μA, CL = 1 μF (5-V versions) or CL = 2.2 μF (3.3-V versions),
8-pin version: FEEDBACK tied to VTAP, OUTPUT tied to SENSE, VSHUTDOWN ≤ 0.7 V
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX
UNIT
3.3-V VERSION (LP2951-33)
25°C
3.267
3.234
3.3
3.3
3.333
3.366
VOUT
5-V VERSION (LP2951-50)
VOUT Output voltage
ALL VOLTAGE OPTIONS
Output voltage
IL = 100 μA
V
–40°C to 125°C
25°C
4.950
4.900
5
5
5.050
5.100
IL = 100 μA
IL = 100 μA
V
–40°C to 125°C
Output voltage temperature
–40°C to 125°C
20
100 ppm/°C
coefficient(1)
25°C
–40°C to 125°C
25°C
0.03
0.2
Line regulation(2)
VIN = [VOUT(NOM) + 1 V] to 30 V
IL = 100 μA to 100 mA
IL = 100 μA
%/V
0.4
0.04
50
0.2
%
0.3
Load regulation(2)
Dropout voltage(3)
–40°C to 125°C
25°C
80
–40°C to 125°C
25°C
150
mV
450
VIN – VOUT
380
75
IL = 100 mA
–40°C to 125°C
25°C
600
120
μA
140
IL = 100 μA
–40°C to 125°C
25°C
IGND
GND current
8
12
IL = 100 mA
mA
14
–40°C to 125°C
25°C
110
160
170
μA
200
VIN = VOUT(NOM) – 0.5 V,
IL = 100 μA
Dropout ground current
Current limit
–40°C to 125°C
25°C
200
mA
220
VOUT = 0 V
–40°C to 125°C
(1) Output or reference voltage temperature coefficient is defined as the worst-case voltage change divided by the total temperature range.
(2) Regulation is measured at constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to
heating effects are covered under the specification for thermal regulation.
(3) Dropout voltage is defined as the input-to-output differential at which the output voltage drops 100 mV, below the value measured at 1-V
differential. The minimum input supply voltage of 2 V (2.3 V over temperature) must be observed.
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SLVSAW6D –JUNE 2011–REVISED APRIL 2013
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ELECTRICAL CHARACTERISTICS (continued)
VIN = VOUT (nominal) + 1 V, IL = 100 μA, CL = 1 μF (5-V versions) or CL = 2.2 μF (3.3-V versions),
8-pin version: FEEDBACK tied to VTAP, OUTPUT tied to SENSE, VSHUTDOWN ≤ 0.7 V
PARAMETER
Thermal regulation(4)
TEST CONDITIONS
TA
MIN
TYP
0.05
430
160
MAX
UNIT
IL = 100 μA
25°C
0.2
%/W
CL = 1 μF (5 V only)
CL = 200 μF
Output noise (RMS),
10 Hz to 100 kHz
25°C
μV
LP2951-50-Q1: CL = 3.3 μF,
CBypass = 0.01 μF between pins 1 and 7
100
VOUT = VREF to (VIN – 1 V),
VIN = 2.3 V to 30 V,
IL = 100 μA to 100 mA
Reference voltage
–40°C to 125°C
25°C
1.200
1.272
V
Reference voltage temperature
coefficient(1)
20
ppm/°C
ERROR COMPARATOR
25°C
–40°C to 125°C
25°C
0.01
150
60
1
2
Output leakage current
Output low voltage
VOUT = 30 V
μA
mV
mV
250
400
VIN = VOUT(NOM) – 0.5 V,
IOL = 400 μA
–40°C to 125°C
25°C
40
25
Upper threshold voltage
(ERROR output high)(5)
–40°C to 125°C
25°C
75
95
Lower threshold voltage
(ERROR output low)(5)
mV
mV
–40°C to 125°C
25°C
140
Hysteresis(5)
15
SHUTDOWN INPUT
Low (regulator ON)
High (regulator OFF)
0.7
Input logic voltage
–40°C to 125°C
V
2
25°C
–40°C to 125°C
25°C
30
450
3
50
100
600
750
10
VTAP = 2.4 V
VTAP = 30 V
SHUTDOWN input current
μA
–40°C to 125°C
25°C
VSHUTDOWN ≥ 2 V,
Regulator output current
in shutdown
VIN ≤ 30 V, VOUT = 0,
μA
–40°C to 125°C
20
FEEDBACK tied to VTAP
(4) Thermal regulation is defined as the change in output voltage at a time (T) after a change in power dissipation is applied, excluding load
or line regulation effects. Specifications are for a 50-mA load pulse at VIN = 30 V, VOUT = 5 V (1.25-W pulse) for t = 10 ms.
(5) Comparator thresholds are expressed in terms of a voltage differential equal to the nominal reference voltage (measured at
VIN – VOUT = 1 V) minus FEEDBACK terminal voltage. To express these thresholds in terms of output voltage change, multiply by the
error amplifier gain = VOUT/VREF = (R1 + R2)/R2. For example, at a programmed output voltage of 5 V, the ERROR output is specified to
go low when the output drops by 95 mV × 5 V/1.235 V = 384 mV. Thresholds remain constant as a percentage of VOUT (as VOUT is
varied), with the low-output warning occurring at 6% below nominal (typ) and 7.7% (max).
4
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LP2951-33-Q1
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SLVSAW6D –JUNE 2011–REVISED APRIL 2013
TYPICAL CHARACTERISTICS
QUIESCENT CURRENT
INPUT CURRENT
vs
INPUT VOLTAGE
vs
LOAD CURRENT
100
90
80
70
60
50
40
30
20
10
0
10
RL = ∞
1
0.1
0.01
0.0001
0.001
0.01
0.1
IL – Load Current – A
0
1
2
3
4
5
6
7
8
9
10
VIN – Input Voltage – V
INPUT CURRENT
vs
INPUT VOLTAGE
INPUT CURRENT
vs
INPUT VOLTAGE
120
110
100
90
80
70
60
50
40
30
20
10
0
200
180
160
140
120
100
80
RL = 50 Ω
RL = 50 kΩ
60
40
20
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
VIN – Input Voltage – V
VIN – Input Voltage – V
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TYPICAL CHARACTERISTICS (continued)
OUTPUT VOLTAGE
vs
TEMPERATURE
QUIESCENT CURRENT
vs
INPUT VOLTAGE
5.100
5.075
5.050
5.025
5.000
4.975
4.950
4.925
4.900
120
110
100
90
80
70
60
50
40
30
20
10
0
IL = 0
IL = 100 µA
IL = 100 mA
0
1
2
3
4
5
6
7
8
-40 -25 -10
5
20 35 50 65 80 95 110 125
VIN – Input Voltage – V
TA – Temperature – °C
QUIESCENT CURRENT
vs
QUIESCENT CURRENT
vs
INPUT VOLTAGE
INPUT VOLTAGE
8
7
6
5
4
3
2
1
0
IL = 100 mA
120
110
100
90
IL = 1 mA
80
70
60
50
40
30
20
10
0
0
0
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
VIN – Input Voltage – V
VIN – Input Voltage – V
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SLVSAW6D –JUNE 2011–REVISED APRIL 2013
TYPICAL CHARACTERISTICS (continued)
QUIESCENT CURRENT
vs
QUIESCENT CURRENT
vs
TEMPERATURE
TEMPERATURE
100
95
90
85
80
75
70
65
60
55
50
10
9.5
9
IL = 100 mA
VIN = 6 V
IL = 100 µA
VIN = 6 V
8.5
8
7.5
7
6.5
6
5.5
5
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
TA – Temperature – °C
TA – Temperature – °C
SHORT-CIRCUIT CURRENT
DROPOUT VOLTAGE
vs
vs
TEMPERATURE
TEMPERATURE
250
225
200
175
150
125
100
75
500
450
400
350
300
250
200
150
100
50
RL = 100 mA
RL = 100 µA
50
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
TA – Temperature – °C
TA – Temperature – °C
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TYPICAL CHARACTERISTICS (continued)
DROPOUT VOLTAGE
vs
OUTPUT CURRENT
MINIMUM OPERATING VOLTAGE
vs
TEMPERATURE
2
1.95
1.9
400
350
300
250
200
150
100
50
1.85
1.8
1.75
1.7
1.65
1.6
0
0.0001
0.001
0.01
0.1
-40 -25 -10
5
20 35 50 65 80 95 110 125
IO – Output Current – A
TA – Temperature – °C
FEEDBACK BIAS CURRENT
ERROR COMPARATOR OUTPUT
vs
vs
TEMPERATURE
INPUT VOLTAGE
8
7
6
5
4
3
2
1
30
25
20
15
10
5
50-kW resistor to
external 5-V supply
0
50-kW resistor
to VOUT
-5
-10
-15
-20
0
0
1
2
3
4
5
6
7
8
-55 -30 -5
20 45 70
95 120 145
VIN – Input Voltage – V
TA – Temperature – °C
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SLVSAW6D –JUNE 2011–REVISED APRIL 2013
TYPICAL CHARACTERISTICS (continued)
ERROR COMPARATOR SINK CURRENT
LINE TRANSIENT RESPONSE
vs
vs
OUTPUT LOW VOLTAGE
TIME
2
1.75
1.5
1.25
1
TA = 125
Input Voltage
2 V/div
TA = 25
Output Voltage
80 mV/div
0.75
0.5
0.25
0
TA = –40
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
VOL – Output Low Voltage – V
LOAD TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
vs
TIME
vs
TIME
(VOUT = 5 V, CL = 1 μF)
(VOUT = 5 V, CL = 10 μF)
Output Voltage
100 mV/div
Output Voltage
100 mV/div
Output Load
100 mA/div
Output Load
100 mA/div
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TYPICAL CHARACTERISTICS (continued)
ENABLE TRANSIENT RESPONSE
ENABLE TRANSIENT RESPONSE
vs
TIME
vs
TIME
(CL = 1 μF, IL = 1 mA)
(CL = 10 μF, IL = 1 mA)
OUTPUT IMPEDANCE
vs
RIPPLE REJECTION
vs
FREQUENCY
FREQUENCY
100
10
90
80
70
60
50
40
30
20
IL = 100 µA
IL = 0
1
IL = 1 mA
IL = 100 µA
0.1
0.01
IL = 100 mA
VIN = 6 V
CL = 1 µF
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
f – Frequency – Hz
f – Frequency – Hz
10
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SLVSAW6D –JUNE 2011–REVISED APRIL 2013
TYPICAL CHARACTERISTICS (continued)
RIPPLE REJECTION
vs
RIPPLE REJECTION
vs
FREQUENCY
FREQUENCY
100
90
80
70
60
50
40
30
20
10
100
90
80
70
60
50
40
30
20
10
VIN = 6 V
CL = 1 µF
VIN = 6 V
CL = 1 µF
IL = 50 mA
IL = 1 mA
IL = 100 mA
IL = 10 mA
1k
10
100
10k
100k
1M
10
100
1k
10k
100k
1M
f – Frequency – Hz
f – Frequency – Hz
OUTPUT NOISE
vs
FREQUENCY
DIVIDER RESISTANCE
vs
TEMPERATURE
6
5
4
3
2
1
0
400
350
300
250
200
150
100
50
CL = 200 µF
CL = 1 µF
CL = 3.3 µF
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
10
100
1k
10k
100k
TA – Temperature – °C
f – Frequency – Hz
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TYPICAL CHARACTERISTICS (continued)
SHUTDOWN THRESHOLD VOLTAGE (OFF TO ON)
SHUTDOWN THRESHOLD VOLTAGE (ON TO OFF)
vs
vs
TEMPERATURE
TEMPERATURE
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1
0.9
0.9
0.8
0.8
-40 -25 -10
5
20 35 50 65 80 95 110 125
TA – Temperature – °C
-40 -25 -10
5
20 35 50 65 80 95 110 125
TA – Temperature – °C
LINE REGULATION
vs
INPUT VOLTAGE
6
5
4
3
2
1
0
-1
-2
0
5
10
15
20
25
30
VIN – Input Voltage – V
12
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SLVSAW6D –JUNE 2011–REVISED APRIL 2013
APPLICATION INFORMATION
Input Capacitor (CIN)
A 1-μF (tantalum, ceramic, or aluminum) electrolytic capacitor should be placed locally at the input of the
LP2951-xx-Q1 if there is, or will be, significant impedance between the ac filter capacitor and the input; for
example, if a battery is used as the input or if the ac filter capacitor is located more than 10 in away. There are
no ESR requirements for this capacitor, and the capacitance can be increased without limit.
Output Capacitor (COUT
)
As with most PNP LDOs, stability conditions require the output capacitor to have a minimum capacitance and an
ESR that falls within a certain range.
Capacitance Value
For VOUT ≥ 5 V, a minimum of 1 μF is required. For lower VOUT, the regulator’s loop gain is running closer to unity
gain and, thus, has lower phase margins. Consequently, a larger capacitance is needed for stability. For VOUT
=
3.3 V, a minimum of 2.2 μF is recommended. For worst case, VOUT = 1.23 V (using the ADJ version), a minimum
of 3.3 μF is recommended. COUT can be increased without limit and only improves the regulator stability and
transient response. Regardless of its value, the output capacitor should have a resonant frequency less than
500 kHz.
The minimum capacitance values given above are for maximum load current of 100 mA. If the maximum
expected load current is less than 100 mA, then lower values of COUT can be used. For instance, if IOUT < 10 mA,
then only 0.33 μF is required for COUT. For IOUT < 1 mA, 0.1 μF is sufficient for stability requirements. Thus, for a
worst-case condition of 100-mA load and VOUT = VREF = 1.235 V (representing the highest load current and
lowest loop gain), a minimum COUT of 3.3 μF is recommended.
The LP2951-xx-Q1 is used with external resistors to set the output voltage, a minimum load current of 1 μA is
recommended through the resistor divider.
ESR Range
The regulator control loop relies on the ESR of the output capacitor to provide a zero to add sufficient phase
margin to ensure unconditional regulator stability; this requires the closed-loop gain to intersect the open-loop
response in a region where the open-loop gain rolls off at 20 dB/decade. This ensures that the phase always is
less than 180° (phase margin greater than 0°) at unity gain. Thus, a minimum-maximum range for the ESR must
be observed.
The upper limit of this ESR range is established by the fact that too high an ESR could result in the zero
occurring too soon, causing the gain to roll off too slowly, which, in turn allows a third pole to appear before unity
gain and introduce enough phase shift to cause instability. This typically limits the max ESR to approximately
5 Ω.
Conversely, the lower limit of the ESR is tied to the fact that too low an ESR shifts the zero too far out (past unity
gain) and, thus, allows the gain to roll off at 40 dB/decade at unity gain, with a resulting phase shift of greater
than 180°. Typically, this limits the minimum ESR to approximately 20 mΩ to 30 mΩ.
For specific ESR requirements, see Typical Characteristics.
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Product Folder Links: LP2951-33-Q1 LP2951-50-Q1
LP2951-33-Q1
LP2951-50-Q1
SLVSAW6D –JUNE 2011–REVISED APRIL 2013
www.ti.com
Capacitor Types
Most tantalum or aluminum electrolytics are suitable for use at the input. Film-type capacitors also work, but at
higher cost. When operating at low temperature, care should be taken with aluminum electrolytics, as their
electrolytes often freeze at –30°C. For this reason, solid tantalum capacitors should be used at temperatures
below –25°C.
Ceramic capacitors can be used, but due to their low ESR (as low as 5 mΩ to 10 mΩ), they may not meet the
minimum ESR requirement previously discussed. If a ceramic capacitor is used, a series resistor between 0.1 Ω
to 2 Ω must be added to meet the minimum ESR requirement. In addition, ceramic capacitors have one glaring
disadvantage that must be taken into account — a poor temperature coefficient, where the capacitance can vary
significantly with temperature. For instance, a large-value ceramic capacitor (≥2.2 μF) can lose more than half of
its capacitance as temperature rises from 25°C to 85°C. Thus, a 2.2-μF capacitor at 25°C drops well below the
minimum COUT required for stability as ambient temperature rises. For this reason, select an output capacitor that
maintains the minimum 2.2 μF required for stability for the entire operating temperature range.
CBYPASS: Noise and Stability Improvement
In the LP2951-xx-Q1, an external FEEDBACK pin directly connected to the error amplifier noninverting input can
allow stray capacitance to cause instability by shunting the error amplifier feedback to GND, especially at high
frequencies. This is worsened if high-value external resistors are used to set the output voltage, because a high
resistance allows the stray capacitance to play a more significant role; i.e., a larger RC time delay is introduced
between the output of the error amplifier and its FEEDBACK input, leading to more phase shift and lower phase
margin. A solution is to add a 100-pF bypass capacitor (CBYPASS) between OUTPUT and FEEDBACK; because
CBYPASS is in parallel with R1, it lowers the impedance seen at FEEDBACK at high frequencies, in effect
offsetting the effect of the parasitic capacitance by providing more feedback at higher frequencies. More
feedback forces the error amplifier to work at a lower loop gain, so COUT should be increased to a minimum of
3.3 μF to improve the regulator’s phase margin.
CBYPASS can be also used to reduce output noise in the LP2951-xx-Q1. This bypass capacitor reduces the closed
loop gain of the error amplifier at the high frequency, so noise no longer scales with the output voltage. This
improvement is more noticeable with higher output voltages, because loop gain reduction is greatest. A suitable
CBYPASS is calculated as shown in Equation 1:
1
f
(CBYPASS) ] 200 Hz ³ CBYPASS
+
2p R1 200 Hz
(1)
ERROR Function
The LP2951-xx-Q1 has a low-voltage detection comparator that outputs a logic low when the output voltage
drops by ≉6% from its nominal value, and outputs a logic high when VOUT has reached ≉95% of its nominal
value. This 95% of nominal figure is obtained by dividing the built-in offset of ≉60 mV by the 1.235-V bandgap
reference, and remains independent of the programmed output voltage. For example, the trip-point threshold
(ERROR output goes high) typically is 4.75 V for a 5-V output and 11.4 V for a 12-V output. Typically, there is a
hysteresis of 15 mV between the thresholds for high and low ERROR output.
A timing diagram is shown in Figure 1 for ERROR vs VOUT (5 V), as VIN is ramped up and down. ERROR
becomes valid (low) when VIN ≉ 1.3 V. When VIN ≉ 5 V, VOUT = 4.75 V, causing ERROR to go high. Because the
dropout voltage is load dependent, the output trip-point threshold is reached at different values of VIN, depending
on the load current. For instance, at higher load current, ERROR goes high at a slightly higher value of VIN, and
vice versa for lower load current. The output-voltage trip point remains at ≉4.75 V, regardless of the load. Note
that when VIN ≤ 1.3 V, the ERROR comparator output is turned off and pulled high to its pullup voltage. If VOUT is
used as the pullup voltage, rather than an external 5-V source, ERROR typically is ≉1.2 V. In this condition, an
equal resistor divider (10 kΩ is suitable) can be tied to ERROR to divide down the voltage to a valid logic low
during any fault condition, while still enabling a logic high during normal operation.
14
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Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: LP2951-33-Q1 LP2951-50-Q1
LP2951-33-Q1
LP2951-50-Q1
www.ti.com
SLVSAW6D –JUNE 2011–REVISED APRIL 2013
Output
Voltage
4.75 V
ERROR
5 V
Input
Voltage
1.3 V
Figure 1. ERROR Output Timing
Because the ERROR comparator has an open-collector output, an external pullup resistor is required to pull the
output up to VOUT or another supply voltage (up to 30 V). The output of the comparator is rated to sink up to
400 μA. A suitable range of values for the pullup resistor is from 100 kΩ to 1 MΩ. If ERROR is not used, it can
be left open.
Programming Output Voltage
A unique feature of the LP2951-xx-Q1 is its ability to output either a fixed voltage or an adjustable voltage,
depending on the external pin connections. To output the internally programmed fixed voltage, tie the SENSE pin
to the OUTPUT pin and the FEEDBACK pin to the VTAP pin. Alternatively, a user-programmable voltage ranging
from the internal 1.235-V reference to a 30-V max can be set by using an external resistor divider pair. The
resistor divider is tied to VOUT, and the divided-down voltage is tied directly to FEEDBACK for comparison against
the internal 1.235-V reference. To satisfy the steady-state condition in which its two inputs are equal, the error
amplifier drives the output to equal Equation 2:
R1
ǒ 1 )
Ǔ
VOUT + VREF
* IFBR1
R2
(2)
Where:
VREF = 1.235 V applied across R2
IFB = FEEDBACK bias current, typically 20 nA
A minimum regulator output current of 1 μA must be maintained. Thus, in an application where a no-load
condition is expected (for example, CMOS circuits in standby), this 1-μA minimum current must be provided
by the resistor pair, effectively imposing a maximum value of R2 = 1.2 MΩ (1.235 V/1.2 MΩ ≉ 1 μA).
IFB = 20 nA introduces an error of ≉0.02% in VOUT. This can be offset by trimming R1. Alternatively,
increasing the divider current makes IFB less significant, thus, reducing its error contribution. For instance,
using R2 = 100 kΩ reduces the error contribution of IFB to 0.17% by increasing the divider current to ≉12 μA.
This increase in the divider current still is small compared to the 600-μA typical quiescent current of the
LP2951-xx-Q1 under no load.
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Product Folder Links: LP2951-33-Q1 LP2951-50-Q1
LP2951-33-Q1
LP2951-50-Q1
SLVSAW6D –JUNE 2011–REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Changes from Original (June, 2011) to Revision A
Page
•
Removed continuous from input voltage range parameter description; changed max values for VIN and VSHDN from
30 to 35. ................................................................................................................................................................................ 2
Changes from Revision A (July 2012) to Revision B
Page
•
Changed LP2951-33QDRGRQ1 From: Preview To: Active ................................................................................................. 1
Changes from Revision B (December 2012) to Revision C
Page
•
•
Deleted P/N LP2951-Q1 from page header ......................................................................................................................... 1
Deleted ORDERING INFORMATION table .......................................................................................................................... 1
Changes from Revision B (February 2013) to Revision D
Page
•
•
Deleted unreleased devices ................................................................................................................................................. 1
Added the THERMAL INFORMATION table ........................................................................................................................ 3
16
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Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: LP2951-33-Q1 LP2951-50-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
LP2951-33QDRGRQ1
LP2951-50QDRGRQ1
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
ACTIVE
SON
SON
DRG
8
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
Level-2-260C-1 YEAR
RACQ
ZUFQ
ACTIVE
DRG
3000
Green (RoHS
& no Sb/Br)
Level-2-260C-1 YEAR
-40 to 125
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LP2951-33-Q1, LP2951-50-Q1, LP2951-Q1 :
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
Catalog: LP2951-33, LP2951-50, LP2951
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LP2951-33QDRGRQ1
LP2951-50QDRGRQ1
SON
SON
DRG
DRG
8
8
3000
3000
330.0
330.0
12.4
12.4
3.3
3.3
3.3
3.3
1.1
1.1
8.0
8.0
12.0
12.0
Q2
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Sep-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LP2951-33QDRGRQ1
LP2951-50QDRGRQ1
SON
SON
DRG
DRG
8
8
3000
3000
367.0
367.0
367.0
367.0
35.0
35.0
Pack Materials-Page 2
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