LP2985-15YEQR_技术文档

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SLVS552 − OCTOBER 2004

DBV (SOT-23) PACKAGE

(TOP VIEW)

D

Available in the Texas Instruments

NanoStar and NanoFree Wafer Chip

Scale Packages

V

GND

ON/OFF

V

OUT

1

2

3

5

4

IN

Output Tolerance of:

− 1% (A Grade)

− 1.5% (Standard Grade)

BYPASS

Ultra Low Dropout, Typically

280 mV at Full Load of 150 mA

YEQ, YEU, YZQ, OR YZU (WCSP) PACKAGE

(TOP VIEW)

Wide V Range . . . 16 V (Max)

IN

Low I . . . 850 µA at Full Load at 150 mA

Q

C3

C1

V

OUT

IN

Shutdown Current . . . 0.01 µA Typ

Low Noise . . . 30 µV

Capacitor

With 10-nF Bypass

RMS

BYPASS

GND

B2

D

Stable With Low ESR Capacitors, Including

Ceramic

A1

ON/OFF

A3

D

Over-Current and Thermal Protection

High Peak Current Capability

For V

Options . 2.5 V, See LP2985 Data

OUT

Sheet

D

Portable Applications

− Cellular Phones

− Palmtop and Laptop Computers

− Personal Digital Assistants (PDAs)

− Digital Cameras and Camcorders

− CD Players

− MP3 Players

description/ordering information

The LP2985LV family of fixed-output, low-dropout regulators offers exceptional, cost-effective performance for

both portable and nonportable applications. Available in voltages of 1.25 V, 1.35 V, 1.5 V, 1.7 V, 1.8 V, and

2 V, the family has an output tolerance of 1% for the A version (1.5% for the non-A version), and is capable of

delivering 150-mA continuous load current. Standard regulator features, such as over-current and

over-temperature protection, are included.

The LP2985LV has a host of features that makes the regulator an ideal candidate for a variety of portable

applications:

• Low dropout: A PNP pass element allows a typical dropout of 280 mV at 150-mA load current.

• Low quiescent current: The use of a vertical PNP process allows for quiescent currents that are

considerably lower than those associated with traditional lateral PNP regulators.

• Shutdown: A shutdown feature is available, allowing the regulator to consume only 0.01 µA when the

ON/OFF pin is pulled low.

• Low-ESR-capacitor friendly: The regulator is stable with low ESR capacitors, allowing for the use of

small, inexpensive ceramic capacitors in cost-sensitive applications.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar and NanoFree are trademarks of Texas Instruments.

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Copyright  2004, Texas Instruments Incorporated

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1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLVS552 − OCTOBER 2004

description/ordering information (continued)

• Low noise: The BYPASS pin allows for low noise operation, with a typical output noise of 30 µV (RMS)

with the use of a 10-nF bypass capacitor.

• Small packaging: For the most space-constraint needs, the regulator is available in SOT-23 package,

as well as NanoStar wafer chip scale packaging, offering an even smaller size with improved thermal

and electrical characteristics. NanoStar package technology is a major breakthrough in IC packaging

concepts, using the die as the package.

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLVS552 − OCTOBER 2004

ORDERING INFORMATION

PART

GRADE

V

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

OUT

†

PACKAGE

T

J

‡

(NOM)

Reel of 3000

Reel of 250

Reel of 3000

Reel of 250

Reel of 3000

Reel of 250

Reel of 3000

Reel of 250

Reel of 3000

Reel of 250

Reel of 3000

Reel of 250

LP2985A-12DBVR

LP2985A-12DBVT

LP2985A-13DBVR

LP2985A-13DBVT

LP2985A-15DBVR

LP2985A-15DBVT

LP2985A-17DBVR

LP2985A-17DBVT

LP2985A-18DBVR

LP2985A-18DBVT

LP2985A-20DBVR

LP2985A-20DBVT

LP2985A-12YEQR

LP2985A-13YEQR

LP2985A-15YEQR

LP2985A-17YEQR

LP2985A-18YEQR

LP2985A-20YEQR

LP2985A-12YZQR

LP2985A-13YZQR

LP2985A-15YZQR

LP2985A-17YZQR

LP2985A-18YZQR

LP2985A-20YZQR

LP2985A-12YEUR

LP2985A-13YEUR

LP2985A-15YEUR

LP2985A-17YEUR

LP2985A-18YEUR

LP2985A-20YEUR

LP2985A-12YZUR

LP2985A-13YZUR

LP2985A-15YZUR

LP2985A-17YZUR

LP2985A-18YZUR

LP2985A-20YZUR

PREVIEW

1.25 V

PREVIEW

1.35 V

1.5 V

1.7 V

1.8 V

2 V

SOT23-5 (DBV)

PREVIEW

LPT_

PREVIEW

1.25 V

1.35 V

1.5 V

1.7 V

1.8 V

2 V

PREVIEW

NanoStar − WCSP

0.17-mm Bump (YEQ)

Reel of 3000

A grade:

1% tolerance

−40°C to 125°C

1.25 V

1.35 V

1.5 V

1.7 V

1.8 V

2 V

PREVIEW

NanoFree − WCSP

0.17-mm Bump

(YZQ, Pb-free)

PREVIEW

1.25 V

1.35 V

1.5 V

1.7 V

1.8 V

2 V

PREVIEW

NanoStar − WCSP

0.30-mm Bump (YEU)

1.25 V

1.35 V

1.5 V

1.7 V

1.8 V

2 V

PREVIEW

NanoFree − WCSP

0.30-mm Bump

(YZU, Pb-free)

PREVIEW

†

‡

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

DBV: The actual top-side marking has one additional character that designates the assembly/test site.

YEQ/YZQ, YEU/YZU: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one

^{following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,}• = Pb-free).

3

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SLVS552 − OCTOBER 2004

description/ordering information (continued)

ORDERING INFORMATION

V

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

OUT

†

PACKAGE

T

J

PART GRADE

‡

(NOM)

Reel of 3000

LP2985-12DBVR

LP2985-12DBVT

LP2985-13DBVR

LP2985-13DBVT

LP2985-15DBVR

LP2985-15DBVT

LP2985-17DBVR

LP2985-17DBVT

LP2985-18DBVR

LP2985-18DBVT

LP2985-20DBVR

LP2985-20DBVT

LP2985-12YEQR

LP2985-13YEQR

LP2985-15YEQR

LP2985-17YEQR

LP2985-18YEQR

LP2985-20YEQR

LP2985-12YZQR

LP2985-13YZQR

LP2985-15YZQR

LP2985-17YZQR

LP2985-18YZQR

LP2985-20YZQR

LP2985-12YEUR

LP2985-13YEUR

LP2985-15YEUR

LP2985-17YEUR

LP2985-18YEUR

LP2985-20YEUR

LP2985-12YZUR

LP2985-13YZUR

LP2985-15YZUR

LP2985-17YZUR

LP2985-18YZUR

LP2985-20YZUR

PREVIEW

1.25 V

Reel of 250

Reel of 3000

Reel of 250

Reel of 3000

Reel of 250

Reel of 3000

Reel of 250

Reel of 3000

Reel of 250

Reel of 3000

Reel of 250

PREVIEW

1.35 V

1.5 V

1.7 V

1.8 V

2 V

SOT-23 (DBV)

PREVIEW

LPH_

PREVIEW

1.25 V

1.35 V

1.5 V

1.7 V

1.8 V

2 V

PREVIEW

NanoStar − WCSP

0.17-mm Bump (YEQ)

Reel of 3000

Standard grade:

1.5% tolerance

−40°C to 125°C

1.25 V

1.35 V

1.5 V

1.7 V

1.8 V

2 V

PREVIEW

NanoFree − WCSP

0.17-mm Bump

(YZQ, Pb free)

PREVIEW

1.25 V

1.35 V

1.5 V

1.7 V

1.8 V

2 V

PREVIEW

NanoStar − WCSP

0.30-mm Bump (YEU)

1.25 V

1.35 V

1.5 V

1.7 V

1.8 V

2 V

PREVIEW

NanoFree − WCSP

0.30-mm Bump

(YZQ, Pb free)

PREVIEW

†

‡

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

DBV: The actual top-side marking has one additional character that designates the assembly/test site.

YEQ/YZQ, YEU/YZU: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one

following character to designate the assembly/test site. Pin

1

identifier indicates solder-bump composition

^{(1 = SnPb,}• = Pb-free).

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLVS552 − OCTOBER 2004

functional block diagram

V

IN

ON/OFF

1.23 V

−

V

REF

+

BYPASS

V

OUT

Over-Current/

Over-Temperature

Protection

basic application circuit

LP2985A−xxDBVR

V

OUT

V

IN

1

5

†

2.2 µF

†

1 µF

GND

2

3

}

ON/OFF

4

BYPASS

w

10 nF

†

‡

§

Minimum C

OUT

value for stability (can be increased without limit for improved stability and transient response)

ON/OFF must be actively terminated. Connect to V if shutdown feature is not used.

IN

Optional BYPASS capacitor for low noise operation

5

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SLVS552 − OCTOBER 2004

†

absolute maximum ratings over the virtual junction temperature range (unless otherwise noted)

Continuous input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 16 V

ON/OFF input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 16 V

Output voltage range (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 9 V

Input/output voltage differential, V -V

(see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 16 V

IN OUT

Output current, I (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited (short-circuit protected)

O

Package thermal impedance, θ (see Notes 3 and 4): DBV package . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W

JA

YEQ/YZQ package . . . . . . . . . . . . . . . . . . TBD°C/W

YEU/YZU package . . . . . . . . . . . . . . . . . . . TBD°C/W

Operating virtual junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

Storage temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

stg

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. If load is returned to a negative power supply in a dual supply system, the output must be diode clamped to GND.

2. The PNP pass transistor has a parasitic diode connected between the input and output. This diode is normally reversed bias

(V > V

for more details).

) but will be forward biased if the output voltage exceeds the input voltage by a diode drop (see Application Information

IN OUT

3. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable

J

JA

A

ambient temperature is P = (T (max) − T )/θ . Operating at the absolute maximum T of 150°C can affect reliability.

D

J

A

JA

J

4. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions

MIN

2.2

MAX

UNIT

V

Supply input voltage

ON/OFF input voltage

Output current

16

IN

−0.3

V

IN

V

ON/OFF

OUT

I

150

125

mA

°C

Virtual junction temperature

T

J

−40

6

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SLVS552 − OCTOBER 2004

electrical characteristics at specified virtual junction temperature range,

V

= V

(nominal)+ 1V, V

= 2 V, C = 1 mF, I = 1 mA, C

= 4.7 mF (unless otherwise noted)

IN

OUT

ON/OFF

IN

L

OUT

LP2985A−XX

MIN TYP MAX

LP2985−XX

TYP

PARAMETER

TEST CONDITIONS

UNIT

T

J

MIN

MAX

I

= 1mA

25°C

−1

−1.5

−2.5

−3.5

1

1.5

2.5

3.5

−1.5

−2.5

−3.5

−3.0

−4.0

1.5

L

2.5

1 mA ≤ I ≤ 50 mA

Output voltage

tolerance

L

−40°C to 125°C

25°C

3.5

3.0

nV

%V

NOM

OUT

1 mA ≤ I ≤ 150 mA

L

−40°C to 125°C

25°C

4.0

0.007 0.014

0.032

0.007 0.014

0.032

V

[V

=

IN

Line regulation

%/V

V

+ 1 V] to 16 V

−40°C to 125°C

OUT(NOM)

Minimum V to

IN

maintain output

regulation

25°C

2.05

V

IN(MIN)

−40°C to 125°C

2.2

(see Note 5)

25°C

−40°C to 125°C

25°C

120

280

65

150

250

350

600

95

120

280

65

150

250

350

600

95

I

= 50 mA

= 150 mA

= 0

L

Dropout voltage

(see Note 5)

-V

mV

IN OUT

−40°C to 125°C

25°C

−40°C to 125°C

25°C

125

110

170

220

400

600

1000

1500

2500

0.8

125

110

170

220

400

600

1000

1500

2500

0.8

75

= 1 mA

= 10 mA

= 50 mA

= 150 mA

−40°C to 125°C

25°C

120

350

850

120

350

850

−40°C to 125°C

25°C

I

Ground pin current

µA

GND

−40°C to 125°C

25°C

−40°C to 125°C

25°C

V

< 0.3 V (OFF)

< 0.15 V (OFF)

= HIGH !!

0.01

0.05

0.01

0.05

ON/OFF

−40°C to 105°C

−40°C to 125°C

25°C

2

5

1.4

0.55

0.01

5

1.4

0.55

0.01

5

ON/OFF input

voltage

(see Note 6)

(ON)

−40°C to 125°C

25°C

1.6

V

ON/OFF

V

(OFF)

= LOW !!

ON/OFF

−40°C to 125°C

25°C

0.15

−2

0.15

−2

V

= 0

ON/OFF

−40°C to 125°C

25°C

ON/OFF input

current

I

µA

ON/OFF

V

= 5 V

−40°C to 125°C

15

NOTES: 5. Dropout voltage is defined as the input-to-output differential at which the output voltage drops 2% below the value measured

with

b) V

a

1-V differential. Dropout limits may not apply because

V

must be the greater of a) 2.2 V, or

IN

+ dropout voltage (Max) in order to maintain output regulation.

OUT(nom)

6. The ON/OFF input must be properly driven for reliable operation (see Application Information).

7

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ꢀ ꢁ ꢂꢃ ꢄꢅ ꢀꢆ

ꢇꢅ ꢈꢉꢊ ꢋ ꢀ ꢌꢍꢉꢎ ꢌ ꢏꢐ ꢑ ꢒ ꢀꢌ ꢍꢉꢓꢔ ꢌꢁ ꢌ ꢕꢖ ꢔ ꢑꢗ ꢕꢀ ꢋꢖꢌ ꢔ

ꢍꢏ ꢖ ꢘ ꢐꢘ ꢕ ꢖ ꢓꢌ ꢍꢎ ꢙꢌ ꢔ ꢌ ꢕꢖꢁ ꢕꢖ ꢆ ꢌꢀꢖꢋ ꢗꢑ ꢐ <ꢂ ꢚꢛ ꢆ

SLVS552 − OCTOBER 2004

electrical characteristics at specified virtual junction temperature range,

V

= V

(nominal)+ 1V, V

= 2 V, C = 1 mF, I = 1 mA, C

= 4.7 mF (unless otherwise noted)

IN

OUT

ON/OFF

IN

L

OUT

(continued)

LP2985A−XX

LP2985−XX

TYP MAX

PARAMETER

TEST CONDITIONS

UNIT

T

J

MIN

TYP

MAX

MIN

BW = 300 Hz to 50 kHz,

Output noise

(RMS)

C

= 10 µF,

OUT

BYPASS

= 1.8 V

V

25°C

30

45

µV

n

= 10 nF,

V

OUT

f = 1kHz,

C

Ripple

rejection

nV

/nV

OUT IN

= 10 µF,

45

dB

OUT

= 10 nF

BYPASS

Peak output

current

I

V

R

≥ V

− 5%

25°C

350

400

350

400

mA

OUT(PK)

OUT

O(NOM)

Short circuit

current

= 0 (steady state)

L

OUT(SC)

(see Note 7)

NOTE 7: See Typical Characteristics Curve, Short-Circuit Current vs. V

OUT

8

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ꢀꢁ ꢂꢃ ꢄꢅ ꢀꢆ

ꢇ ꢅ ꢈ ꢉꢊꢋ ꢀ ꢌ ꢍꢉꢎꢌ ꢏꢐ ꢑꢒ ꢀ ꢌꢍꢉꢓꢔꢌ ꢁ ꢌꢕꢖ ꢔꢑꢗ ꢕ ꢀꢋꢖꢌ ꢔ

ꢍ

ꢏ

ꢖ

ꢘ

ꢐ

ꢘ

ꢕ

ꢖ

ꢓ

ꢌ

ꢍ

ꢎ

ꢙ

ꢌ

ꢔ

ꢌ

ꢕ

ꢖ

ꢁ

ꢕ

ꢖ

ꢆ

ꢌ

ꢀ

ꢖ

ꢋ

ꢗ

ꢑ

ꢐ

<

ꢂ

ꢚ

ꢛ

ꢆ

SLVS552 − OCTOBER 2004

APPLICATION INFORMATION

capacitors

input capacitor (C )

IN

A minimum value of 1 ꢀ F (over the entire operating temperature range) is required at the input of the LP2985LV.

In addition, this input capacitor should be located within 1 cm of the input pin and connected to a clean analog

ground. There are no Equivalent Series Resistance (ESR) requirements for this capacitor and the capacitance

can be increased without limit.

output capacitor (C

)

OUT

As an advantage over other regulators, the LP2985LV permits the use of low ESR capacitors at the output,

including ceramic capacitors that can have an ESR as low as 5 mΩ. Of course, tantalum and film capacitors

can also be used if size and cost are not issues. The output capacitor should also be located within 1 cm of the

output pin and be returned to a clean analog ground.

As with other PNP LDOs, stability conditions require the output capacitor to have a minimum capacitance and

an ESR that falls within a certain range.

Minimum C

: 2.2 µF (can be increased without limit to improve transient response stability margin)

OUT

ESR range: See Figures 1 and 2

Figure 1. 2.2-µF Stable ESR Curves

Figure 2. 4.7-µF Stable ESR Curves

9

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ꢀ ꢁ ꢂꢃ ꢄꢅ ꢀꢆ

ꢇꢅ ꢈꢉꢊ ꢋ ꢀ ꢌꢍꢉꢎ ꢌ ꢏꢐ ꢑ ꢒ ꢀꢌ ꢍꢉꢓꢔ ꢌꢁ ꢌ ꢕꢖ ꢔ ꢑꢗ ꢕꢀ ꢋꢖꢌ ꢔ

ꢍꢏ ꢖ ꢘ ꢐꢘ ꢕ ꢖ ꢓꢌ ꢍꢎ ꢙꢌ ꢔ ꢌ ꢕꢖꢁ ꢕꢖ ꢆ ꢌꢀꢖꢋ ꢗꢑ ꢐ <ꢂ ꢚꢛ ꢆ

SLVS552 − OCTOBER 2004

APPLICATION INFORMATION

output capacitor (C

) (continued)

OUT

It is critical that both the minimum capacitance and ESR requirement be met over the entire operating

temperature range. Depending on the type of capacitors used, both these parameters can vary significantly with

temperature (see Capacitor Characteristics section).

noise bypass capacitor (C

)

BYPASS

The LP2985LV allows for low noise performance with the use of a bypass capacitor that is connected to the

internal band-gap reference via the BYPASS pin. This high-impedance band-gap circuitry is biased in the

microampere range and, thus, cannot be loaded significantly, else its output − and correspondingly the output

of the regulator − will change. Thus, for best output accuracy, dc leakage current through C

minimized as much as possible and should never exceed 100 nA.

should be

BYPASS

A 10-nF capacitor is recommended for C

; ceramic and film capacitors are well suited for this purpose.

BYPASS

capacitor characteristics

ceramic

Ceramic capacitors are ideal choices for use on the output of the LP2985LV for several reasons. For

capacitances in the range of 2.2 µF to 4.7 µF, ceramic capacitors have the lowest cost and the lowest ESR,

making them choice candidates for filtering high-frequency noise. For instance, a typical 2.2-µF ceramic

capacitor has an ESR in the range of 10 mΩ to 20mΩ and satisfies minimum ESR requirements of the regulator.

Ceramic capacitors have one glaring disadvantage that must be taken into account − a poor temperature

coefficient, where the capacitance can vary significantly with temperature. For instance, a large-value ceramic

capacitor (≥2.2 µF) can lose more than half of its capacitance as temperature rises from 25°C to 85°C. Thus,

a 2.2 µF at 25°C will drop well below the minimum C

required for stability as ambient temperature rises. For

OUT

this reason, select an output capacitor that maintains the minimum 2.2 µF required for stability over the entire

operating temperature range. Note that there are some ceramic capacitors that can maintain a 15%

capacitance tolerance over temperature.

tantalum

Tantalum capacitors can be used at the output of the LP2985LV, but there are significant disadvantages that

could prohibit their use.

• In the 1-µF to 4.7-µF range, tantalum capacitors are more expensive than ceramics of the equivalent

capacitance and voltage ratings.

• Tantalum capacitors have higher ESRs than their equivalent-sized ceramic counterparts. Thus, to meet

the ESR requirements, a higher-capacitance tantalum may be required, at the expense of larger size

and higher cost.

• The ESR of a tantalum capacitor increases as temperature drops, as much as double from 25°C to

−40°C. Thus, ESR margins must be maintained over the temperature range in order to prevent

regulator instability.

10

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ꢀꢁ ꢂꢃ ꢄꢅ ꢀꢆ

ꢇ ꢅ ꢈ ꢉꢊꢋ ꢀ ꢌ ꢍꢉꢎꢌ ꢏꢐ ꢑꢒ ꢀ ꢌꢍꢉꢓꢔꢌ ꢁ ꢌꢕꢖ ꢔꢑꢗ ꢕ ꢀꢋꢖꢌ ꢔ

ꢍ ꢏꢖ ꢘ ꢐꢘꢕ ꢖꢓ ꢌꢍ ꢎ ꢙ ꢌ ꢔ ꢌ ꢕꢖ ꢁꢕꢖ ꢆꢌ ꢀꢖꢋꢗ ꢑ ꢐ <ꢂꢚ ꢛ ꢆ

SLVS552 − OCTOBER 2004

APPLICATION INFORMATION

ON/OFF operation

The LP2985LV allows for a shutdown mode via the ON/OFF pin. Driving the pin LOW (≤0.3 V) turns the device

OFF, conversely, a HIGH (≥1.6 V) turns the device ON. If the shutdown feature is not used, the ON/OFF pin

should be connected to the input to ensure that the regulator is on at all times. For proper operation, do not leave

the ON/OFF pin unconnected and apply a signal with a slew rate of ≥40 mV/µs.

reverse input-output voltage

There is an inherent diode present across the PNP pass element of the LP2985LV.

V

IN

V

OUT

With the anode connected to the output, this diode is reverse biased during normal operation since the input

voltage is higher than the output. However, if the output is pulled higher than the input for any reason, this diode

will be forward biased and can cause a parasitic silicon-controlled rectifier (SCR) to latch, resulting in high

current flowing from the output to the input. Thus, to prevent possible damage to the regulator in any application

where the output may be pulled above the input, an external Schottky diode must be connected between the

output and input. With the anode on output, this Schottky limits the reverse voltage across the output and input

pins to ꢀ0.3 V, preventing the regulator’s internal diode from forward biasing.

Schottky

V

IN

V

OUT

LP2985LV

11

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂꢃ ꢄꢅ ꢀꢆ

ꢇꢅ ꢈꢉꢊ ꢋ ꢀ ꢌꢍꢉꢎ ꢌ ꢏꢐ ꢑ ꢒ ꢀꢌ ꢍꢉꢓꢔ ꢌꢁ ꢌ ꢕꢖ ꢔ ꢑꢗ ꢕꢀ ꢋꢖꢌ ꢔ

ꢍꢏ ꢖ ꢘ ꢐꢘ ꢕ ꢖ ꢓꢌ ꢍꢎ ꢙꢌ ꢔ ꢌ ꢕꢖꢁ ꢕꢖ ꢆ ꢌꢀꢖꢋ ꢗꢑ ꢐ <ꢂ ꢚꢛ ꢆ

SLVS552 − OCTOBER 2004

WAFER CHIP SCALE INFORMATION

LP2985x-xxYEQ NanoStar (0.17-mm Bump)

LP2985x-xxYZQ NanoFree (0.17-mm Pb-Free Bump)

987

1,037

1,287

1,337

Pin A1 Index Area

0,19

0,15

0,625 Max

0,15

0,10

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. NanoStar package configuration

D. This package is tin-lead (SnPb), consult the factory for availability of lead-free material.

12

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀꢁ ꢂꢃ ꢄꢅ ꢀꢆ

ꢇ ꢅ ꢈ ꢉꢊꢋ ꢀ ꢌ ꢍꢉꢎꢌ ꢏꢐ ꢑꢒ ꢀ ꢌꢍꢉꢓꢔꢌ ꢁ ꢌꢕꢖ ꢔꢑꢗ ꢕ ꢀꢋꢖꢌ ꢔ

ꢍ ꢏꢖ ꢘ ꢐꢘꢕ ꢖꢓ ꢌꢍ ꢎ ꢙ ꢌ ꢔ ꢌ ꢕꢖ ꢁꢕꢖ ꢆꢌ ꢀꢖꢋꢗ ꢑ ꢐ <ꢂꢚ ꢛ ꢆ

SLVS552 − OCTOBER 2004

WAFER CHIP SCALE INFORMATION

LP2985x-xxYEU NanoStar (0.30-mm Bump)

LP2985x-xxYZU NanoFree (0.30-mm Pb-Free Bump)

987

1,037

1,287

1,337

Pin A1 Index Area

0,35

0,25

0,75 Max

0,30

0,20

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. NanoStar package configuration

D. This package is tin-lead (SnPb), consult the factory for availability of lead-free material.

13

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,

enhancements, improvements, and other changes to its products and services at any time and to discontinue

any product or service without notice. Customers should obtain the latest relevant information before placing

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and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

deems necessary to support this warranty. Except where mandated by government requirements, testing of all

parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for

their products and applications using TI components. To minimize the risks associated with customer products

and applications, customers should provide adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,

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solutions:

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amplifier.ti.com

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interface.ti.com

logic.ti.com

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power.ti.com

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www.ti.com/opticalnetwork

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www.ti.com/video

microcontroller.ti.com

Telephony

Video & Imaging

Wireless

www.ti.com/wireless

Mailing Address:

Texas Instruments

Post Office Box 655303 Dallas, Texas 75265


型号：	LP2985-15YEQR
厂家：	TEXAS INSTRUMENTS
描述：	150-mA LOW-NOISE, LOW-DROPOUT REGULATOR WITH SHUTDOWN FOR OUTPUT VOLTAGES<2.3V 150 mA的低噪声，具有关断功能用于输出电压\u003c 2.3V低压差稳压器稳压器输出元件
文件：	总15页 (文件大小：250K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LP2985-15YEQR [TI]

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