LP2985AITP-1.8/NOPB [TI]
Micropower 150 mA Low-Noise Low-Dropout Regulator 5-DSBGA -40 to 125;
| 型号： | LP2985AITP-1.8/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Micropower 150 mA Low-Noise Low-Dropout Regulator 5-DSBGA -40 to 125 输出元件 调节器 |
| 文件： | 总22页 (文件大小：1279K) |
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LP2985LV-N
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SNOS510P –NOVEMBER 1999–REVISED APRIL 2013
LP2985LV-N Micropower 150 mA Low-Noise Low-Dropout Regulator in SOT-23 and
DSBGA packages for Applications with Output Voltages ≤ 2.0V
Designed for Use with Very Low ESR Output Capacitors
Check for Samples: LP2985LV-N
1
FEATURES
DESCRIPTION
The LP2985LV-N is a 150 mA, fixed-output voltage
regulator designed to provide high performance and
low noise in applications requiring output voltages ≤
2.0V.
2
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Ensured 150 mA Output Current
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Smallest Possible Size (DSBGA)
Requires Minimum External Components
Stable With Low-ESR Output Capacitor
<1 µA Quiescent Current When Shut Down
Low Ground Pin Current at all Loads
Output Voltage Accuracy 1% (A Grade)
High Peak Current Capability
Using an optimized VIP (Vertically Integrated PNP)
process, the LP2985LV-N delivers unequaled
performance in all specifications critical to battery-
powered designs:
Ground Pin Current: Typically 825 µA @ 150 mA
load, and 75 µA @ 1 mA load.
Wide Supply Voltage Range (16V Max)
Low ZOUT: 0.3Ω Typical (10 Hz to 1 MHz)
Overtemperature/Overcurrent Protection
−40°C to +125°C Junction Temperature Range
Custom Voltages Available
Enhanced Stability: The LP2985LV-N is stable with
output capacitor ESR as low as 5 mΩ, which allows
the use of ceramic capacitors on the output.
Sleep Mode: Less than 1 µA quiescent current when
ON/OFF pin is pulled low.
Smallest Possible Size: DSBGA package uses
absolute minimum board space.
APPLICATIONS
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Cellular Phone
Precision Output: 1% tolerance output voltages
available (A grade).
Palmtop/Laptop Computer
Personal Digital Assistant (PDA)
Camcorder, Personal Stereo, Camera
Low Noise: By adding a 10 nF bypass capacitor,
output noise can be reduced to 30 µV (typical).
Block Diagram
Figure 1.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2013, Texas Instruments Incorporated
LP2985LV-N
SNOS510P –NOVEMBER 1999–REVISED APRIL 2013
www.ti.com
Basic Application Circuit
*ON/OFF input must be actively terminated. Tie to VIN if this function is not to be used.
**Minimum capacitance is shown to ensure stability (may be increased without limit). Ceramic capacitor required for
output (see APPLICATION HINTS).
***Reduces output noise (may be omitted if application is not noise critical). Use ceramic or film type with very low
leakage current (see APPLICATION HINTS).
Figure 2.
Connection Diagram
Note: The actual physical placement of the package marking will vary from part to part. Package marking contains
date code and lot traceability information, and will vary considerably. Package marking does not correlate to device
type.
Top View
Top View
Figure 3. 5-Lead SOT-23 Package
See Package Number DBV0005A
Figure 4. 5 Bump DSBGA Package
See Package Number YPB0005
PIN DESCRIPTIONS
Pin Number
Name
Function
SOT-23
DSBGA
C3
VIN
1
2
3
4
5
Input Voltage
GND
A1
Common Ground (device substrate)
Logic high enable input
ON/OFF
BYPASS
VOUT
A3
B2
Bypass capacitor for low noise operation
Regulated output voltage
C1
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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SNOS510P –NOVEMBER 1999–REVISED APRIL 2013
ABSOLUTE MAXIMUM RATINGS(1)(2)
Storage Temperature Range
−65°C to +150°C
−40°C to +125°C
260°C
Operating Junction Temperature Range
Lead Temp. (Soldering, 5 sec.)
ESD Rating(3)
2 kV
Power Dissipation(4)
Internally Limited
−0.3V to +16V
2.2V to +16V
Input Supply Voltage (Survival)
Input Supply Voltage (Operating)
Shutdown Input Voltage (Survival)
Output Voltage (Survival(5)
IOUT (Survival)
−0.3V to +16V
−0.3V to +9V
)
Short Circuit Protected
−0.3V to +16V
Input-Output Voltage (Survival(6)
)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply
when operating the device outside of its rated operating conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) The ESD rating of pins 3 and 4 for the SOT-23 package, or pins 5 and 2 for the DSBGA package, is 1 kV.
(4) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal
resistance, θJ-A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperture is calculated
using:
Where the value of θJ-A for the SOT-23 package is 220°C/W in a typical PC board mounting. Exceeding the maximum allowable
dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown.
(5) If used in a dual-supply system where the regulator load is returned to a negative supply, the LP2985LV-N output must be diode-
clamped to ground.
(6) The output PNP structure contains a diode between the VIN to VOUT terminals that is normally reverse-biased. Reversing the polarity
from VIN to VOUT will turn on this diode, and possibly damage the device (See APPLICATION HINTS).
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ELECTRICAL CHARACTERISTICS(1)
Limits in standard typeface are for TJ = 25°C. and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 1 mA, CIN = 1 µF, COUT = 4.7 µF, VON/OFF = 2V.
LP2985AI-X.X(2)
LP2985I-X.X(2)
Symbol
Parameter
Conditions
Typ
Units
%VNOM
%/V
Min
Max
Min
Max
IL = 1 mA
−1.0
1.0
−1.5
1.5
1 mA ≤ IL ≤ 50 mA
1 mA ≤ IL ≤ 150 mA
−1.5
−2.5
1.5
2.5
−2.5
−3.5
2.5
3.5
Output Voltage
Tolerance
ΔVO
−2.5
−3.5
2.5
3.5
−3.0
−4.0
3.0
4.0
0.007
0.014
0.032
0.014
0.032
Output Voltage
Line Regulation
VO(NOM)+1V ≤ VIN ≤ 16V
95
125
95
125
IL = 0
65
75
110
170
110
170
IL = 1 mA
IL = 10 mA
IL = 50 mA
IL = 150 mA
220
400
220
400
120
300
825
IGND
Ground Pin Current
µA
500
900
500
900
1200
2000
1200
2000
VON/OFF < 0.3V
VON/OFF < 0.15V
0.01
0.8
0.8
0.05
2
2
Minimum Input Voltage
Required To maintain Output
Regulation(3)
VIN(min)
2.05
2.20
2.20
V
150
250
150
250
IL = 50mA
120
280
VIN - VOUT
Dropout Voltage(3)
mV
350
600
350
600
IL = 150mA
High = O/P ON
Low = O/P OFF
VON/OFF = 0
1.4
0.55
0.01
5
1.6
1.6
VON/OFF
ON/OFF Input Voltage(4)
ON/OFF Input Current
V
0.15
−2
0.15
−2
ION/OFF
µA
VON/OFF = 5V
15
15
BW = 300 Hz to 50 kHz,
COUT = 10 µF
CBYPASS = 10 nF
VOUT = 1.8V
en
Output Noise Voltage (RMS)
30
µV
f = 1 kHz, CBYPASS = 10 nF
COUT = 10 µF
Ripple Rejection
45
dB
IO(SC)
IO(PK)
Short Circuit Current
Peak Output Current
RL = 0 (Steady State)(5)
400
350
mA
mA
VOUT ≥ Vo(NOM) −5%
(1) Exposing the DSBGA device to direct sunlight will cause misoperation. See APPLICATION HINTS for additional information.
(2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical
Quality Control (SQC) methods. The limits are used to calculate Average Outgoing Quality Level (AOQL).
(3) VIN must be the greater of 2.2V or VOUT(NOM) + Dropout Voltage to maintain output regulation. Dropout Voltage is defined as the input to
output differential at which the output voltage drops 2% below ther value measured with a 1V differential.
(4) The ON/OFF input must be properly driven to prevent possible misoperation. For details, refer to APPLICATION HINTS.
(5) The LP2985LV-N has foldback current limiting which allows a high peak current when VOUT > 0.5V, and then reduces the maximum
output current as VOUT is forced to ground (see TYPICAL PERFORMANCE CHARACTERISTICS curves).
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SNOS510P –NOVEMBER 1999–REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise specified: CIN = 1µF, COUT = 4.7µF, VIN = VOUT(NOM) +1, VOUT = 1.8V, TA = 25°C, ON/OFF pin is tied to VIN
VOUT vs Temperature
Short-Circuit Current
Figure 5.
Figure 6.
Short-Circuit Current
Short-Circuit Current vs Output Voltage
Figure 7.
Figure 8.
Ripple Rejection
COUT = 4.7µF, Bypass = 10nF
Ripple Rejection
COUT = 4.7µF, No Bypass
Figure 9.
Figure 10.
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SNOS510P –NOVEMBER 1999–REVISED APRIL 2013
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Unless otherwise specified: CIN = 1µF, COUT = 4.7µF, VIN = VOUT(NOM) +1, VOUT = 1.8V, TA = 25°C, ON/OFF pin is tied to VIN
Output Impedance vs Frequency
Output Impedance vs Frequency
Figure 11.
Figure 12.
Noise Density
Noise Density
Figure 13.
Figure 14.
Ground Pin vs Load Current
Minimum Input Voltage vs Temperature
Figure 15.
Figure 16.
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SNOS510P –NOVEMBER 1999–REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Unless otherwise specified: CIN = 1µF, COUT = 4.7µF, VIN = VOUT(NOM) +1, VOUT = 1.8V, TA = 25°C, ON/OFF pin is tied to VIN
Minimum Input Voltage vs Temperature
Input Current vs VIN
Figure 17.
Figure 18.
Input Current vs VIN
Input Current vs VIN
Figure 19.
Figure 20.
Ground Pin Current vs Temperature
Instantaneous Short Circuit Current
Figure 21.
Figure 22.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Unless otherwise specified: CIN = 1µF, COUT = 4.7µF, VIN = VOUT(NOM) +1, VOUT = 1.8V, TA = 25°C, ON/OFF pin is tied to VIN
Output Characteristics
Load Transient
Figure 23.
Figure 24.
Load Transient
Load Transient
Figure 25.
Figure 26.
Line Transient
Line Transient
Figure 27.
Figure 28.
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SNOS510P –NOVEMBER 1999–REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Unless otherwise specified: CIN = 1µF, COUT = 4.7µF, VIN = VOUT(NOM) +1, VOUT = 1.8V, TA = 25°C, ON/OFF pin is tied to VIN
Line Transient
Line Transient
Figure 29.
Figure 30.
Turn-On Time
Turn-On Time
Figure 31.
Figure 32.
Turn-On Time
Turn-On Time
Figure 33.
Figure 34.
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LP2985LV-N
SNOS510P –NOVEMBER 1999–REVISED APRIL 2013
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APPLICATION HINTS
EXTERNAL CAPACITORS
Like any low-dropout regulator, the LP2985LV-N requires external capacitors for regulator stability. These
capacitors must be correctly selected for good performance.
Input Capacitor
An input capacitor whose capacitance is ≥ 1 µF is required between the LP2985LV-N input and ground (the
amount of capacitance may be increased without limit).
This capacitor must be located a distance of not more than 1 cm from the input pin and returned to a clean
analog ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input.
Important: Tantalum capacitors can suffer catastrophic failure due to surge current when connected to a low-
impedance source of power (like a battery or very large capacitor). If a Tantalum capacitor is used at the input, it
must be ensured by the manufacturer to have a surge current rating sufficient for the application.
There are no requirements for ESR on the input capacitor, but tolerance and temperature coefficient must be
considered when selecting the capacitor to ensure the capacitance will be ≥ 1 µF over the entire operating
temperature range.
Output Capacitor
The LP2985LV-N is designed specifically to work with ceramic output capacitors, utilizing circuitry which allows
the regulator to be stable across the entire range of output current with an output capacitor whose ESR is as low
as 5 mΩ. It may also be possible to use Tantalum or film capacitors at the output, but these are not as attractive
for reasons of size and cost (see CAPACITOR CHARACTERISTICS section).
The output capacitor must meet the requirement for minimum amount of capacitance and also have an ESR
(equivalent series resistance) value which is within the stable range. Curves are provided which show the stable
ESR range as a function of load current (see ESR graphs Figure 35 and Figure 36).
Figure 35. LP2985LV-N 2.2µF Stable ESR Range
Figure 36. LP2985LV-N 4.7µF Stable ESR Range
Important: The output capacitor must maintain its ESR within the stable region over the full operating
temperature range of the application to assure stability.
The LP2985LV-N requires a minimum of 2.2 µF on the output (output capacitor size can be increased without
limit).
It is important to remember that capacitor tolerance and variation with temperature must be taken into
consideration when selecting an output capacitor so that the minimum required amount of output capacitance is
provided over the full operating temperature range. It should be noted that ceramic capacitors can exhibit large
changes in capacitance with temperature (see CAPACITOR CHARACTERISTICS section).
The output capacitor must be located not more than 1 cm from the output pin and returned to a clean analog
ground.
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Noise Bypass Capacitor
Connecting a 10 nF capacitor to the Bypass pin significantly reduces noise on the regulator output. It should be
noted that the capacitor is connected directly to a high-impedance circuit in the bandgap reference.
Because this circuit has only a few microamperes flowing in it, any significant loading on this node will cause a
change in the regulated output voltage. For this reason, DC leakage current through the noise bypass capacitor
must never exceed 100 nA, and should be kept as low as possible for best output voltage accuracy.
The types of capacitors best suited for the noise bypass capacitor are ceramic and film. High-quality ceramic
capacitors with either NPO or COG dielectric typically have very low leakage. 10 nF polypropolene and
polycarbonate film capacitors are available in small surface-mount packages and typically have extremely low
leakage current.
CAPACITOR CHARACTERISTICS
The LP2985LV-N was designed to work with ceramic capacitors on the output to take advantage of the benefits
they offer: for capacitance values in the 2.2 µF to 4.7 µF range, ceramics are the least expensive and also have
the lowest ESR values (which makes them best for eliminating high-frequency noise). The ESR of a typical 2.2
µF ceramic capacitor is in the range of 10 mΩ to 20 mΩ, which easily meets the ESR limits required for stability
by the LP2985LV-N.
One disadvantage of ceramic capacitors is that their capacitance can vary with temperature. Most large value
ceramic capacitors (≥ 2.2 µF) are manufactured with the Z5U or Y5V temperature characteristic, which results in
the capacitance dropping by more than 50% as the temperature goes from 25°C to 85°C.
This could cause problems if a 2.2 µF capacitor were used on the output since it will drop down to approximately
1 µF at high ambient temperatures (which could cause the LP2985LV-N to oscillate). If Z5U or Y5V capacitors
are used on the output, a minimum capacitance value of 4.7 µF must be observed.
A better choice for temperature coefficient in ceramic capacitors is X7R, which holds the capacitance within
±15%. Unfortunately, the larger values of capacitance are not offered by all manufacturers in the X7R dielectric.
Tantalum
Tantalum capacitors are less desirable than ceramics for use as output capacitors because they are more
expensive when comparing equivalent capacitance and voltage ratings in the 1 µF to 4.7 µF range.
Another important consideration is that Tantalum capacitors have higher ESR values than equivalent size
ceramics. This means that while it may be possible to find a Tantalum capacitor with an ESR value within the
stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic
capacitor with the same ESR value.
It should also be noted that the ESR of a typical Tantalum will increase about 2:1 as the temperature goes from
25°C down to −40°C, so some guard band must be allowed.
On/Off Input Operation
The LP2985LV-N is shut off by driving the ON/OFF input low, and turned on by pulling it high. If this feature is
not to be used, the ON/OFF input should be tied to VIN to keep the regulator output on at all times.
To assure proper operation, the signal source used to drive the ON/OFF input must be able to swing above and
below the specified turn-on/turn-off voltage thresholds listed in the ELECTRICAL CHARACTERISTICS(1) section
under VON/OFF. To prevent mis-operation, the turn-on (and turn-off) voltage signals applied to the ON/OFF input
must have a slew rate which is ≥ 40 mV/µs.
CAUTION
The regulator output voltage cannot be ensured if a slow-moving AC (or DC) signal is
applied that is in the range between the specified turn-on and turn-off voltages listed
under the electrical specification VON/OFF (see Electrical Characteristics).
(1) Exposing the DSBGA device to direct sunlight will cause misoperation. See APPLICATION HINTS for additional information.
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REVERSE INPUT-OUTPUT VOLTAGE
The PNP power transistor used as the pass element in the LP2985LV-N has an inherent diode connected
between the regulator output and input. During normal operation (where the input voltage is higher than the
output) this diode is reverse-biased.
V
V
OUT
IN
PNP
GND
Figure 37. Normal Operation
However, if the output is pulled above the input, this diode will turn ON and current will flow into the regulator
output. In such cases, a parasitic SCR can latch which will allow a high current to flow into VIN (and out the
ground pin), which can damage the part.
In any application where the output may be pulled above the input, an external Schottky diode must be
connected from VIN to VOUT (cathode on VIN, anode on VOUT), to limit the reverse voltage across the LP2985LV-N
to 0.3V (see ABSOLUTE MAXIMUM RATINGS).
SCHOTTKY DIODE
V
V
OUT
IN
PNP
GND
Figure 38. Operation with Schottky Diode
DSBGA MOUNTING
The DSBGA package requires specific mounting techniques which are detailed in Texas Instruments Application
Note AN-1112. Referring to the section Surface Mount Technology (SMT) Assembly Considerations, it should be
noted that the pad style which must be used with the 5-pin package is the NSMD (non-solder mask defined)
type.
For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the
DSBGA device.
DSBGA LIGHT SENSITIVITY
Exposing the DSBGA device to direct sunlight will cause misoperation of the device. Light sources such as
Halogen lamps can also affect electrical performance if brought near to the device.
The wavelengths which have the most detrimental effect are reds and infra-reds, which means that the
fluorescent lighting used inside most buildings has very little effect on performance. A DSBGA test board was
brought to within 1 cm of a fluorescent desk lamp and the effect on the regulated output voltage was negligible,
showing a deviation of less than 0.1% from nominal.
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REVISION HISTORY
Changes from Revision O (April 2013) to Revision P
Page
•
Changed layout of National Data Sheet to TI format .......................................................................................................... 12
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PACKAGE OPTION ADDENDUM
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1-Nov-2013
PACKAGING INFORMATION
Orderable Device
LP2985AIM5-1.5/NOPB
LP2985AIM5-1.8/NOPB
LP2985AIM5-2.0/NOPB
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
ACTIVE
SOT-23
SOT-23
SOT-23
DBV
5
5
5
1000
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
LCHA
LAYA
LCDA
ACTIVE
ACTIVE
DBV
DBV
1000
1000
Green (RoHS
& no Sb/Br)
-40 to 125
Green (RoHS
& no Sb/Br)
-40 to 125
LP2985AIM5X-1.8
NRND
SOT-23
SOT-23
DBV
DBV
5
5
3000
3000
TBD
Call TI
CU SN
Call TI
-40 to 125
-40 to 125
LAYA
LAYA
LP2985AIM5X-1.8/NOPB
ACTIVE
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LP2985AIM5X-2.0/NOPB
LP2985AITP-1.5/NOPB
LP2985AITP-1.8/NOPB
LP2985AITPX-1.5/NOPB
LP2985AITPX-1.8/NOPB
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
DSBGA
DSBGA
DSBGA
DSBGA
DBV
YPB
YPB
YPB
YPB
5
5
5
5
5
3000
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
LCDA
Green (RoHS
& no Sb/Br)
SNAGCU
SNAGCU
SNAGCU
SNAGCU
5
5
5
5
250
Green (RoHS
& no Sb/Br)
3000
3000
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
-40 to 125
LP2985IM5-1.8
NRND
SOT-23
SOT-23
DBV
DBV
5
5
1000
1000
TBD
Call TI
CU SN
Call TI
-40 to 125
-40 to 125
LAYB
LAYB
LP2985IM5-1.8/NOPB
ACTIVE
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LP2985IM5-2.0
NRND
SOT-23
SOT-23
DBV
DBV
5
5
1000
1000
TBD
Call TI
CU SN
Call TI
-40 to 125
-40 to 125
LCDB
LCDB
LP2985IM5-2.0/NOPB
ACTIVE
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
LP2985IM5X-1.8/NOPB
LP2985IM5X-2.0/NOPB
LP2985ITP-1.5/NOPB
LP2985ITP-1.8/NOPB
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
DSBGA
DSBGA
DBV
DBV
YPB
YPB
5
5
5
5
3000
3000
250
Green (RoHS
& no Sb/Br)
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
LAYB
LCDB
5
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
SNAGCU
SNAGCU
250
Green (RoHS
& no Sb/Br)
5
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
LP2985ITPX-1.5/NOPB
LP2985ITPX-1.8/NOPB
ACTIVE
DSBGA
DSBGA
YPB
5
5
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
5
5
ACTIVE
YPB
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
1-Nov-2013
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LP2985AIM5-1.5/NOPB SOT-23
LP2985AIM5-1.8/NOPB SOT-23
LP2985AIM5-2.0/NOPB SOT-23
DBV
DBV
DBV
DBV
DBV
DBV
YPB
YPB
YPB
YPB
DBV
DBV
DBV
DBV
YPB
YPB
YPB
YPB
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
1000
1000
1000
3000
3000
3000
250
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
3.2
3.2
3.2
3.2
1.4
1.4
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
Q1
Q1
Q1
Q1
Q3
Q3
Q3
Q3
Q1
Q1
Q1
Q1
3.2
3.2
1.4
LP2985AIM5X-1.8
SOT-23
3.2
3.2
1.4
LP2985AIM5X-1.8/NOPB SOT-23
LP2985AIM5X-2.0/NOPB SOT-23
LP2985AITP-1.5/NOPB DSBGA
LP2985AITP-1.8/NOPB DSBGA
LP2985AITPX-1.5/NOPB DSBGA
LP2985AITPX-1.8/NOPB DSBGA
3.2
3.2
1.4
3.2
3.2
1.4
1.02
1.02
1.02
1.02
3.2
1.19
1.19
1.19
1.19
3.2
0.66
0.66
0.66
0.66
1.4
250
3000
3000
1000
1000
1000
3000
250
LP2985IM5-1.8
LP2985IM5-2.0
SOT-23
SOT-23
SOT-23
3.2
3.2
1.4
LP2985IM5-2.0/NOPB
3.2
3.2
1.4
LP2985IM5X-2.0/NOPB SOT-23
3.2
3.2
1.4
LP2985ITP-1.5/NOPB
LP2985ITP-1.8/NOPB
DSBGA
DSBGA
1.02
1.02
1.02
1.02
1.19
1.19
1.19
1.19
0.66
0.66
0.66
0.66
250
LP2985ITPX-1.5/NOPB DSBGA
LP2985ITPX-1.8/NOPB DSBGA
3000
3000
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Sep-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
LP2985AIM5-1.5/NOPB
LP2985AIM5-1.8/NOPB
LP2985AIM5-2.0/NOPB
LP2985AIM5X-1.8
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DSBGA
DSBGA
DSBGA
DSBGA
SOT-23
SOT-23
SOT-23
SOT-23
DSBGA
DSBGA
DSBGA
DSBGA
DBV
DBV
DBV
DBV
DBV
DBV
YPB
YPB
YPB
YPB
DBV
DBV
DBV
DBV
YPB
YPB
YPB
YPB
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
1000
1000
1000
3000
3000
3000
250
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
210.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
185.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
LP2985AIM5X-1.8/NOPB
LP2985AIM5X-2.0/NOPB
LP2985AITP-1.5/NOPB
LP2985AITP-1.8/NOPB
LP2985AITPX-1.5/NOPB
LP2985AITPX-1.8/NOPB
LP2985IM5-1.8
250
3000
3000
1000
1000
1000
3000
250
LP2985IM5-2.0
LP2985IM5-2.0/NOPB
LP2985IM5X-2.0/NOPB
LP2985ITP-1.5/NOPB
LP2985ITP-1.8/NOPB
LP2985ITPX-1.5/NOPB
LP2985ITPX-1.8/NOPB
250
3000
3000
Pack Materials-Page 2
MECHANICAL DATA
YPB0005
0.5±0.045
D
E
TPA05XXX (Rev C)
D: Max = 1.159 mm, Min =1.098 mm
E: Max = 0.981 mm, Min = 0.92 mm
4215098/A
12/12
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
NOTES:
www.ti.com
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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Copyright © 2013, Texas Instruments Incorporated
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