LP38512TSX-1.8 [TI]
1.5A Fast-Transient Response Low-Dropout Linear Voltage Regulator with Error Flag;
| 型号： | LP38512TSX-1.8 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 1.5A Fast-Transient Response Low-Dropout Linear Voltage Regulator with Error Flag |
| 文件： | 总16页 (文件大小：359K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LP38512
LP38512-1.8 1.5A Fast-Transient Response Low-Dropout Linear Voltage
Regulator with Error Flag
Literature Number: SNOSAU7E
March 6, 2009
LP38512-1.8
1.5A Fast-Transient Response Low-Dropout Linear
Voltage Regulator with Error Flag
General Description
Features
The LP38512-1.8 Fast-Transient Response Low-Dropout
Voltage Regulator offers the highest-performance in meeting
AC and DC accuracy requirements for powering Digital
Cores. The LP38512-1.8 uses a proprietary control loop that
enables extremely fast response to change in line conditions
and load demands. Output Voltage DC accuracy is guaran-
teed at 2.5% over line, load and full temperature range from
-40°C to +125°C. The LP38512-1.8 is designed for inputs
from the 2.5V, 3.3V, and 5.0V rail, is stable with 10 μF ceramic
capacitors, and has a fixed 1.8V output. An Error Flag feature
monitors the output voltage and notifies the system processor
when the output voltage falls more than 15% below the nom-
inal value. The LP38512-1.8 provides excellent transient per-
formance to meet the demand of high performance digital
core ASICs, DSPs, and FPGAs found in highly-intensive ap-
plications such as servers, routers/switches, and base sta-
tions.
2.25V to 5.5V Input Voltage Range
■
■
■
1.8V Fixed Output Voltage
1.5A Output Load Current
±2.5% Accuracy over Line, Load, and Full-Temperature
Range from -40°C to +125°C
■
Stable with tiny 10 µF ceramic capacitors
■
■
0.20% Output Voltage Load Regulation from 10 mA to
1.5A
Enable pin
■
■
■
■
■
■
Error Flag Indicates Status of Output Voltage
1uA of Quiescent current in Shutdown
40dB of PSRR at 100 kHz
Over-Temperature and Over-Current Protection
TO-263 and TO-263 THIN Surface Mount Packages
Applications
Digital Core ASICs, FPGAs, and DSPs
■
■
■
■
■
■
Servers
Routers and Switches
Base Stations
Storage Area Networks
DDR2 Memory
Typical Application Circuit
20183001
© 2009 National Semiconductor Corporation
201830
www.national.com
Ordering Information
TABLE 1. Package Marking and Ordering Information
Output
Voltage
Order Number
Package Type
Package Marking
Supplied As:
LP38512TJ-1.8
LP38512TS-1.8
LP38512TSX-1.8
TO263-5 THIN
TO263-5
LP38512TJ-1.8
LP38512TS-1.8
LP38512TS-1.8
Tape and Reel
Rail
1.8
TO263-5
Tape and Reel
Connection Diagrams
20183005
20183004
Top View
TO-263 THIN 5 Pin Package
Top View
TO-263 5 Pin Package
Pin Descriptions for TO-263 and TO-263 THIN Packages
Pin #
Pin Name
Function
Enable. Pull high to enable the output, low to disable the output. This pin has no internal bias
and must be tied to the input voltage, or actively driven.
1
EN
2
3
4
IN
Input Supply Pin
GND
OUT
Ground
Regulated Output Voltage Pin
ERROR Flag. A high level indicates that VOUT is within typically 15% (VOUT falling) of the
nominal regulated voltage.
5
ERROR
The TO-263 TAB, and the TO-263 THIN DAP, is used as a thermal connection to remove
heat from the device to an external heatsink. The TAB/DAP is internally connected to device
pin 3, and is electrical ground connection.
TAB/DAP
TAB/DAP
www.national.com
2
Absolute Maximum Ratings (Note 1)
Operating Ratings (Note 1)
Input Supply Voltage, VIN
Enable Input Voltage, VEN
ERROR Pin Voltage
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
2.25V to 5.5V
0.0V to 5.5V
0.0V to VIN
Storage Temperature Range
Soldering Temperature (Note 3)
TO-220, Wave
−65°C to +150°C
Output Current (DC)
Junction Temperature (Note 4)
0 mA to 1.5A
−40°C to +125°C
260°C, 10s
235°C, 30s
TO-263
ESD Rating (Note 2)
±2 kV
Power Dissipation(Note 4)
Input Pin Voltage (Survival)
Enable Pin Voltage (Survival)
Output Pin Voltage (Survival)
ERROR Pin Voltage (Survival)
IOUT(Survival)
Internally Limited
−0.3V to +6.0V
−0.3V to +6.0V
−0.3V to +6.0V
0.3V to +6.0V
Internally Limited
Electrical Characteristics
Unless otherwise specified: VIN = 2.5V, IOUT = 10 mA, CIN = 10 µF, COUT = 10 µF, VEN = VIN. Limits in standard type are for TJ =
25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum
limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at
TJ = 25°C, and are provided for reference purposes only.
Symbol
Parameter
Conditions
2.25V ≤ VIN ≤ 5.5V
10 mA ≤ IOUT ≤ 1.5A
Min
Typ
Max
Units
Output Voltage Tolerance
(Note 7)
-1.0
−2.5
+1.0
+2.5
VOUT
0
%
Output Voltage Line
ΔVOUT/ΔVIN Regulation
0.02
0.06
-
-
-
-
%/V
2.25V ≤ VIN ≤ 5.5V
(Notes 5, 7)
Output Voltage Load
ΔVOUT/ΔIOUT Regulation
0.25
0.40
%/A
mV
10 mA ≤ IOUT ≤ 1.5A
(Notes 6, 7)
Dropout Voltage
(Note 8)
340
400
VDO
IOUT = 1.5A
-
-
-
250
7.5
9.5
IOUT = 10 mA
11
12
ERROR pin = GND
IOUT = 1.5A
Ground Pin Current, Output
Enabled
mA
13
IGND
14
ERROR pin = GND
VEN = 0.50V
Ground Pin Current, Output
Disabled
3.5
12
-
-
0.1
2.5
µA
A
ERROR pin = GND
VOUT = 0V
ISC
Short Circuit Current
-
Enable Input
VEN rising from 0.50V until
VOUT = ON
0.90
0.80
1.50
1.60
VEN(ON)
Enable ON Threshold
1.20
V
VEN falling from 1.60V until
VOUT = OFF
0.60
0.50
1.40
1.50
VEN(OFF)
VEN(HYS)
td(OFF)
Enable OFF Threshold
Enable Hysteresis
Turn-off delay
1.00
200
1
VEN(ON) - VEN(OFF)
-
-
mV
µs
Time from VEN < VEN(OFF) to VOUT
OFF, ILOAD = 1.5A
=
-
-
Time from VEN >VEN(ON) to VOUT
ON, ILOAD = 1.5A
=
td(ON)
Turn-on delay
-
25
-
VEN = VIN
VEN = 0V
-
-
1
-
-
IEN
Enable Pin Current
nA
-1
3
www.national.com
Symbol
Parameter
Conditions
Min
Typ
Max
Units
ERROR Flag
VOUT rising threshold where
ERROR Flag goes high
VOUT falling threshold where
ERROR Flag goes low
78
74
-
90
85
98
93
45
Error Flag Threshold
(Note 9)
VTH
%
ERROR Flag Saturation
Voltage
VERROR(SAT)
Ilk
ISINK = 100 µA
VERROR = 5.5V
12.5
mV
ERROR Flag Pin Leakage
Current
-
-
1
1
-
-
nA
µs
td
ERROR Flag Delay time
AC Parameters
VIN = 2.5V
f = 120Hz
VIN = 2.5V
f = 1 kHz
-
-
73
73
-
-
PSRR
en
Ripple Rejection
dB
Output Noise Density
Output Noise Voltage
f = 120Hz
-
-
2
-
-
nV/√Hz
µV (RMS)
BW = 100Hz – 100kHz
75
Thermal Characteristics
TSD
TJ rising
Thermal Shutdown
-
-
165
10
-
-
°C
TJ falling from TSD
ΔTSD
Thermal Shutdown Hysteresis
Thermal Resistance
Junction to Ambient
(Note 4)
θJ-A
TO-263 and TO-263 THIN
TO-263 and TO-263 THIN
-
-
60
3
-
-
°C/W
°C/W
Thermal Resistance
Junction to Case
θJ-C
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and conditions, see the Electrical Characteristics.
Note 2: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. Test method is per JESD22-A114.
Note 3: Refer to JEDEC J-STD-020C for surface mount device (SMD) package reflow profiles and conditions. Unless otherwise stated, the temperatures and
times are for Sn-Pb (STD) only.
Note 4: Device operation must be evaluated, and derated as needed, based on ambient temperature (TA), power dissipation (PD), maximum allowable operating
junction temperature (TJ(MAX)), and package thermal resistance (θJA).
Note 5: Output voltage line regulation is defined as the change in output voltage from the nominal value (ΔVOUT) due to a change in the voltage at the input
(ΔVIN).
Note 6: Output voltage load regulation is defined as the change in output voltage from the nominal value (ΔVOUT) due to a change in the load current at the output
(ΔIOUT).
Note 7: The line and load regulation specification contains only the typical number. However, the limits for line and load regulation are included in the output
voltage tolerance specification.
Note 8: Dropout voltage is defined as the minimum input to output differential voltage at which the output drops 2% below the nominal value. For the LP38512-1.8
the minimum VIN operating voltage is the limiting factor.
Note 9: The ERROR Flag thresholds are specified as percentage of the nominal regulated output voltage. See Application Information.
www.national.com
4
Typical Performance Characteristics Unless otherwise specified: TJ = 25°C, VIN = 2.5V, VEN = VIN,
CIN = 10 µF, COUT = 10 µF, IOUT = 10 mA.
VOUT vs Temperature
VOUT vs VIN
20183011
20183037
Ground Pin Current (IGND) vs VIN
Ground Pin Current (IGND) vs Temperature
20183012
20183013
Ground Pin Current(IGND) vs Temperature, VEN = 0.5V
Enable Thresholds vs Temperature
20183016
20183014
5
www.national.com
VOUT vs VEN (td(ON)
)
VOUT vs VEN (td(OFF))
20183032
20183030
VOUT ERROR Flag Threshold vs Temperature
ERROR Flag Low vs Temperature
20183018
20183017
Load regulation vs Temperature
Line Regulation vs Temperature
20183020
20183021
www.national.com
6
Current Limit vs Temperature
Load Transient, 10 mA to 1.5A
COUT = 10 μF Ceramic
20183022
20183023
Load Transient, 10 mA to 1.5A
COUT = 10 µF Ceramic + 100 µF Aluminum
Load Transient, 500 mA to 1.5A
COUT = 10 µF Ceramic
20183024
20183025
Load Transient, 500 mA to 1.5A
Line Transient
COUT = 10 μF Ceramic + 100 µF Aluminum
20183027
20183026
7
www.national.com
PSRR, 10Hz to 1MHz
Noise
20183029
20183031
www.national.com
8
Block Diagram
20183007
Application Information
EXTERNAL CAPACITORS
voltage becomes reversed. A less common condition is when
an alternate voltage source is connected to the output.
Like any low-dropout regulator, external capacitors are re-
quired to assure stability. These capacitors must be correctly
selected for proper performance.
There are two possible paths for current to flow from the out-
put pin back to the input during a reverse voltage condition.
While VIN is high enough to keep the control circuity alive, and
the Enable pin is above the VEN(ON) threshold, the control cir-
cuitry will attempt to regulate the output voltage. Since the
input voltage is less than the output voltage the control circuit
will drive the gate of the pass element to the full on condition
when the output voltage begins to fall. In this condition, re-
verse current will flow from the output pin to the input pin,
limited only by the RDS(ON) of the pass element and the output
to input voltage differential. Discharging an output capacitor
up to 1000 µF in this manner will not damage the device as
the current will rapidly decay. However, continuous reverse
current should be avoided.
Input Capacitor
A ceramic input capacitor of at least 10 µF is required. For
general usage across all load currents and operating condi-
tions, a 10 µF ceramic input capacitor will provide satisfactory
performance.
Output Capacitor
A ceramic capacitor with a minimum value of 10 µF is required
at the output pin for loop stability. It must be located less than
1 cm from the device and connected directly to the output and
ground pin using traces which have no other currents flowing
through them. As long as the minimum of 10 µF ceramic is
met, there is no limitation on any additional capacitance.
The internal PFET pass element in the LP38512 has an in-
herent parasitic diode. During normal operation, the input
voltage is higher than the output voltage and the parasitic
diode is reverse biased. However, if the output voltage to input
voltage differential is more than 500 mV (typical) the parasitic
diode becomes forward biased and current flows from the
output pin to the input through the diode. The current in the
parasitic diode should limited to less than 1A continuous and
5A peak.
X7R and X5R dielectric ceramic capacitors are strongly rec-
ommended, as they typically maintain a capacitance range
within ±20% of nominal over full operating ratings of temper-
ature and voltage. Of course, they are typically larger and
more costly than Z5U/Y5U types for a given voltage and ca-
pacitance.
Z5U and Y5V dielectric ceramics are not recommended as
the capacitance will drops severely with applied voltage. A
typical Z5U or Y5V capacitor can lose 60% of its rated ca-
pacitance with half of the rated voltage applied to it. The Z5U
and Y5V also exhibit a severe temperature effect, losing more
than 50% of nominal capacitance at high and low limits of the
temperature range.
If used in a dual-supply system where the regulator output
load is returned to a negative supply, the output pin must be
diode clamped to ground. A Schottky diode is recommended
for this protective clamp.
SHORT-CIRCUIT PROTECTION
The LP38512 is short circuit protected, and in the event of a
peak over-current condition the short-circuit control loop will
rapidly drive the output PMOS pass element off. Once the
power pass element shuts down, the control loop will rapidly
cycle the output on and off until the average power dissipation
causes the thermal shutdown circuit to respond to servo the
REVERSE VOLTAGE
A reverse voltage condition will exist when the voltage at the
output pin is higher than the voltage at the input pin. Typically
this will happen when VIN is abruptly taken low and COUT con-
tinues to hold a sufficient charge such that the input to output
9
www.national.com
on/off cycling to a lower frequency. Please refer to the POW-
ER DISSIPATION/HEATSINKING section for power dissipa-
tion calculations.
trol loop will be active and the ERROR Flag will report the
status of the output voltage. When the Enable pin is taken low
the regulator control loop is shutdown, the output is turned off,
and the ERROR Flag pin is immediately forced low.
ENABLE OPERATION
ERROR FLAG OPERATION
The Enable ON threshold is typically 1.2V, and the OFF
threshold is typically 1.0V. To ensure reliable operation the
Enable pin voltage must rise above the maximum VEN(ON)
threshold and must fall below the minimum VEN(OFF) thresh-
old. The Enable threshold has typically 200mV of hysteresis
to improve noise immunity.
When the LP38512 Enable pin is high, the ERROR Flag pin
will produce a logic low signal when the output drops by more
than 15% (typical) from the nominal output voltage. The drop
in output voltage may be due to low input voltage, current
limiting, or thermal limiting. This flag has a built in hysteresis.
The output voltage will need to rise to within 10% (typical) of
the nominal output voltage for the ERROR Flag to return to a
logic high state. It should also be noted that when the Enable
pin is pulled low, the ERROR Flag pin is forced to be low as
well.
The Enable pin (EN) has no internal pull-up or pull-down to
establish a default condition and, as a result, this pin must be
terminated either actively or passively.
If the Enable pin is driven from a single ended device (such
as discrete transistor) a pull-up resistor to VIN, or a pull-down
resistor to ground, will be required for proper operation. A
1 kΩ to 100 kΩ resistor can be used as the pull-up or pull-
down resistor to establish default condition for the EN pin. The
resistor value selected should be appropriate to swamp out
any leakage in the external single ended device, as well as
any stray capacitance.
The internal ERROR flag comparator has an open drain out-
put stage. Hence, the ERROR pin requires an external
pull-up resistor. The value of the pull-up resistor should be in
the range of 10 kΩ to 1 MΩ. The ERROR Flag pin should not
be pulled-up to any voltage source higher than VIN as current
flow through an internal parasitic diode may cause unexpect-
ed behavior. The ERROR Flag must be connected to ground
if this function is not used.
If the Enable pin is driven from a source that actively pulls high
and low (such as a CMOS rail to rail comparator output), the
pull-up, or pull-down, resistor is not required.
The timing diagram in Figure 1 shows the relationship be-
tween the ERROR flag and the output voltage.
If the application does not require the Enable function, the pin
should be connected to directly to the adjacent VIN pin.
The status of the Enable pin also affects the behavior of the
ERROR Flag. While the Enable pin is high the regulator con-
20183008
FIGURE 1. ERROR Flag Operation, see Typical Application
www.national.com
10
20183034
FIGURE 2. ERROR Flag Operation, biased from VIN
POWER DISSIPATION/HEATSINKING
A heatsink may be required depending on the maximum pow-
er dissipation (PD(MAX)), maximum ambient temperature
(TA(MAX)) of the application, and the thermal resistance (θJA
)
of the package. Under all possible conditions, the junction
temperature (TJ) must be within the range specified in the
Operating Ratings. The total power dissipation of the device
is given by:
PD = ( (VIN−VOUT) x IOUT) + (VIN x IGND
)
(1)
where IGND is the operating ground current of the device
(specified under Electrical Characteristics).
20183035
The maximum allowable junction temperature rise (ΔTJ) de-
pends on the maximum expected ambient temperature (TA
(MAX)) of the application, and the maximum allowable junction
temperature (TJ(MAX)):
FIGURE 3. θJA vs Copper (1 Ounce) Area for TO-263
package
As shown in the figure, increasing the copper area beyond 1
square inch produces very little improvement. The minimum
value for θJA for the TO-263 package mounted to a two-layer
PCB is 32°C/W.
ΔTJ = TJ(MAX)− TA(MAX)
(2)
Figure 4 shows the maximum allowable power dissipation for
TO-263 packages for different ambient temperatures, assum-
ing θJA is 35°C/W and the maximum junction temperature is
125°C.
The maximum allowable value for junction to ambient Ther-
mal Resistance, θJA, can be calculated using the formula:
θJA = ΔTJ / PD(MAX)
(3)
HEATSINKING TO-263 PACKAGE
The TO-263 and the TO-263 THIN packages use the copper
plane on the PCB as a heatsink. The tab, or DAP, of these
packages are soldered to the copper plane for heat sinking.
Figure 3 shows a curve for the θJA of TO-263 package for
different copper area sizes, using a typical PCB with 1 ounce
copper and no solder mask over the copper area for heat
sinking.
20183036
FIGURE 4. Maximum Power Dissipation vs Ambient
Temperature for TO-263 Package
11
www.national.com
Physical Dimensions inches (millimeters) unless otherwise noted
TO-263, Molded, 5-Lead, 0.067in (1.7mm) Pitch, Surface Mount Package
NS Package Number TS5B
TO-263 THIN, Molded, 5-Lead, 1.7mm Pitch, Surface Mount Package
NS Package Number TJ5A
www.national.com
12
Notes
13
www.national.com
Notes
For more National Semiconductor product information and proven design tools, visit the following Web sites at:
Products
www.national.com/amplifiers
Design Support
Amplifiers
WEBENCH® Tools
App Notes
www.national.com/webench
www.national.com/appnotes
www.national.com/refdesigns
www.national.com/samples
www.national.com/evalboards
www.national.com/packaging
www.national.com/quality/green
www.national.com/contacts
Audio
www.national.com/audio
www.national.com/timing
www.national.com/adc
www.national.com/interface
www.national.com/lvds
www.national.com/power
www.national.com/switchers
www.national.com/ldo
Clock and Timing
Data Converters
Interface
Reference Designs
Samples
Eval Boards
LVDS
Packaging
Power Management
Switching Regulators
LDOs
Green Compliance
Distributors
Quality and Reliability www.national.com/quality
LED Lighting
Voltage Reference
PowerWise® Solutions
www.national.com/led
Feedback/Support
Design Made Easy
Solutions
www.national.com/feedback
www.national.com/easy
www.national.com/vref
www.national.com/powerwise
www.national.com/solutions
www.national.com/milaero
www.national.com/solarmagic
www.national.com/AU
Serial Digital Interface (SDI) www.national.com/sdi
Mil/Aero
Temperature Sensors
Wireless (PLL/VCO)
www.national.com/tempsensors SolarMagic™
www.national.com/wireless
Analog University®
THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION
(“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY
OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO
SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS,
IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS
DOCUMENT.
TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT
NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL
PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR
APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND
APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE
NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS.
EXCEPT AS PROVIDED IN NATIONAL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NATIONAL ASSUMES NO
LIABILITY WHATSOEVER, AND NATIONAL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO THE SALE
AND/OR USE OF NATIONAL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR
PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY
RIGHT.
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and
whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected
to result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform
can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness.
National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other
brand or product names may be trademarks or registered trademarks of their respective holders.
Copyright© 2009 National Semiconductor Corporation
For the most current product information visit us at www.national.com
National Semiconductor
Americas Technical
Support Center
National Semiconductor Europe
Technical Support Center
Email: europe.support@nsc.com
National Semiconductor Asia
Pacific Technical Support Center
Email: ap.support@nsc.com
National Semiconductor Japan
Technical Support Center
Email: jpn.feedback@nsc.com
Email: support@nsc.com
Tel: 1-800-272-9959
www.national.com
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Audio
Applications
www.ti.com/audio
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
Communications and Telecom www.ti.com/communications
Amplifiers
Data Converters
DLP® Products
DSP
Computers and Peripherals
Consumer Electronics
Energy and Lighting
Industrial
www.ti.com/computers
www.ti.com/consumer-apps
www.ti.com/energy
dsp.ti.com
www.ti.com/industrial
www.ti.com/medical
www.ti.com/security
Clocks and Timers
Interface
www.ti.com/clocks
interface.ti.com
logic.ti.com
Medical
Security
Logic
Space, Avionics and Defense www.ti.com/space-avionics-defense
Transportation and Automotive www.ti.com/automotive
Power Mgmt
Microcontrollers
RFID
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
Video and Imaging
www.ti.com/video
OMAP Mobile Processors www.ti.com/omap
Wireless Connectivity www.ti.com/wirelessconnectivity
TI E2E Community Home Page
e2e.ti.com
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2011, Texas Instruments Incorporated
相关型号：
LP38512TSX-1.8/NOPB
1.5A Fast-Transient Response Low-Dropout Linear Voltage Regulator with Error Flag 5-DDPAK/TO-263 -40 to 125
TI
LP38513S-1.8/NOPB
IC VREG 1.8 V FIXED POSITIVE LDO REGULATOR, 0.425 V DROPOUT, PSSO5, TO-263, 5 PIN, Fixed Positive Single Output LDO Regulator
NSC
©2020 ICPDF网 联系我们和版权申明