LP877451A1RXVRQ1 [TI]
用于雷达 MMIC 的汽车类三款 3A 低噪声降压转换器、IO LDO 和 5V 升压转换器 PMIC | RXV | 28 | -40 to 125;
| 型号： | LP877451A1RXVRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 用于雷达 MMIC 的汽车类三款 3A 低噪声降压转换器、IO LDO 和 5V 升压转换器 PMIC | RXV | 28 | -40 to 125 升压转换器 雷达 集成电源管理电路 |
| 文件： | 总16页 (文件大小：1732K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LP87745-Q1
ZHCSOP1A –OCTOBER 2021 –REVISED NOVEMBER 2022
LP87745-Q1 用于AWR 和IWR 雷达传感器的三个降压转换器和5V 升压
1 特性
3 说明
• 具有符合AEC-Q100 标准的下列特性：
LP87745-Q1 器件旨在满足各种汽车和工业雷达应用中
AWR 和IWR MMIC 电源管理要求。该器件包含三个直
流/直流降压转换器、一个 5V 升压转换器以及一个
1.8V/3.3V LDO。LDO 由升压转换器供电，用于 xWR
I/O 电源。SPI 串行接口和使能信号控制器件。
– 器件温度等级1：–40°C 至+125°C 环境工作
温度范围
• 符合功能安全标准的器件
– 专为功能安全应用开发
– 文档有助于使ISO 26262 功能安全系统设计满
足ASIL-C/SIL-2 要求
– 输入电源过压和欠压监控
– 稳压器输出过压和欠压监控
– 外部电源轨的欠压和过压监控
– 问答看门狗
直流/直流降压转换器支持 4.4MHz、8.8MHz 或
17.6MHz 的可编程开关频率。该器件在宽频率范围内
具有高开关频率和低噪声，从而可实现无 LDO 电源解
决方案，且仅需少量或无需无源滤波。这改善了 MMIC
射频轨的散热和瞬态稳定。该器件会强制开关时钟进入
PWM 模式以获得出色的射频性能，并且还可以与外部
时钟同步。该器件支持远程电压检测，可补偿稳压器输
出与负载点 (POL) 之间的 IR 压降，从而提高输出电压
的精度。
– 电平或PWM 错误信号监视器(ESM)
– BIST 和CRC
• 输入电压：3.3V 标称（3V 至4V 范围）
• 三个低噪声直流/直流降压转换器：
器件信息
– 输出电压：0.9V 至1.9V、0.8V (BUCK3)、
0.82V (BUCK3)
– 最大输出电流：3A/3A/3A
– 开关频率：4.4MHz、8.8MHz 和17.6MHz
• 5V 升压转换器
器件型号(1)
LP87745-Q1
封装尺寸（标称值）
封装
VQFN-HR (28)
4.50 mm × 5.00 mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
– 最大输出电流：350mA
• 150mA 低压降稳压器(LDO)
VIN
PVIN_B1
VOUT1
SW_B1
LOAD
LOAD
LOAD
PVIN_B2
PVIN_B3
VCCA
– 输出电压1.8V 或3.3V
• 输出短路和过载保护
FB_B1
• 输入过压保护(OVP) 和欠压锁定(UVLO)
• 过热警告和保护
• 串行外设接口(SPI)
VOUT2
VOUT3
VOUT4
VOUT_VLDO
SW_B2
FB_B2
SW_BST
ENABLE
SW_B3
FB_B3
2 应用
SCK_SPI
SDI_SPI
SDO_SPI
CS_SPI/WD_DIS
nINT
SYNCCLKIN
nERR/GPO2
nRSTOUT
SPI interface
• 中距离和短距离角雷达
• 远距离前置雷达
• 超短距离雷达
VOUT_BST
LOAD
• 低纹波、低噪声应用
VOUT5
VIO_LDO
VMON1/GPO1
GNDs
简化版应用
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SNVSC48
LP87745-Q1
ZHCSOP1A –OCTOBER 2021 –REVISED NOVEMBER 2022
www.ti.com.cn
Table of Contents
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 说明（续）.........................................................................3
6 Pin Configuration and Functions...................................4
7 Device and Documentation Support..............................6
7.1 Documentation Support.............................................. 6
7.2 接收文档更新通知....................................................... 6
7.3 支持资源......................................................................6
7.4 Trademarks.................................................................6
7.5 Electrostatic Discharge Caution..................................6
7.6 术语表......................................................................... 6
8 Mechanical, Packaging, and Orderable Information....6
8.1 Packaging Option Addendum..................................... 7
8.2 Tape and Reel Information..........................................8
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision * (October 2021) to Revision A (November 2022)
Page
• 将文件状态从预告信息更改为量产数据.............................................................................................................1
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5 说明（续）
LP87745-Q1 器件支持可编程启动、关断延迟以及时序控制（与使能信号同步）。这些时序可能还包括用于控制
外部稳压器、负载开关和处理器复位的 GPO 信号。器件的默认设置编程到非易失性存储器 (NVM) 中。在启动期
间，该器件会对输出压摆率进行控制，从而更大限度地减小输出电压过冲和浪涌电流。
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6 Pin Configuration and Functions
25
24
28
27
26
SCK_SPI
SDO_SPI
1
2
23 SYNCCLKIN
22 VMON1/GPO1
FB_B1
CS_SPI/WD_DIS
AGND
3
4
5
21 FB_B2
20 VCCA
19 AGND
nRSTOUT
nINT
6
7
8
18 VOUT_VLDO
17 FB_B3
SDI_SPI
16 nERR/GPO2
9
VIO_LDO
15 ENABLE
10
11
12
13
14
图6-1. RXV Package, 28-Pin VQFN-HR (Top View)
表6-1. Pin Functions
PIN
NAME
CONNECTION
IF NOT USED
I/O
TYPE
DESCRIPTION
NO.
1
SCK_SPI
SDO_SPI
FB_B1
I
Digital
Digital
Clock signal for SPI interface.
Ground
2
O
Output data signal for SPI interface.
Floating
Ground
3
Analog Output voltage feedback (positive) for BUCK1.
—
I
I
Digital
Digital
Primary function: Chip select signal for SPI interface.
VCCA
CS_SPI/
WD_DIS
4
Alternative programmable function: Watchdog Disable Input.
Not applicable
Ground
5
6
7
8
9
AGND
NRSTOUT
nINT
Ground Ground.
—
O
O
I
Digital
Digital
Digital
Reset output.
Floating
Floating
Ground
Interrupt output and CAN PHY control or both.
Input data signal for SPI interface.
SDI_SPI
VIO_LDO
Analog IO supply from the internal LDO or from external source. LDO enabled: regulator Not applicable
filter node. LDO disabled: input for connecting to an external IO supply source,
with input filtering capacitor placed.
—
BOOST enabled: BOOST output (internally connected as VIO_LDO input).
BOOST disabled and VIO_LDO disabled: short with VIO_LDO. BOOST disabled
and VIO_LDO enabled: input for connecting to an external supply used as
VIO_LDO input.
10
11
VOUT_BST
SW_BST
Analog
Analog
External supply
VOUT_BST
—
—
When BOOST enabled: BOOST input. When BOOST disabled: short with
VOUT_BST.
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PIN
表6-1. Pin Functions (continued)
CONNECTION
IF NOT USED
I/O
TYPE
DESCRIPTION
NO.
NAME
PGND_B3BS
T
12
Ground Power ground for BUCK3 and BOOST.
Ground
—
Power input for BUCK3. The separate power pins PVIN_Bxx are not connected
13
PVIN_B3
Power
System supply
together internally –PVIN_Bxx and VCCA pins must be connected together in
—
the application and be locally bypassed.
14
15
SW_B3
Analog BUCK3 switch node.
Floating
—
I
ENABLE
Digital
Digital
Digital
Digital
Programmable ENABLE signal.
Not applicable
Ground
I
Primary function: System MCU Error Monitoring Input.
16
nERR/GPO2
O
O
Alternative programmable function: General Purpose Output signal (GPO2).
Floating
Alternative programmable function: Fault Communication Output signal (FAULT2). Floating
17
18
19
20
21
FB_B3
VOUT_VLDO
AGND
Analog Output voltage feedback (positive) for BUCK3.
Ground
-
—
—
—
—
LDO regulator filter node. LDO is used for internal purposes. No external load
allowed.
Power
Ground Ground.
Ground
System supply
Supply voltage for internal LDO. VCCA and PVIN_Bxx pins must be connected
together in the application and be locally bypassed.
VCCA
Power
FB_B2
Analog Output voltage feedback (positive) for BUCK2.
Analog Voltage monitoring input.
Ground
Ground
Floating
—
—
O
O
O
I
Digital
Digital
Digital
Digital
Alternative programmable function: General Purpose Output signal (GPO1).
VMON1/
GPO1
22
Alternative programmable function: Fault Communication Output signal (FAULT1). Floating
Alternative programmable function: CAN PHY control (CAN_DIS).
External clock input.
Floating
Ground
Floating
23
24
SYNCCLKIN
SW_B2
Analog BUCK2 switch node.
Power input for BUCK2. The separate power pins PVIN_Bxx are not connected
—
—
—
—
—
25
26
27
28
PVIN_B2
PGND_B12
PVIN_B1
SW_B1
Power
System supply
Ground
together internally –PVIN_Bxx and VCCA pins must be connected together in
the application and be locally bypassed.
Ground Power ground for BUCK1 and BUCK2.
Power input for BUCK1. The separate power pins PVIN_Bxx are not connected
Power
System supply
Floating
together internally –PVIN_Bxx and VCCA pins must be connected together in
the application and be locally bypassed.
Analog BUCK1 switch node.
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7 Device and Documentation Support
7.1 Documentation Support
7.2 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
7.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
7.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
7.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
7.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
8 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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8.1 Packaging Option Addendum
Packaging Information
Package
Type
Package
Drawing
Package
Qty
Lead/Ball
Finish(4)
Orderable Device
Status (1)
Pins
Eco Plan (2)
MSL Peak Temp (3)
Op Temp (°C)
Device Marking(5) (6)
LP877451A1RXVRQ1
ACTIVE
VQFN-HR
RXV
28
3000
Green (RoHS
& no Sb/Br)
NIPDAU | SN
Level-2-260C-1 YEAR
-40 to 125
LP8774
51A1-Q1
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PRE_PROD Unannounced device, not in production, not available for mass market, nor on the web, samples not available.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
space
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest
availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the
requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified
lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used
between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1%
by weight in homogeneous material)
space
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
space
(4) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the
finish value exceeds the maximum column width.
space
(5) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device
space
(6) Multiple Device markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer: The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by
third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable
steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain
information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
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8.2 Tape and Reel Information
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
Reel
Diameter
(mm)
Reel
Width W1
(mm)
Package
Type
Package
Drawing
A0
(mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
(mm)
Pin1
Quadrant
Device
Pins
SPQ
LP877451A1RXVRQ1 VQFN-HR
RXV
28
3000
330
12.4
4.80
5.30
1.10
8.0
12.0
Q1
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TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
Device
Package Type
VQFN-HR
Package Drawing Pins
RXV 28
SPQ
Length (mm) Width (mm)
367 367
Height (mm)
LP877451A1RXVRQ1
3000
38
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PACKAGE OUTLINE
VQFN-HR - 1 mm max height
RXV0028A
PLASTIC QUAD FLATPACK-NO LEAD
4.6
4.4
B
A
5.1
4.9
0.100 MIN
PIN 1 INDEX AREA
(0.130)
SECTION A-A
TYPICAL
1.0
0.8
C
SEATING PLANE
0.08
0.05
0.00
C
3
1.075
0.875
4X
4X (0.625) TYP
4X (0.375) TYP
(0.2) TYP
1.45
1.25
1.25 0.1
4X
10
14
9
15
1.8
1.6
(0.16)
TYP
2X
28X 0.5
0.3
0.2
2X
SYMM
4
0.1
C A B
0.05
C
0.8 0.1
0.3
0.2
22X
0.1
C A B
23
0.05
C
1
0.3
0.2
8X
0.725
4X
24
0.7
28
0.75
0.525
0.625
0.425
0.1
C A B
0.975
4X
4X
SYMM
0.05
C
0.775
4X
4X
0.5
0.55
4226338/A 10/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
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EXAMPLE BOARD LAYOUT
VQFN-HR - 1 mm max height
PLASTIC QUAD FLATPACK-NO LEAD
RXV0028A
4X (1.075)
4X (0.825)
28
24
2X (2.2875)
2X (2.1125)
2X (1.925)
2X (1.75)
23
1
(Ø 0.2) VIA
TYP
(R 0.05) TYP
(1.25)
2X (0.25)
(0)
SYMM
28X (0.5)
5
19
(0.8)
22X (0.25)
4X (0.25)
2X
(1.9)
4X
(1.55)
4X
(1.175)
9
15
10
14
4X
(0.25)
4X (0.725)
4X (0.8)
4X (0.85)
SYMM
(4.9)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 16X
0.05 MIN
ALL AROUND
METAL
0.05 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
NON- SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4226338/A 10/2020
NOTES: (continued)
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
4. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
VQFN-HR - 1 mm max height
RXV0028A
PLASTIC QUAD FLATPACK-NO LEAD
4X (1.075)
4X (0.825)
28
24
2X (2.3625)
2X (2.275)
2X (2.2875)
2X (2.1125)
23
1
2X (1.4875)
2X (1.225)
(R 0.05) TYP
SYMM
4X (0.7325)
(1.17)
(0)
5
19
28X (0.5)
4X (0.25)
(0.76)
4X (0.25)
8X 0.25
8X 0.675
16X (0.25)
4X
(1.175)
9
15
4X
(0.85)
4X (0.25)
10
14
4X (0.25)
SYMM
4X (0.725)
4X (0.8)
4X (0.85)
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
EXPOSED PAD
FUSED PAD 5&19: 84%
PADS 11, 13, 25 & 27: 86%
PADS 12 & 26: 89%
SCALE: 16X
4226338/A 10/2020
NOTES: (continued)
5.
Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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LP87745-Q1
ZHCSOP1A –OCTOBER 2021 –REVISED NOVEMBER 2022
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PACKAGE OUTLINE
VQFN-HR - 1 mm max height
PLASTIC QUAD FLATPACK-NO LEAD
A
RXV0028B
4.6
4.4
B
5.1
4.9
PIN 1 INDEX AREA
0.1 MIN
(0.05)
SECTION A-A
TYPICAL
1.0
0.8
C
SEATING PLANE
0.05
0.00
0.08
C
3
1.075
4X
0.875
4X (0.625) TYP
4X (0.375) TYP
(0.2) TYP
1.25 0.1
1.45
1.25
4X
10
14
9
15
1.8
1.6
2X
28X 0.5
SYMM
0.3
0.2
0.1
2X
C
A B
4
0.05
C
0.3
0.2
0.1
0.05
22X
0.8 0.1
0.725
C
A B
C
0.3
0.2
4X
8X
0.525
0.1
C
A B
23
0.05
C
1
24
28
0.75
0.55
0.625
0.425
4X
4X
4X
SYMM
0.7
0.5
0.975
0.775
4X
4226370/A 10/2020
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
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Product Folder Links: LP87745-Q1
LP87745-Q1
ZHCSOP1A –OCTOBER 2021 –REVISED NOVEMBER 2022
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EXAMPLE BOARD LAYOUT
VQFN-HR - 1 mm max height
RXV0028B
PLASTIC QUAD FLATPACK-NO LEAD
4X (1.075)
28
24
4X (0.825)
1
2X (2.2875)
2X (2.1125)
2X (1.925)
23
2X (1.75)
(Ø 0.2) VIA
TYP
(R 0.05) TYP
(1.25)
5
0.000
SYMM !
19
(0.8)
28X (0.5)
2X
(1.9)
4X
(1.55)
4X
(1.175)
9
15
22X (0.25)
10
14
4X (0.725)
4X (0.8)
4X (0.85)
(4.9)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 16X
0.05 MIN
ALL AROUND
METAL
0.05 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
SOLDER MASK
DEFINED
NON- SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4226370/A 10/2020
NOTES: (continued)
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
4. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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Product Folder Links: LP87745-Q1
LP87745-Q1
ZHCSOP1A –OCTOBER 2021 –REVISED NOVEMBER 2022
www.ti.com.cn
EXAMPLE STENCIL DESIGN
VQFN-HR - 1 mm max height
PLASTIC QUAD FLATPACK-NO LEAD
RXV0028B
4X (1.075)
4X (0.825)
24
28
2X (2.3625)
2X (2.2875)
2X (2.1125)
2X (2.275)
1
23
2X (1.4875)
2X (1.225)
(R 0.05) TYP
4X (0.7325)
(1.17)
19
0.000 SYMM !
5
(0.76)
28X (0.5)
4X
(1.175)
9
15
4X
(0.85)
(0.25) TYP
14
10
4X (0.725)
8X 0.675
4X (0.8)
4X (0.85)
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
EXPOSED PAD
FUSED PAD 5&19: 84%
PADS 11, 13, 25 & 27: 86%
PADS 12 & 26: 89%
SCALE: 16X
4226370/A 10/2020
NOTES: (continued)
5.
Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
Copyright © 2022 Texas Instruments Incorporated
Submit Document Feedback
15
Product Folder Links: LP87745-Q1
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