MM5483 [TI]
液晶显示驱动器（LCD 驱动器）;
| 型号： | MM5483 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 液晶显示驱动器（LCD 驱动器） 驱动 CD 显示驱动器 |
| 文件： | 总13页 (文件大小：1005K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MM5483
www.ti.com
SNLS368E –JULY 2000–REVISED MARCH 2013
MM5483 Liquid Crystal Display Driver
Check for Samples: MM5483
1
FEATURES
DESCRIPTION
The MM5483 is a monolithic integrated circuit utilizing
CMOS metal-gate low-threshold enhancement mode
devices. It is available in a 40-pin PDIP package. The
chip can drive up to 31 segments of LCD and can be
cascaded to increase this number. This chip is
capable of driving a 4½-digit 7-segment display with
minimal interface between the display and the data
source.
23
•
Serial Data Input
•
Serial Data Output
•
•
•
•
•
Wide Power Supply Operation
TTL Compatibility
31 Segment Outputs
Alphanumeric and Bar Graph Capability
Cascade Capability
The MM5483 stores the display data in latches after it
is latched in, and holds the data until another load
pulse is received.
APPLICATIONS
•
•
•
COPS™ or Microprocessor Displays
Industrial Control Indicator
Digital Clock, Thermometer, Counter,
Voltmeter
•
•
Instrumentation Readouts
Remote Displays
Block Diagram
Figure 1. MM5483 Block Diagram
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
COPS is a trademark of Texas Instruments.
2
3
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2013, Texas Instruments Incorporated
MM5483
SNLS368E –JULY 2000–REVISED MARCH 2013
www.ti.com
Connection Diagrams
Figure 2. Dual-In-Line Package
Top View
See Package Number NFJ0040A
Figure 3. See Package Number FN0044A
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: MM5483
MM5483
www.ti.com
SNLS368E –JULY 2000–REVISED MARCH 2013
(1)(2)
Absolute Maximum Ratings
Voltage at Any Pin
VSS to VSS +10V
−40°C to +85°C
−65°C to +150°C
Operating Temperature
Storage Temperature
Power Dissipation
300 mW at +85°C
350 mW at +25°C
Junction Temperature
+150°C
Lead Temperature
(Soldering, 10 seconds)
300°C
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be ensured. They are not meant to imply
that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
DC Electrical Characteristics
TA within operating range, VDD = 3.0V to 10V, VSS = 0V, unless otherwise specified
Parameter
Power Supply
Conditions
Min
Typ
Max
Units
3.0
10
V
All Outputs Bits = Open, Data Out = Open,
BP_Out = Open, Clock In = 0V,
Data In = 0V, Data Load = 0V,
Osc In = 0V, BP_In = 32Hz
Average Supply Current, IDD
VDD = 3.0V
VDD = 5.0V
VDD = 10.0V
1.5
2.5
10
40
µA
µA
µA
Input Voltage Levels
Logic “0”
Logic “1”
Logic “0”
Logic “1”
Load, Clock, Data
VDD = 5.0V
VDD = 5.0V
VDD = 3.0V
VDD = 3.0V
0.9
0.4
V
V
V
V
2.4
2.0
Output Current Levels(1)
Segments and Data Out
Sink
VDD = 3.0V, VOUT = 0.3V
VDD = 3.0V, VOUT = 2.7V
20
20
µA
µA
Source
BP Out Sink
BP Out Source
VDD = 3.0V, VOUT = 0.3V
VDD = 3.0V, VOUT = 2.7V
320
320
µA
µA
(1) Output offset voltage is ±50 mV with CSEGMENT = 250 pF, CBP = 8750 pF.
AC Electrical Characteristics
VDD ≥ 4.7V, VSS = 0V unless otherwise specified
Symbol
Parameter
Min
Typ
Max
500
Units
kHz
ns
fC
tCH
tCL
Clock Frequency, VDD = 3V
Clock Period High
(1)(2)500
500
Clock Period Low
ns
tDS
Data Set-Up before Clock
Data Hold Time after Clock
Minimum Load Pulse Width
Load to Clock
300
ns
tDH
tLW
tLTC
tCDO
100
ns
500
ns
400
ns
Clock to Data Valid
400
750
ns
(1) AC input waveform specification for test purpose: tr ≤ 20 ns, tf ≤ 20 ns, f = 500 kHz, 50% ± 10% duty cycle.
(2) Clock input rise and fall times must not excced 300 ms.
Copyright © 2000–2013, Texas Instruments Incorporated
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MM5483
SNLS368E –JULY 2000–REVISED MARCH 2013
www.ti.com
FUNCTIONAL DESCRIPTION
A block diagram for the MM5483 is shown in Figure 1 and a package pinout is shown in Figure 3. Figure 4
shows a possible 3-wire connection system with a typical signal format for Figure 4. Shown in Figure 5, the load
input is an asynchronous input and lets data through from the shift register to the output buffers any time it is
high. The load input can be connected to VDD for 2-wire control as shown in Figure 6. In the 2-wire control mode,
31 bits (or less depending on the number of segments used) of data are clocked into the MM5483 in a short time
frame (with less than 0.1 second there probably will be no noticeable flicker) with no more clocks until new
information is to be displayed. If data was slowly clocked in, it can be seen to “walk” across the display in the 2-
wire mode. An AC timing diagram can be seen in Figure 7. It should be noted that data out is not a TTL-
compatible output.
Figure 4. Three-Wire Control Mode
Figure 5. Data Format Diagram
Figure 6. Two-Wire Control Mode
4
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Product Folder Links: MM5483
MM5483
www.ti.com
SNLS368E –JULY 2000–REVISED MARCH 2013
Figure 7. Timing Diagram
Copyright © 2000–2013, Texas Instruments Incorporated
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MM5483
SNLS368E –JULY 2000–REVISED MARCH 2013
www.ti.com
REVISION HISTORY
Changes from Revision D (March 2013) to Revision E
Page
•
Changed layout of National Data Sheet to TI format ............................................................................................................ 5
6
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Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: MM5483
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
MM5483V/NOPB
ACTIVE
PLCC
FN
44
25
RoHS & Green
SN
Level-3-245C-168 HR
-40 to 85
MM5483V
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TUBE
*All dimensions are nominal
Device
Package Name Package Type
FN PLCC
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
MM5483V/NOPB
44
25
466
21
8001
15.74
Pack Materials-Page 1
PACKAGE OUTLINE
FN0044A
PLCC - 4.57 mm max height
SCALE 0.800
PLASTIC CHIP CARRIER
.180 MAX
[4.57]
B
.650-.656
[16.51-16.66]
NOTE 3
.020 MIN
[0.51]
A
(.008)
[0.2]
6
1 44
40
7
39
PIN 1 ID
(OPTIONAL)
.650-.656
[16.51-16.66]
NOTE 3
.582-.638
[14.79-16.20]
17
29
18
28
.090-.120 TYP
[2.29-3.04]
44X .026-.032
[0.66-0.81]
C
SEATING PLANE
.004 [0.1] C
44X .013-.021
[0.33-0.53]
40X .050
[1.27]
.007 [0.18]
C A B
.685-.695
[17.40-17.65]
TYP
4215154/A 04/2017
NOTES:
1. All linear dimensions are in inches. Any dimensions in brackets are in millimeters. Any dimensions in parenthesis are for reference only.
Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Dimension does not include mold protrusion. Maximum allowable mold protrusion .01 in [0.25 mm] per side.
4. Reference JEDEC registration MS-018.
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EXAMPLE BOARD LAYOUT
FN0044A
PLCC - 4.57 mm max height
PLASTIC CHIP CARRIER
SYMM
44X (.093 )
[2.35]
44
40
6
1
7
39
44X (.030 )
[0.75]
SYMM
(.64
)
[16.2]
40X (.050 )
[1.27]
29
17
(R.002 ) TYP
[0.05]
18
28
(.64
)
[16.2]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:4X
.002 MIN
[0.05]
ALL AROUND
.002 MAX
[0.05]
ALL AROUND
EXPOSED METAL
EXPOSED METAL
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4215154/A 04/2017
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
FN0044A
PLCC - 4.57 mm max height
PLASTIC CHIP CARRIER
SYMM
44X (.093 )
[2.35]
6
44
40
1
7
39
44X (.030 )
[0.75]
SYMM
(.64
)
[16.2]
40X (.050 )
[1.27]
29
17
(R.002 ) TYP
[0.05]
18
28
(.64
)
[16.2]
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:4X
4215154/A 04/2017
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
www.ti.com
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