MSP58C20_16 [TI]

AUDIO-BAND CONVERTER;
MSP58C20_16
型号: MSP58C20_16
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

AUDIO-BAND CONVERTER

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MSP58C20  
AUDIO-BAND CONVERTER  
SPSS015B – DECEMBER 1993 – REVISED JULY 1996  
DW PACKAGE  
(TOP VIEW)  
Analog Portion of ADC and DAC for  
Audio-Band Signal-Processing  
Applications  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
V
NC  
NC  
SUB  
NC  
5-V Supply Voltage  
V
AOP  
AOM  
DIGS  
DIGL  
ADCLK  
Oversampling Second-Order Sigma-Delta  
Modulator  
SS  
AIP  
AIM  
1.024-MHz Master Clock Frequency  
PWAD  
PWDA  
ADOUT  
NC  
On-Chip Continuous-Time Antialiasing and  
Smoothing Filters  
V
DD  
NC  
NC  
High-Performance Fully Differential and  
Symmetrical Analog Data Paths  
NC  
Internal Reference Voltage and  
Common-Mode Bias Voltage Generation  
NC – No internal connection  
Very Low Power Consumption Mode  
description  
The MSP58C20 is the analog portion of an audio-band sigma-delta analog-to-digital and digital-to-analog  
converter and is a companion part to the MSP58C80. The MSP58C20 is designed to operate only with the  
MSP58C80, which contains the digital portion of the audio-band converter. The circuit consists of three main  
blocks: the analog-to-digital converter (ADC), the digital-to-analog converter (DAC), and internal reference and  
bias voltages.  
The analog-to-digital conversion chain consists of a continuous-time antialiasing stage, an analog oversampled  
modulator, and the modulator bias voltage. The antialiasing stage is a second-order low-pass filter with a cutoff  
frequency of typically 190 kHz. The modulator is a sigma-delta feedback loop, which oversamples the signal  
at 1.024 MHz and provides second-order noise shaping. It performs the conversion of the differential analog  
input signal to a pulse-density-modulated single-bit digital output (ADOUT). When a maximum positive  
differential input voltage (i.e., a maximum positive voltage difference of AIP – AIM) is applied at the AIP and AIM  
inputs, the resulting code at the ADOUT output is all ones.  
The digital-to-analog conversion chain consists of a fast DAC, an analog low-pass filter, and the filter’s bias  
voltage. The two input bits (DIGS and DIGL), sampled at 0.512 MHz from a digital modulator on the MSP58C80,  
are the inputs of the DAC conversion chain. Based on the values for DIGS (the sign bit) and DIGL (the level bit),  
the following table shows the DAC voltage steps that are produced.  
DIGS  
DIGL  
DAC VOLTAGE STEPS  
L
L
L
H
L
–1 × V  
–2 × V  
+1 × V  
+2 × V  
ref  
ref  
ref  
ref  
H
H
H
When DIGS = L, the AOM analog output has a more positive voltage than AOP. When DIGL = H, the absolute  
value of the voltage difference between AOP and AOM is greater than when DIGL = L. A band-gap voltage  
source is used to produce the DAC and ADC reference voltages. These two references are different to avoid  
crosstalk between the two converters.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MSP58C20  
AUDIO-BAND CONVERTER  
SPSS015B – DECEMBER 1993 – REVISED JULY 1996  
functional block diagram  
ADCLK  
PWAD  
Analog  
Sigma-Delta 2  
Modulator  
AIP  
1.024 MHz  
Antialiasing  
1.024 MHz  
ADOUT  
Filter  
AIM  
ADC Band-Gap  
Reference Voltage  
Source  
V
SS  
Bias  
V
DD  
DAC Band-Gap  
Reference  
Voltage Source  
AOP  
AOM  
DIGS  
DIGL  
Smoothing  
Filter  
Low-Pass  
Filter  
512 kHz  
MSP58C20  
V
SUB  
PWDA  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MSP58C20  
AUDIO-BAND CONVERTER  
SPSS015B – DECEMBER 1993 – REVISED JULY 1996  
Terminal Functions  
TERMINAL  
A/D  
I/O  
DESCRIPTION  
NAME  
NO.  
14  
8
ADCLK  
ADOUT  
AIM  
D
D
A
I
O
I
ADCLK is a 1.024-MHz clock input.  
ADOUT is the 1-bit output of the ADC modulator and is sampled at 1.024 MHz.  
5
AIM is a negative differential input for the ADC. AIP and AIM together form a balanced differential input.  
The biasing of this terminal is fixed through resistors by the internal common-mode voltage source. This  
terminal can be ac coupled or dc coupled. If the terminal is dc coupled, external common-mode bias  
should satisfy recommended operating conditions.  
AIP  
4
A
I
AIP is a positive differential input for the ADC. AIP and AIM together form a balanced differential input.  
The biasing of this terminal is fixed through resistors by the internal common-mode voltage source. This  
terminal can be ac coupled or dc coupled. If the terminal is dc coupled, external common-mode bias  
should satisfy recommended operating conditions.  
AOM  
AOP  
17  
18  
A
A
O
O
AOM is a negative differential DAC output. AOP and AOM together form a balanced differential output.  
The common-mode voltage at this terminal is fixed by the internal common-mode circuitry.  
AOP is a positive differential DAC output. AOP and AOM together form a balanced differential output.  
The common-mode voltage at this terminal is fixed by the internal common-mode circuitry.  
DIGL  
15  
16  
6
D
D
D
I
I
I
DIGL is the input level bit of the DAC and is sampled at 0.512 MHz.  
DIGS is the input sign bit of the DAC and is sampled at 0.512 MHz.  
DIGS  
PWAD  
When PWAD is high, it puts the ADC part of the circuit into a power-down mode. When both PWAD and  
PWDA are high, the MSP58C20 is in a stable low-power-consumption state.  
PWDA  
7
1
D
I
When PWDA is high, it puts the DAC part of the circuit in a power-down mode. When both PWAD and  
PWDA are high, the MSP58C20 is in a stable low-power-consumption state.  
V
SUB  
n/a  
n/a  
V
andV mustbeconnectedtogethertominimizesubstratecurrentsduringpowerup,powerdown,  
SS  
SUB  
and normal operation.  
V
V
13  
3
n/a  
n/a  
n/a  
n/a  
V
is the 5-V power supply.  
DD  
DD  
V
V
is ground. The internal band-gap voltage and the common-mode bias voltages are referenced to  
SS  
SS  
SS  
.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 6 V  
DD  
Input voltage range, V (any digital or analog input, see Note 1) . . . . . . . . . . . . . . . . . . 0.3 V to V  
+ 0.3 V  
I
DD  
V
, V voltage range, relative to each other . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mV to 30 mV  
SUB SS  
Operating free-air temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C  
A
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTE 1: All voltage values are with respect to V  
SS  
unless otherwise noted.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MSP58C20  
AUDIO-BAND CONVERTER  
SPSS015B – DECEMBER 1993 – REVISED JULY 1996  
recommended operating conditions  
MIN NOM  
MAX  
UNIT  
Supply voltage, V  
DD  
(see Note 1)  
4.75  
2
5
5.25  
V
V
V
V
High-level input voltage, digital inputs, V (see Note 1)  
IH  
Low-level input voltage, digital inputs, V (see Note 1)  
IL  
0.8  
3
Maximum differential input voltage between AIP and AIM (ac or dc peak-to-peak voltage), V  
–3  
ID  
0.45 ×  
0.5 × 0.55 ×  
Common-mode input voltage at AIP and AIM, V (see Note 1)  
IC  
V
V
DD  
V
V
DD  
DD  
1.024  
Input clock frequency, ADCLK  
MHz  
k  
Resistive load between AOP and AOM  
15  
Capacitive load at AOP and AOM (at each output versus V  
)
50  
70  
pF  
SS  
Operating free-air temperature, T  
0
°C  
A
NOTE 1: All voltage values are with respect to V  
SS  
unless otherwise noted.  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MSP58C20  
AUDIO-BAND CONVERTER  
SPSS015B – DECEMBER 1993 – REVISED JULY 1996  
electrical characteristics over recommended ranges of supply voltage and operating free-air  
temperature, ADCLK input frequency = 1.024 MHz, PWDA = L and PWAD = L (power-up mode)  
(unless otherwise noted)  
supply current characteristics  
PARAMETER  
TEST CONDITIONS  
PWAD =H, PWDA = H,  
Digital inputs = V or V  
MIN  
TYP  
MAX  
50  
UNIT  
µA  
,
SS  
DD  
Digital output = no load  
I
Supply current  
DD  
PWAD = L, PWDA = L  
6.5  
9
16  
mA  
analog input characteristics  
PARAMETER  
TEST CONDITIONS  
dc or ac voltage  
See Note 2  
MIN  
TYP  
MAX  
UNIT  
V
Transmit dynamic range, maximum differential  
input voltage (between AIP and AIM)  
±2.22 ±2.36  
±2.5  
V
V
Transmit differential input offset voltage  
150  
150  
mV  
V
IO  
0.4 ×  
0.5 ×  
0.6 ×  
Internal common-mode voltage at AIP and AIM  
IC  
V
DD  
V
DD  
V
DD  
Between AIP and internal common-mode  
voltage source (AIM = V /2)  
DD  
AIP  
15  
25  
35  
z
Input impedance  
Input capacitance  
kΩ  
i
Between AIM and internal common-mode  
voltage source (AIP = V /2)  
DD  
AIM  
AIP  
AIM  
15  
25  
35  
50  
50  
Measured at 5 MHz between AIP and V  
SS  
(AIM = V  
DD  
/2)  
pF  
Measured at 5 MHz between AIM and V  
SS  
(AIP = V  
/2)  
DD  
NOTE 2: Calculated by linear regression based on five dc measurements between –1 V and 1 V  
digital output characteristics  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
TYP  
MAX  
UNIT  
V
V
V
Digital high-level output voltage versus V  
I
= 300 µA  
2.4  
OH  
SS  
OH  
OL  
Digital low-level output voltage versus V  
SS  
I
= 1 mA  
0.4  
V
OL  
analog output characteristics  
PARAMETER  
TEST CONDITIONS  
dc measurement  
MIN  
±2.82  
150  
0.4 ×  
MAX  
UNIT  
V
V
V
Differential output voltage, dynamic range, AOP to AOM Balanced loads,  
±3 ±3.18  
OD  
Differential output offset voltage  
dc measurement  
150  
mV  
OO  
0.5 ×  
0.6 ×  
V
OC  
Common-mode output voltage at AOP and AOM  
V
V
DD  
V
DD  
V
DD  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MSP58C20  
AUDIO-BAND CONVERTER  
SPSS015B – DECEMBER 1993 – REVISED JULY 1996  
electrical characteristics over recommended ranges of supply voltage and operating free-air  
temperature, ADCLK input frequency = 1.024 MHz, PWDA = L and PWAD = L (power-up mode)  
(unless otherwise noted) (continued)  
ADC transmit characteristics  
PARAMETER  
TEST CONDITIONS  
= 25°C,  
MIN TYP  
MAX  
UNIT  
Transmit absolute gain  
tolerance  
V
= 5 V,  
T
A
DD  
Input = 1-kHz sine wave at 13 dBrl  
±0.5  
dB  
Input = 1-kHz sine wave,  
Gain reference level = gain  
measured at input level of  
Input level = 1 dBrl to 43 dBrl  
±0.25  
±0.5  
±1  
Transmit gain versus  
input level  
Input level = 43 dBrl to 53 dBrl  
Input level = 53 dBrl to 58 dBrl  
dB  
–13 dBrl,  
See Note 3  
Transmit gain versus  
supply voltage  
V
DD  
= 4.75 V to 5.25 V,  
Input = 1 kHz at 13 dBrl  
±0.15  
dB  
Transmit idle channel  
in-band noise  
Psophometrically-weighted output noise,  
Transmit channel idle  
76  
dBrlp  
f = 50 Hz  
f = 300 Hz  
f = 3.4 kHz  
f = 4 kHz  
f = 7 kHz  
f = 12 kHz  
f = 20 kHz  
80  
82  
82  
80  
72  
65  
64  
Transmit idle channel  
single-frequency noise  
spectrum (see Note 4)  
T = 25°C,  
A
dBrl  
FFT rectangular window bandwidth = 125 Hz,  
Transmit channel idle, See Figure 5  
Transmit single-  
frequency distortion  
Input = one frequency in 0.7-kHz to 1.1-kHz band at 4 dBrl,  
Measured first two harmonics  
50  
40  
dB  
Input = two frequencies in 0.3-kHz to 3.4-kHz band,  
Input levels = 7 dBrl and 24 dBrl,  
Measured second and third intermodulation products  
Transmit intermodulation  
distortion (see Note 4)  
dBrl  
V
= 5.25 V,  
DD  
= 25°C,  
Input level = 70 dBrl  
Input level = 20 dBrl  
Input level = –1 dBrl  
13  
50  
T
A
Transmit-signal-to-total-  
noise-plus-distortion ratio  
(see Note 5)  
Input = 1-kHz sine wave,  
Measured psophometrically-  
weighted total noise plus  
dB  
dB  
50  
distortion,  
See Figure 6  
Transmit gain variations  
versus input frequency  
(see Notes 4 and 6)  
f = 0.1 kHz to 4 kHz,  
See Note 7  
Input level = 13 dBrl  
±0.6  
Transmit power supply  
rejection  
30  
dB  
AIP  
10  
–10  
10  
10  
Voltage applied to terminal is between V  
PWDA = H (power-down mode)  
and V ,  
DD  
SS  
I
Leakage current  
µA  
lkg  
AIM  
Receive input = one frequency in 0.3-kHz to 3.4-kHz band at 3 dBrl,  
Crosstalk measured at transmit digital output,  
Transmit channel idle  
Receive-to-transmit  
crosstalk  
70  
dB  
This table contains specifications in which the power levels are expressed in dBrl; dBrl stands for dB above reference level. 0 dBrl is the ADC  
theoretical overload point. This overload point corresponds to a sine wave at the input of the modulator with peak amplitude equal to 2.25 V dBrlp  
is a psophometrically-weighted value being compared against a psophometrically-weighted reference.  
NOTES: 3. Input satisfies CCITT G.714 15.3, Method 2.  
4. This parameter is characterized but not tested.  
5. Input satisfies CCITT G.714 14.3, Method 2.  
6. Gain is relative to gain at 1 kHz.  
7. Thepower-supplyrejectionmeasurementismadewitha50-mVrms,0-to20-kHzsignalappliedtoV  
idle.  
andwiththetransmitchannel  
DD  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MSP58C20  
AUDIO-BAND CONVERTER  
SPSS015B – DECEMBER 1993 – REVISED JULY 1996  
electrical characteristics over recommended ranges of supply voltage and operating free-air  
temperature, ADCLK input frequency = 1.024 MHz, PWDA = L and PWAD = L (power-up mode)  
(unless otherwise noted) (continued)  
DAC receive characteristics  
PARAMETER  
TEST CONDITIONS  
= 25°C,  
MIN  
TYP MAX UNIT  
V
DD  
= 5 V,  
T
A
Receive gain tolerance  
±0.5  
dB  
Input = 1-kHz sine wave at 28 dBrl  
Input = 1-kHz sine wave,  
Gain reference level = gain  
measured at input level of –28dBrl,  
See Note 8  
Input level = 1 dBrl to 43 dBrl  
Input level = 43 dBrl to 53 dBrl  
Input level = 53 dBrl to 58 dBrl  
±0.25  
±0.5  
±1  
Receive gain versus input level  
dB  
Receive gain versus  
supply voltage  
V
= 4.75 V to 5.25 V,  
DD  
±0.15  
dB  
Digital input = 1-kHz sine wave at 28 dBrl  
Receive idle channel in-band  
noise  
Receive channel idle,  
Psophometrically-weighted output noise  
75  
dBrlp  
f = 100 Hz  
f = 3 kHz  
82  
82  
64  
64  
T
= 25°C,  
A
Receive idle channel  
single-frequency noise  
spectrum (see Note 4)  
Receive channel idle,  
Measurement bandwidth = 125 Hz,  
See Figure 6  
dBrl  
f = 10 kHz  
f = 100 kHz  
Receive single-frequency  
distortion  
Input = one frequency in 0.7-kHz to 1.1-kHz band at 6 dBrl,  
Measured first two harmonics  
50  
40  
dB  
Receive intermodulation  
distortion (see Note 4)  
Input = two frequencies in 0.3-kHz to 3.4-kHz band,  
Input levels = 7 dBrl and 24 dBrl,  
dBrl  
Measured second and third intermodulation products  
V
= 5.25 V,  
T = 25°C,  
A
DD  
Input level = –70 dBrl  
Input level = –20 dBrl  
Input level = –1 dBrl  
0
Input = 1-kHz sine wave,  
Measured psophometrically-  
weighted total noise plus  
Receive signal-to-total-noise-  
plus-distortion ratio  
(see Note 9)  
50  
dB  
50  
distortion,  
See Figure 7  
f = 156 Hz to 4 kHz  
f = 4.6875 kHz  
f = 6.25 kHz  
0.6  
0.4  
1.4  
2.9  
4.8  
6.8  
8.7  
12.2  
0.6  
0.7  
1.75  
3.35  
5.25  
7.25  
9.2  
Receive gain variations versus  
input sine wave frequency  
(see Note 6)  
V
DD  
= 4.75 V,  
T = 25°C,  
A
f = 7.8125 kHz  
f = 9.375 kHz  
f = 10.9375 kHz  
f = 12.5 kHz  
Input level = –13 dBrl,  
See Figure 9  
dB  
dB  
f = 15.625 kHz  
12.8  
30  
Receive power supply rejection See Note 10  
This table contains specifications in which the power levels are expressed in dBrl; dBrl stands for dB above reference level. 0 dBrl is the DAC  
overloadpoint.Overloadlevelsofthedigitalmodulator(seeparametermeasurementinformation)are32767and32767peakvalues.The0-dBrl  
level is related to maximum differential output voltage, which is typically 2.25 V.  
The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for receive gain  
variations versus input sine-wave frequency.  
NOTES: 4. This parameter is characterized but not tested.  
6. Gain is relative to gain at 1 kHz.  
8. Input satisfies CCITT G.714 15.4 Method 2.  
9. Input satisfies CCITT G.714 14.4 Method 2.  
10. The power supply rejection measurement is made with a 50-mVrms, 0-kHz to 20-kHz signal applied to V  
channel idle.  
and with the receive  
DD  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MSP58C20  
AUDIO-BAND CONVERTER  
SPSS015B – DECEMBER 1993 – REVISED JULY 1996  
electrical characteristics over recommended ranges of supply voltage and operating free-air  
temperature, ADCLK input frequency = 1.024 MHz, PWDA = L and PWAD = L (power-up mode)  
(unless otherwise noted) (continued)  
DAC receive characteristics (continued)  
PARAMETER  
TEST CONDITIONS  
MIN  
10  
–10  
TYP MAX UNIT  
AOP  
AOM  
10  
µA  
10  
I
Leakage current  
lkg  
Output impedance,  
differential, between  
AOP and AOM  
30  
kΩ  
(see Note 4)  
Transmit input = one frequency in 0.3-kHz to 3.4-kHz band at 3 dBrl,  
Receive channel idle,  
Crosstalk measured at receive analog output  
Transmit-to-receive  
crosstalk  
70  
dB  
NOTE 4. This parameter is characterized but not tested.  
timing requirements over recommended ranges of supply voltage and operating free-air  
temperature  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP MAX  
UNIT  
Transmit setup time at power up  
(PWAD transition from H to L)  
ADCLK input frequency = 1.024 MHz,  
See Note 11  
t
t
20  
µs  
su1  
Receive setup time at power up  
(PWDA transition from H to L)  
ADCLK input frequency = 1.024 MHz,  
See Note 12  
20  
1
µs  
su2  
t
t
t
t
t
t
t
Receive setup time, DIGS or DIGL setup before ADCLK↑  
Receive hold time, DIGS or DIGL hold after ADCLK↑  
Cycle time, ADCLK  
See Figure 4  
See Figure 4  
50  
50  
ns  
ns  
µs  
ns  
ns  
ns  
ns  
su3  
h
c
Pulse duration, ADCLK high  
470  
470  
w1  
w2  
f
Pulse duration, ADCLK low  
Fall time, ADCLK  
20  
20  
Rise time, ADCLK  
r
NOTES: 11. After the setup time, the transmit channel displays normal operating characteristics.  
12. After the setup time, the receive channel displays normal operating characteristics.  
switching characteristic over recommended ranges of supply voltage and operating free-air  
temperature  
PARAMETER  
TEST CONDITION  
MIN  
TYP  
MAX  
UNIT  
t
a
Transmit access time, ADOUT after ADCLK(see Note 4)  
See Figure 3  
100  
ns  
NOTE 4. This parameter is characterized but not tested.  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MSP58C20  
AUDIO-BAND CONVERTER  
SPSS015B – DECEMBER 1993 – REVISED JULY 1996  
PARAMETER MEASUREMENT INFORMATION  
The receive characteristics in the electrical characteristics table are measured by activating the MSP58C20 receive  
path through a digital modulator. This modulator consists of two functional blocks (see Figure 1 and Figure 2)  
connected in series. The output of the decoder (see Figure 2) is shown in Table 1.  
3
/
3
/
–1  
Z
Em  
3 LSBs  
+
BITS (161)  
/
/
/
Di  
16  
16  
13 MSBs  
Figure 1. 16- to 13-Bit Modulator at 512-kHz Sampling Rate  
512 kHz  
Dx  
Ux  
DIGS  
DIGL  
13  
/
16  
/
11  
/
12  
/
4 MSBs  
/
Vx  
1
/
+
+
Di  
32  
Decoder  
512 kHz  
12  
Rx  
Sx  
16  
12  
/
3
/
–1  
+
64  
Dx  
Z
16  
/
16  
/
3
/
–1  
2048  
+
Z
Figure 2. Sigma-Delta-2 Modulator at 512-kHz Sampling Rate  
Table 1. Dx Decoder  
DECODER INPUT  
DECODER OUTPUT  
Vx (11) Vx (10) Vx (9) Vx (8) Dx (2) Dx (1) Dx (0) DIGS  
DIGL  
H
0
0
0
0
1
1
1
1
1
0
0
0
1
1
1
0
X
1
0
0
1
1
0
X
X
X
1
0
1
0
X
X
H
H
H
H
L
H
H
H
H
L
L
L
L
H
H
L
L
L
L
L
H
L
H
L
L
H
H
H
H
L
L
H
H
H
H
L
H
L
H
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MSP58C20  
AUDIO-BAND CONVERTER  
SPSS015B – DECEMBER 1993 – REVISED JULY 1996  
PARAMETER MEASUREMENT INFORMATION  
ADCLK  
t
a
ADOUT  
Figure 3. Transmit Access Timing Waveforms  
ADCLK  
t
su3  
t
h
DIGS  
or  
DIGL  
Figure 4. Receive Setup and Hold Time Waveforms  
10  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MSP58C20  
AUDIO-BAND CONVERTER  
SPSS015B – DECEMBER 1993 – REVISED JULY 1996  
TYPICAL CHARACTERISTICS  
TRANSMIT IDLE CHANNEL  
RECEIVE IDLE CHANNEL  
SINGLE-FREQUENCY NOISE SPECTRUM  
SINGLE-FREQUENCY NOISE SPECTRUM  
60  
65  
50  
55  
60  
(20,64)  
V
T
A
= 4.75 V to 5.25 V  
V
= 4.75 V to 5.25 V  
(12,65)  
DD  
= 25°C  
DD  
T = 25°C  
A
(100,64)  
(10,64)  
70  
65  
70  
75  
80  
85  
90  
(7,72)  
75 (0.05, 80)  
80  
(4,80)  
(3.4,82)  
(0.3,82)  
85  
(3,82)  
(0.01,82)  
90  
95  
95  
100  
100  
0
5
10  
15  
20  
0
20  
40  
60  
80  
100  
Output Signal Frequency – kHz  
Output Signal Frequency – kHz  
This parameter is characterized but not tested.  
Figure 5  
Figure 6  
RECEIVE SIGNAL-TO-TOTAL-NOISE-  
PLUS-DISTORTION RATIO  
vs  
DIGITAL INPUT SIGNAL MAGNITUDE  
70  
60  
50  
40  
30  
20  
10  
0
G
V
= 5.25 V  
= 25°C  
H
DD  
T
A
I
SET OF  
See Note A  
LOCATION  
POINTS  
F
A
B
C
D
E
F
G
H
I
(–70,9)  
(–58, 23)  
(–53, 28)  
(–43, 38)  
(–35, 46)  
(–28, 53)  
(–13, 67)  
(–5, 69)  
E
(–1,50)  
(–20,50)  
D
C
B
A
(–1, 64)  
(–70,0)  
60  
20  
0
80  
40  
Digital Input Signal Magnitude – dBrl  
NOTE A: The three points on the dashed line are minimum  
qualification standards, which every MSP58C20 must  
pass. The curve shows empirical data from  
a
representative lot.  
Figure 7  
11  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MSP58C20  
AUDIO-BAND CONVERTER  
SPSS015B – DECEMBER 1993 – REVISED JULY 1996  
TYPICAL CHARACTERISTICS  
TRANSMIT SIGNAL-TO-TOTAL-NOISE-  
PLUS-DISTORTION RATIO  
vs  
ANALOG INPUT SIGNAL MAGNITUDE  
70  
60  
50  
40  
30  
20  
10  
0
G
V
= 5.25 V  
H I  
DD  
= 25°C  
T
A
SET OF  
POINTS  
LOCATION  
See Note A  
F
A
B
C
D
E
F
G
H
I
(–70,8)  
(–58, 20)  
(–53, 24)  
(–43, 32)  
(–35, 40)  
(–28, 48)  
(–13, 65)  
(–5, 69)  
(–1,50)  
E
(–20,50)  
D
C
B
A
10  
20  
(–1, 69)  
(–70, 13)  
80 70 60 50 40 30 20 10  
0
Analog Input Signal Magnitude – dBrl  
NOTE A. The three points on the dashed line are minimum  
qualification standards, which every MSP58C20 must  
pass. The curve shows empirical data from  
representative lot.  
a
Figure 8  
12  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MSP58C20  
AUDIO-BAND CONVERTER  
SPSS015B – DECEMBER 1993 – REVISED JULY 1996  
MAXIMUM AND MINIMUM CHARACTERISTICS  
RECEIVE GAIN VARIATIONS  
vs  
INPUT SINE-WAVE FREQUENCY  
4
2
V
T
= 4.75 V  
DD  
= 25°C  
A
A
B
SET OF  
POINTS  
C
MIN  
MAX  
0
–2  
D
Maximum  
A
B
C
D
E
F
G
H
I
(0.156, 0.6)  
(4, 0.6)  
(0.156, 0.6)  
(4, 0.6)  
E
Minimum  
(4.6875, 0.7)  
(6.25, 1.75)  
(7.8125, 3.35)  
(9.375, 5.25)  
(4.6875, 0.4)  
(6.25, 1.4)  
(7.8125, 2.9)  
(9.375, 4.8)  
–4  
F
–6  
G
H
–8  
(10.9375, 7.25) (10.9375, 6.8)  
10  
12  
14  
(12.5, 9.2)  
(12.5, 8.7)  
I
(15.625, 12.8)  
(15.625, 12.2)  
0
2
4
6
8
10  
12  
14  
16 18  
Input Sine-Wave Frequency – kHz  
Figure 9  
13  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MSP58C20  
AUDIO-BAND CONVERTER  
SPSS015B – DECEMBER 1993 – REVISED JULY 1996  
MECHANICAL DATA  
DW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
16 PIN SHOWN  
PINS **  
0.050 (1,27)  
16  
20  
24  
28  
DIM  
0.020 (0,51)  
0.014 (0,35)  
0.010 (0,25)  
M
0.410  
0.510  
0.610  
0.710  
A MAX  
(10,41) (12,95) (15,49) (18,03)  
16  
9
0.400  
0.500  
0.600  
0.700  
A MIN  
(10,16) (12,70) (15,24) (17,78)  
0.419 (10,65)  
0.400 (10,15)  
0.010 (0,25) NOM  
0.299 (7,59)  
0.293 (7,45)  
Gage Plane  
0.010 (0,25)  
1
8
0°8°  
0.050 (1,27)  
0.016 (0,40)  
A
Seating Plane  
0.004 (0,10)  
0.012 (0,30)  
0.004 (0,10)  
0.104 (2,65) MAX  
4040000/B 03/95  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).  
D. Falls within JEDEC MS-013  
14  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Mar-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
Drawing  
MSP58C20DW  
MSP58C20DWR  
MSP58C20S1DW  
MSP58C20S2DW  
SP58C20DW  
OBSOLETE  
OBSOLETE  
OBSOLETE  
OBSOLETE  
OBSOLETE  
OBSOLETE  
DW  
20  
20  
20  
20  
20  
20  
TBD  
TBD  
TBD  
TBD  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
DW  
DW  
DW  
DW  
SP58C20DWR  
DW  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan  
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS  
&
no Sb/Br)  
-
please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
enhancements, improvements, and other changes to its products and services at any time and to discontinue  
any product or service without notice. Customers should obtain the latest relevant information before placing  
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms  
and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI  
deems necessary to support this warranty. Except where mandated by government requirements, testing of all  
parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for  
their products and applications using TI components. To minimize the risks associated with customer products  
and applications, customers should provide adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,  
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in which TI products or services are used. Information published by TI regarding third-party products or services  
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Following are URLs where you can obtain information on other Texas Instruments products and application  
solutions:  
Products  
Applications  
Audio  
Amplifiers  
amplifier.ti.com  
www.ti.com/audio  
Data Converters  
dataconverter.ti.com  
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www.ti.com/automotive  
DSP  
dsp.ti.com  
Broadband  
Digital Control  
Military  
www.ti.com/broadband  
www.ti.com/digitalcontrol  
www.ti.com/military  
Interface  
Logic  
interface.ti.com  
logic.ti.com  
Power Mgmt  
Microcontrollers  
power.ti.com  
Optical Networking  
Security  
www.ti.com/opticalnetwork  
www.ti.com/security  
www.ti.com/telephony  
www.ti.com/video  
microcontroller.ti.com  
Telephony  
Video & Imaging  
Wireless  
www.ti.com/wireless  
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Post Office Box 655303 Dallas, Texas 75265  
Copyright 2005, Texas Instruments Incorporated  

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