OPA2333AIDG4 [TI]
1.8V、17µA、2 通道、微功耗、精密、零漂移 CMOS 运算放大器 | D | 8 | -40 to 125;
| 型号： | OPA2333AIDG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 1.8V、17µA、2 通道、微功耗、精密、零漂移 CMOS 运算放大器 | D | 8 | -40 to 125 放大器 PC 光电二极管 运算放大器 |
| 文件： | 总23页 (文件大小：483K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
OPA188
OPA2188
OPA4188
www.ti.com
SBOS525 –AUGUST 2011
0.03-μV/°C Drift, Low-Noise, Rail-to-Rail Output,
36-V, Zero-Drift OPERATIONAL AMPLIFIERS
Check for Samples: OPA188, OPA2188, OPA4188
1
FEATURES
DESCRIPTION
The OPAx188 series operational amplifiers use TI
proprietary auto-zeroing techniques to provide low
offset voltage (25 μV, max), and near zero-drift over
2
•
•
•
Low Offset Voltage: 25 μV (max)
Zero-Drift: 0.03 μV/°C
Low Noise: 8.8 nV/√Hz
0.1-Hz to 10-Hz Noise: 0.25 µVPP
time
and
temperature.
These
miniature,
high-precision, low quiescent current amplifiers offer
high input impedance and rail-to-rail output swing
within 15 mV of the rails. The input common-mode
range includes the negative rail. Either single or dual
supplies can be used in the range of +4.0 V to +36 V
(±2 V to ±18 V).
•
Excellent DC Precision:
PSRR: 142 dB
CMRR: 146 dB
Open-Loop Gain: 136 dB
•
•
•
•
Gain Bandwidth: 2 MHz
The single version is available in the MicroSIZE
SOT23-5, MSOP-8, and SO-8 packages; the dual is
offered in MSOP-8 and SO-8 packages; the quad is
offered in SO-14 and TSSOP-14 packages. All
versions are specified for operation from –40°C to
+105°C.
Quiescent Current: 475 μA (max)
Wide Supply Range: ±2 V to ±18 V
Rail-to-Rail Output:
Input Includes Negative Rail
•
•
RFI Filtered Inputs
145
MicroSIZE Packages
OPA2188 Zero-Drift Architecture
Precision Laser Trim Architecture
125
105
85
65
45
25
5
APPLICATIONS
•
•
•
•
•
•
•
•
•
Bridge Amplifiers
Strain Gauges
Test Equipment
Transducer Applications
Temperature Measurement
Electronic Scales
Medical Instrumentation
Resister Thermal Detectors
Precision Active Filters
-55 -35 -15
5
25
45
65
85
105 125
Temperature (°C)
Zero-Drift Amplifier Portfolio
OFFSET VOLTAGE DRIFT
VERSION
PRODUCT
OFFSET VOLTAGE (µV)
(µV/°C)
BANDWIDTH (MHz)
Single
OPA188 (4 V to 36 V)
OPA333 (5 V)
25
10
50
5
0.085
0.05
0.25
0.05
0.085
0.05
0.25
0.05
0.085
0.25
2
0.35
0.9
1.6
2
Single
Dual
OPA378 (5 V)
OPA735 (12 V)
OPA2188 (4 V to 36 V)
OPA2333 (5 V)
25
10
50
5
0.35
0.9
1.6
2
OPA2378 (5 V)
OPA2735 (12 V)
OPA4188 (4 V to 36 V)
OPA4330 (5 V)
Quad
Quad
25
50
0.35
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
OPA188
OPA2188
OPA4188
SBOS525 –AUGUST 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE INFORMATION(1)
SPECIFIED
PACKAGE-
LEAD
PACKAGE
DESIGNATOR
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT MEDIA,
QUANTITY
PRODUCT
SINGLE
OPA188AIDBVT
OPA188AIDBVR
OPA188AID
Tape and Reel, 250
Tape and Reel, 3000
Rails, 100
SOT23-5
SO-8
DBV
D
–40°C to +105°C
–40°C to +105°C
–40°C to +105°C
TBD
OPA188A
TBD
OPA188(2)
OPA188AIDR
Tape and Reel, 2500
Tape and Reel, 250
Tape and Reel, 2500
OPA188AIDGKT
OPA188AIDGKR
MSOP-8
DGK
DUAL
OPA2188
QUAD
OPA2188AID
OPA2188AIDR
Rails, 100
SO-8
D
–40°C to +105°C
–40°C to +105°C
2188
2188
Tape and Reel, 2500
Tape and Reel, 250
Tape and Reel, 2500
OPA2188AIDGKT
OPA2188AIDGKR
MSOP-8
DGK
OPA4188AID
OPA4188AIDR
OPA4188AIPW
OPA4188AIPWR
Rails, 90
SO-14
D
–40°C to +105°C
–40°C to +105°C
OPA4188A
OPA4188A
Tape and Reel, 2000
Rails, 90
OPA4188(2)
TSSOP-14
PW
Tape and Reel, 2000
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
(2) Product preview device.
ABSOLUTE MAXIMUM RATINGS
OPAx188
UNIT
V
Supply voltage
±20, 40 (single supply)
Voltage
Current(1)
(V–) – 0.5 to (V+) + 0.5
V
Signal input terminals
±10
Continuous
–55 to +125
–65 to +150
+150
mA
Output short-circuit(2)
Operating temperature
Storage temperature
Junction temperature
°C
°C
°C
kV
kV
Human body model (HBM)
1.5
ESD ratings
Charged device model (CDM)
1
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only and functional operation of the device at these or any other conditions beyond
those specified is not implied.
(2) Short-circuit to ground, one amplifier per package.
2
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Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): OPA188 OPA2188 OPA4188
OPA188
OPA2188
OPA4188
www.ti.com
SBOS525 –AUGUST 2011
ELECTRICAL CHARACTERISTICS: High-Voltage Operation
VS = ±4 V to ±18 V (VS = +8 V to +36 V)
Boldface limits apply over the specified temperature range, TA = –40°C to +105°C.
At TA = +25°C, RL = 10 kΩ connected to VS/2, and VCOM = VOUT = VS/2, unless otherwise noted.
OPA188, OPA2188, OPA4188
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
VOS
Input offset voltage
vs Temperature
vs power supply
6
0.03
25
0.085
0.3
μV
μV/°C
μV/V
μV/V
μV
dVOS/dT
VS = 4 V to 36 V, VCM = VS/2
0.075
PSRR
vs temperature
VS = 4 V to 36 V, VCM = VS/2
0.3
Long-term stability
Channel separation, dc
See note(1)
1
μV/V
INPUT BIAS CURRENT
Input bias current
VCM = VS/2
±160
±320
±850
±4
pA
nA
pA
nA
IB
over temperature
Input offset current
over temperature
–40°C to +105°C
±1700
±2
IOS
–40°C to +105°C
NOISE
en
en
in
Input voltage noise, f = 0.1 Hz to 10 Hz
Input voltage noise density, f = 1 kHz
Input current noise density, f = 1 kHz
0.25
8.8
7
μVPP
nV/Hz
fA/Hz
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
V–
(V+) – 1.5
V
(V–) < VCM < (V+) – 1.5 V
120
134
146
dB
Common-mode rejection ratio
(V–) + 0.5 V < VCM < (V+) – 1.5 V,
VS = ±18 V
130
dB
CMRR
(V–) + 0.5 V < VCM < (V+) – 1.5 V,
VS = ±18 V
over temperature
120
126
dB
INPUT IMPEDANCE
Differential
Common-mode
OPEN-LOOP GAIN
100/6
6/9.5
MΩ/pF
1012 Ω/pF
(V–) + 500 mV < VO < (V+) – 500 mV,
RL = 10 kΩ
Open-loop voltage gain
130
136
dB
AOL
(V–) + 500 mV < VO < (V+) – 500 mV,
RL = 10 kΩ
Open-loop voltage gain
120
126
dB
FREQUENCY RESPONSE
GBW
SR
Gain-bandwidth product
2
0.8
MHz
V/μs
μs
Slew rate
G = +1
Settling time, 0.1%
VS = ±18 V, G = 1, 10-V step
VS = ±18 V, G = 1, 10-V step
20
Settling time, 0.01%
Overload recovery time
Total harmonic distortion + noise
27
μs
VIN × G = VS
1
μs
THD+N
1 kHz, G = 1, VOUT = 1 Vrms
0.0001
%
(1) 1000-hour life test at +125°C demonstrated randomly distributed variation in the range of measurement limits—approximately 4 μV.
Copyright © 2011, Texas Instruments Incorporated
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OPA188
OPA2188
OPA4188
SBOS525 –AUGUST 2011
www.ti.com
ELECTRICAL CHARACTERISTICS: High-Voltage Operation (continued)
VS = ±4 V to ±18 V (VS = +8 V to +36 V)
Boldface limits apply over the specified temperature range, TA = –40°C to +105°C.
At TA = +25°C, RL = 10 kΩ connected to VS/2, and VCOM = VOUT = VS/2, unless otherwise noted.
OPA188, OPA2188, OPA4188
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
OUTPUT
No load
6
220
310
±18
120
1
15
250
350
mV
mV
mV
mA
Ω
Voltage output swing from rail
RL = 10 kΩ
RL = 10 kΩ
Voltage output swing from rail
Short-circuit current
ISC
RO
Open-loop output resistance
Capacitive load drive
f = 1 MHz, IO = 0
CLOAD
nF
POWER SUPPLY
VS
Operating voltage range
4 to 36 (±2 to ±18)
V
Quiescent current (per amplifier)
VS = ±4 V to VS = ±18 V
415
475
μA
μA
IQ
over temperature
IO = 0 mA
525
TEMPERATURE RANGE
Specified range
–40
–40
–65
+105
+125
+150
°C
°C
°C
Operating range
Storage range
4
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Product Folder Link(s): OPA188 OPA2188 OPA4188
OPA188
OPA2188
OPA4188
www.ti.com
SBOS525 –AUGUST 2011
ELECTRICAL CHARACTERISTICS: Low-Voltage Operation
VS = ±2 V to < ±4 V (VS = +4 V to < +8 V)
Boldface limits apply over the specified temperature range, TA = –40°C to +105°C.
At TA = +25°C, RL = 10 kΩ connected to VS/2, and VCOM = VOUT = VS/2, unless otherwise noted.
OPA188, OPA2188, OPA4188
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
VOS
Input offset voltage
vs temperature
6
0.03
25
0.085
0.3
μV
μV/°C
μV/V
μV/V
μV
dVOS/dT
vs power supply
VS = 4 V to 36 V, VCM = VS/2
0.075
PSRR
vs temperature
VS = 4 V to 36 V, VCM = VS/2
0.3
Long-term stability
Channel separation, dc
See Note(1)
1
μV/V
INPUT BIAS CURRENT
Input bias current
VCM = VS/2
±160
±320
±850
±4
pA
nA
pA
nA
IB
over temperature
Input offset current
over temperature
–40°C to +105°C
±1700
±2
IOS
–40°C to +105°C
NOISE
en
Input voltage noise, f = 0.1 Hz to 10 Hz
Input voltage noise density, f = 1 kHz
Input current noise density, f = 1 kHz
0.25
8.8
7
μVPP
nV/Hz
fA/Hz
in
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
V–
(V+) – 1.5
V
(V–) < VCM < (V+) – 1.5 V
106
114
120
dB
Common-mode rejection ratio
(V–) + 0.5 V < VCM < (V+) – 1.5 V,
VS = ±2 V
114
dB
CMRR
(V–) + 0.5 V < VCM < (V+) – 1.5 V,
VS = ±2 V
over temperature
110
120
dB
INPUT IMPEDANCE
Differential
Common-mode
OPEN-LOOP GAIN
100/6
6/95
MΩ/pF
1012 Ω/pF
(V–) + 500 mV < VO < (V+) – 500 mV,
RL = 5 kΩ, VS = 5 V
110
120
114
120
130
120
dB
dB
dB
Open-loop voltage gain
(V–) + 500 mV < VO < (V+) – 500 mV,
RL = 10 kΩ
AOL
(V–) + 500 mV < VO < (V+) – 500 mV,
RL = 10 kΩ
Open-loop voltage gain
FREQUENCY RESPONSE
GBW
SR
Gain-bandwidth product
2
0.8
MHz
V/μs
μs
Slew rate
G = +1
Overload recovery time
Total harmonic distortion + noise
VIN × G = VS
1
THD+N
1 kHz, G = 1, VOUT = 1 Vrms
0.0001
%
(1) 1000-hour life test at +125°C demonstrated randomly distributed variation in the range of measurement limits—approximately 4 μV.
Copyright © 2011, Texas Instruments Incorporated
Submit Documentation Feedback
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Product Folder Link(s): OPA188 OPA2188 OPA4188
OPA188
OPA2188
OPA4188
SBOS525 –AUGUST 2011
www.ti.com
ELECTRICAL CHARACTERISTICS: Low-Voltage Operation (continued)
VS = ±2 V to < ±4 V (VS = +4 V to < +8 V)
Boldface limits apply over the specified temperature range, TA = –40°C to +105°C.
At TA = +25°C, RL = 10 kΩ connected to VS/2, and VCOM = VOUT = VS/2, unless otherwise noted.
OPA188, OPA2188, OPA4188
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
OUTPUT
No load
6
220
310
±18
120
1
15
250
350
mV
mV
mV
mA
Ω
Voltage output swing from rail
RL = 10 kΩ
RL = 10 kΩ
Voltage output swing from rail
Short-circuit current
ISC
RO
Open-loop output resistance
Capacitive load drive
f = 1 MHz, IO = 0
CLOAD
nF
POWER SUPPLY
VS
Operating voltage range
4 to 36 (±2 to ±18)
V
Quiescent current (per amplifier)
VS = ±2 V to VS = ±4 V
385
440
μA
μA
IQ
over temperature
IO = 0 mA
525
TEMPERATURE RANGE
Specified range
–40
–40
–65
+105
+125
+150
°C
°C
°C
Operating range
Storage range
THERMAL INFORMATION: OPA2188
OPA2188ID
D
OPA2188IDGK
DGK
THERMAL METRIC(1)
UNITS
8 PINS
111.0
54.9
8 PINS
159.3
37.4
θJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
θJCtop
θJB
51.7
48.5
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
9.3
1.2
ψJB
51.1
77.1
θJCbot
n/a
n/a
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
6
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Product Folder Link(s): OPA188 OPA2188 OPA4188
OPA188
OPA2188
OPA4188
www.ti.com
SBOS525 –AUGUST 2011
PIN CONFIGURATIONS
OPA188
D, DGK PACKAGES (SO-8, MSOP-8)
(TOP VIEW)
OPA188
DBV PACKAGE (SOT23-5)
(TOP VIEW)
NC(1)
-IN
+IN
V-
1
2
3
4
8
7
6
5
NC
V+
V+
OUT
V-
1
2
3
5
4
OUT
NC
-IN
+IN
OPA4188
(1) NC = no connection.
D, PW PACKAGES (SO-14, TSSOP-14)
(TOP VIEW)
OPA2188
D, DGK PACKAGES (SO-8, MSOP-8)
(TOP VIEW)
OUT D
-IN D
+IN D
V-
OUT A
1
2
3
4
5
6
7
14
13
12
11
10
9
-IN A
+IN A
V+
A
D
OUT A
-IN A
+IN A
V-
1
2
3
4
8
7
6
5
V+
A
OUT B
-IN B
+IN B
B
+IN C
-IN C
OUT C
+IN B
-IN B
OUT B
B
C
8
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OPA188
OPA2188
OPA4188
SBOS525 –AUGUST 2011
www.ti.com
TYPICAL CHARACTERISTICS
Table 1. Characteristic Performance Measurements
DESCRIPTION
FIGURE
Figure 1
Offset Voltage Production Distribution
Offset Voltage Drift Distribution
Figure 2
Offset Voltage vs Temperature
Figure 3
Offset Voltage vs Common-Mode Voltage
Offset Voltage vs Power Supply
Figure 4, Figure 5
Figure 6
IB and IOS vs Common-Mode Voltage
Input Bias Current vs Temperature
Output Voltage Swing vs Output Current (Maximum Supply)
CMRR and PSRR vs Frequency (Referred-to-Input)
CMRR vs Temperature
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11, Figure 12
Figure 13
PSRR vs Temperature
0.1-Hz to 10-Hz Noise
Figure 14
Input Voltage Noise Spectral Density vs Frequency
THD+N Ratio vs Frequency
Figure 15
Figure 16
THD+N vs Output Amplitude
Figure 17
Quiescent Current vs Supply Voltage
Quiescent Current vs Temperature
Open-Loop Gain and Phase vs Frequency
Closed-Loop Gain vs Frequency
Figure 18
Figure 19
Figure 20
Figure 21
Open-Loop Gain vs Temperature
Open-Loop Output Impedance vs Frequency
Small-Signal Overshoot vs Capacitive Load (100-mV Output Step)
No Phase Reversal
Figure 22
Figure 23
Figure 24, Figure 25
Figure 26
Positive Overload Recovery
Figure 27
Negative Overload Recovery
Figure 28
Small-Signal Step Response (100 mV)
Large-Signal Step Response
Figure 29, Figure 30
Figure 31, Figure 32
Figure 33
Large-Signal Settling Time (10-V Positive Step)
Large-Signal Settling Time (10-V Negative Step)
Short-Circuit Current vs Temperature
Maximum Output Voltage vs Frequency
Channel Separation vs Frequency
EMIRR IN+ vs Frequency
Figure 34
Figure 35
Figure 36
Figure 37
Figure 38
8
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Product Folder Link(s): OPA188 OPA2188 OPA4188
OPA188
OPA2188
OPA4188
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SBOS525 –AUGUST 2011
TYPICAL CHARACTERISTICS
VS = ±18 V, VCM = VS/2, RLOAD = 10 kΩ connected to VS/2, and CL = 100 pF, unless otherwise noted.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
OFFSET VOLTAGE DRIFT DISTRIBUTION
20
18
16
14
12
10
8
40
35
30
25
20
15
10
5
Distribution Taken From 1400 Amplifiers
Distribution Taken From 78 Amplifiers
6
4
2
0
0
Offset Voltage (mV)
Offset Voltage Drift (mV/°C)
Figure 1.
Figure 2.
OFFSET VOLTAGE vs TEMPERATURE
OFFSET VOLTAGE vs COMMON-MODE VOLTAGE
15
10
5
15
10
5
5 Typical Units Shown
VS = ±2 V
5 Typical Units Shown
VS = ±18 V
0
0
-5
-10
-15
-5
-10
-15
-2.5 -2 -1.5 -1 -0.5
0
0.5
1
1.5
2
2.5
-55 -35 -15
5
25
45
65
85
105 125
VCM (V)
Temperature (°C)
Figure 3.
Figure 4.
OFFSET VOLTAGE vs COMMON-MODE VOLTAGE
OFFSET VOLTAGE vs POWER SUPPLY
15
10
5
15
10
5
5 Typical Units Shown
VS = ±18 V
5 Typical Units Shown
VSUPPLY = ±2 V to ±18 V
0
0
-5
-10
-15
-5
-10
-15
-20
-15
-10
-5
0
5
10
15
20
0
2
4
6
8
10
12
14
16
18
20
VCM (V)
VSUPPLY (V)
Figure 5.
Figure 6.
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OPA2188
OPA4188
SBOS525 –AUGUST 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
VS = ±18 V, VCM = VS/2, RLOAD = 10 kΩ connected to VS/2, and CL = 100 pF, unless otherwise noted.
IB AND IOS vs COMMON-MODE VOLTAGE
INPUT BIAS CURRENT vs TEMPERATURE
500
400
300
200
100
0
4000
3000
2000
1000
0
IB+
IB-
IOS
+IB
-IB
IOS
-100
-200
-300
-1000
-2000
-20
-15
-10
-5
0
5
10
15
20
-55 -35 -15
5
25
45
65
85
105 125
VCM (V)
Temperature (°C)
Figure 7.
Figure 8.
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
(Maximum Supply)
CMRR AND PSRR vs FREQUENCY
(Referred-to-Input)
20
19
160
140
120
100
80
-40°C
+85°C
+125°C
18
17
16
15
14
-14
-15
-16
-17
-18
-19
-20
60
40
+PSRR
-PSRR
CMRR
20
0
0
2
4
6
8
10 12 14 16 18 20 22 24
1
10
100
1k
10k
100k
1M
Output Current (mA)
Frequency (Hz)
Figure 9.
Figure 10.
CMRR vs TEMPERATURE
CMRR vs TEMPERATURE
40
35
30
25
20
15
10
5
8
7
6
5
4
3
2
1
0
(V-) < VCM < (V+) - 1.5 V
(V-) < VCM < (V+) - 1.5 V
(V-) + 0.5 V < VCM < (V+) - 1.5 V
(V-) + 0.5 V < VCM < (V+) - 1.5 V
VSUPPLY = ±2 V
VSUPPLY = ±18 V
0
-55 -35 -15
5
25
45
65
85
105 125
-55 -35 -15
5
25
45
65
85
105 125
Temperature (°C)
Temperature (°C)
Figure 11.
Figure 12.
10
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TYPICAL CHARACTERISTICS (continued)
VS = ±18 V, VCM = VS/2, RLOAD = 10 kΩ connected to VS/2, and CL = 100 pF, unless otherwise noted.
PSRR vs TEMPERATURE
0.1-Hz TO 10-Hz NOISE
1
0.8
5 Typical Units Shown
VSUPPLY = ±2 V to ±18 V
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1
Peak-to-Peak Noise = 250 nV
Time (1 s/div)
-55 -35 -15
5
25
45
65
85
105 125
Temperature (°C)
Figure 13.
Figure 14.
INPUT VOLTAGE NOISE SPECTRAL DENSITY vs
FREQUENCY
THD+N RATIO vs FREQUENCY
100
10
1
0.01
0.001
-80
VOUT = 1 VRMS
BW = 80 kHz
-100
-120
-140
0.0001
0.00001
G = +1, RL = 10 kW
G = -1, RL = 10 kW
10
100
1k
10k 20k
0.1
1
10
100
1k
10k
100k
Frequency (Hz)
Frequency (Hz)
Figure 15.
Figure 16.
THD+N vs OUTPUT AMPLITUDE
QUIESCENT CURRENT vs SUPPLY VOLTAGE
0.1
-60
0.5
BW = 80 kHz
0.48
0.46
0.44
0.42
0.4
0.01
-80
0.001
0.0001
-100
-120
-140
0.38
0.36
0.34
0.32
0.3
G = +1, RL = 10 kW
G = -1, RL = 10 kW
Specified Supply-Voltage Range
0.00001
0.01
0.1
1
10 20
0
4
8
12
16
20
24
28
32
36
Output Amplitude (VRMS
)
Supply Voltage (V)
Figure 17.
Figure 18.
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TYPICAL CHARACTERISTICS (continued)
VS = ±18 V, VCM = VS/2, RLOAD = 10 kΩ connected to VS/2, and CL = 100 pF, unless otherwise noted.
QUIESCENT CURRENT vs TEMPERATURE
OPEN-LOOP GAIN AND PHASE vs FREQUENCY
0.5
0.48
0.46
0.44
0.42
0.4
0
180
135
90
Gain
VS = ±18 V
VS = ±2 V
-45
-90
-135
-180
Phase
45
0.38
0.36
0.34
0.32
0.3
0
-45
-225
0.1
1
10
100
1k
10k 100k
1M
10M
-55 -35 -15
5
25
45
65
85
105 125
Frequency (Hz)
Temperature (°C)
Figure 19.
Figure 20.
CLOSED-LOOP GAIN vs FREQUENCY
OPEN-LOOP GAIN vs TEMPERATURE
3
2.5
2
25
20
15
10
5
VSUPPLY = 4 V, RL = 10 kW
VSUPPLY = 36 V, RL = 10 kW
1.5
1
0
-5
-10
-15
-20
G = 10
G = +1
G = -1
0.5
0
10k
100k
1M
10M
-55 -35 -15
5
25
45
65
85
105 125
Frequency (Hz)
Temperature (°C)
Figure 21.
Figure 22.
SMALL-SIGNAL OVERSHOOT vs CAPACITIVE LOAD
(100-mV Output Step)
OPEN-LOOP OUTPUT IMPEDANCE vs FREQUENCY
10k
40
RL = 10 kW
35
30
25
20
15
10
5
ROUT = 0 W
1k
100
10
ROUT = 25 W
ROUT = 50 W
G = +1
+18
V
ROUT
Device
1
RL
CL
-18
V
0
1m
1
10
100
1k
10k
100k
1M
10M
0
100 200 300 400 500 600 700 800 900 1000
Capacitive Load (pF)
Frequency (Hz)
Figure 23.
Figure 24.
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TYPICAL CHARACTERISTICS (continued)
VS = ±18 V, VCM = VS/2, RLOAD = 10 kΩ connected to VS/2, and CL = 100 pF, unless otherwise noted.
SMALL-SIGNAL OVERSHOOT vs CAPACITIVE LOAD
(100-mV Output Step)
NO PHASE REVERSAL
40
35
30
25
20
15
10
5
+18 V
ROUT = 0 W
ROUT = 25 W
ROUT = 50 W
Device
-18 V
37 VPP
Sine Wave
(±18.5 V)
RF = 10 kW
RI = 10 kW
G = -1
+18 V
ROUT
VIN
Device
CL
VOUT
RL = 10 kW
-18 V
0
Time (100 ms/div)
0
100 200 300 400 500 600 700 800 900 1000
Capacitive Load (pF)
Figure 25.
Figure 26.
POSITIVE OVERLOAD RECOVERY
NEGATIVE OVERLOAD RECOVERY
VIN
VOUT
20 kW
20 kW
+18 V
2 kW
+18 V
2 kW
VOUT
Device
VOUT
VIN
Device
VIN
-18 V
-18 V
G = -10
G = -10
VOUT
VIN
Time (5 ms/div)
Time (5 ms/div)
Figure 27.
Figure 28.
SMALL-SIGNAL STEP RESPONSE
(100 mV)
SMALL-SIGNAL STEP RESPONSE
(100 mV)
RL = 10 kW
CL = 10 pF
RL = 10 kW
CL = 10 pF
RI = 2 kW RF = 2 kW
G = +1
+18 V
Device
-18 V
+18 V
Device
RL
CL
CL
-18 V
G = -1
Time (20 ms/div)
Time (1 ms/div)
Figure 29.
Figure 30.
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TYPICAL CHARACTERISTICS (continued)
VS = ±18 V, VCM = VS/2, RLOAD = 10 kΩ connected to VS/2, and CL = 100 pF, unless otherwise noted.
LARGE-SIGNAL STEP RESPONSE
LARGE-SIGNAL STEP RESPONSE
G = +1
RL = 10 kW
G = -1
RL = 10 kW
CL = 10 pF
CL = 10 pF
Time (50 ms/div)
Time (50 ms/div)
Figure 31.
Figure 32.
LARGE-SIGNAL SETTLING TIME
(10-V Positive Step)
LARGE-SIGNAL SETTLING TIME
(10-V Negative Step)
10
8
10
8
G = -1
G = -1
6
6
4
4
12-Bit Settling
12-Bit Settling
2
2
0
0
-2
-4
-6
-8
-10
-2
-4
-6
-8
-10
(±1/2 LSB = ±0.024%)
(±1/2 LSB = ±0.024%)
0
10
20
30
40
50
60
0
10
20
30
40
50
60
Time (ms)
Time (ms)
Figure 33.
Figure 34.
SHORT-CIRCUIT CURRENT vs TEMPERATURE
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
30
20
15
12.5
10
VS = ±15 V
10
Maximum output voltage without
slew-rate induced distortion.
ISC, Source
ISC, Sink
0
7.5
5
VS = ±5 V
-10
-20
-30
2.5
0
VS = ±2.25 V
-55 -35 -15
5
25
45
65
85
105 125
1k
10k
100k
1M
10M
Temperature (°C)
Frequency (Hz)
Figure 35.
Figure 36.
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TYPICAL CHARACTERISTICS (continued)
VS = ±18 V, VCM = VS/2, RLOAD = 10 kΩ connected to VS/2, and CL = 100 pF, unless otherwise noted.
CHANNEL SEPARATION vs FREQUENCY
EMIRR IN+ vs FREQUENCY
-60
-70
160
140
120
100
80
Channel A to B
Channel B to A
-80
-90
-100
-110
-120
-130
-140
-150
60
40
20
0
1
10
100
1k
10k 100k
1M
10M 100M
10M
100M
Frequency (Hz)
1G
10G
Frequency (Hz)
Figure 37.
Figure 38.
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APPLICATION INFORMATION
The OPAx188 family of operational amplifiers combine precision offset and drift with excellent overall
performance, making them ideal for many precision applications. The precision offset drift of only 0.085 µV/°C
provides stability over the entire temperature range. In addition, the device offers excellent overall performance
with high CMRR, PSRR, and AOL. As with all amplifiers, applications with noisy or high-impedance power
supplies require decoupling capacitors close to the device pins. In most cases, 0.1-µF capacitors are adequate.
OPERATING CHARACTERISTICS
The OPAx188 family of amplifiers is specified for operation from 4 V to 36 V (±2 V to ±18 V). Many of the
specifications apply from –40°C to +105°C. Parameters that can exhibit significant variance with regard to
operating voltage or temperature are presented in the Typical Characteristics.
EMI REJECTION
The OPAx188 uses integrated electromagnetic interference (EMI) filtering to reduce the effects of EMI
interference from sources such as wireless communications and densely populated boards with a mix of analog
signal chain and digital components. EMI immunity can be improved with circuit design techniques; the OPAx188
benefits from these design improvements. Texas Instruments has developed the ability to accurately measure
and quantify the immunity of an operational amplifier over a broad frequency spectrum extending from 10 MHz to
6 GHz. Figure 39 shows the results of this testing on the OPAx188. Detailed information can also be found in the
Application Report EMI Rejection Ratio of Operational Amplifiers (SBOA128), available for download from the TI
website.
160
140
120
100
80
60
40
20
0
10M
100M
Frequency (Hz)
1G
10G
Figure 39. OPAx188 EMIRR Testing
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GENERAL LAYOUT GUIDELINES
For best operational performance of the device, good printed circuit board (PCB) layout practices are
recommended. Low-loss, 0.1-µF bypass capacitors should be connected between each supply pin and ground,
placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable to
single-supply applications.
PHASE-REVERSAL PROTECTION
The OPAx188 family has an internal phase-reversal protection. Many op amps exhibit a phase reversal when the
input is driven beyond its linear common-mode range. This condition is most often encountered in noninverting
circuits when the input is driven beyond the specified common-mode voltage range, causing the output to
reverse into the opposite rail. The input of the OPAx188 prevents phase reversal with excessive common-mode
voltage. Instead, the output limits into the appropriate rail. This performance is shown in Figure 40.
+18 V
Device
-18 V
37 VPP
Sine Wave
(±18.5 V)
VIN
VOUT
Time (100 ms/div)
Figure 40. No Phase Reversal
CAPACITIVE LOAD AND STABILITY
The dynamic characteristics of the OPAx188 have been optimized for a range of common operating conditions.
The combination of low closed-loop gain and high capacitive loads decreases the phase margin of the amplifier
and can lead to gain peaking or oscillations. As a result, heavier capacitive loads must be isolated from the
output. The simplest way to achieve this isolation is to add a small resistor (for example, ROUT equal to 50 Ω) in
series with the output. Figure 41 and Figure 42 illustrate graphs of small-signal overshoot versus capacitive load
for several values of ROUT. Also, refer to the Applications Report, Feedback Plots Define Op Amp AC
Performance (SBOA015), available for download from the TI website, for details of analysis techniques and
application circuits.
40
35
30
25
20
15
10
5
40
35
30
25
20
15
10
5
RL = 10 kW
ROUT = 0 W
ROUT = 25 W
ROUT = 50 W
ROUT = 0 W
ROUT = 25 W
ROUT = 50 W
G = +1
+18
V
RF = 10 kW
RI = 10 kW
G = -1
ROUT
+18 V
Device
ROUT
RL
CL
-18
V
Device
CL
RL = 10 kW
-18 V
0
0
0
100 200 300 400 500 600 700 800 900 1000
Capacitive Load (pF)
0
100 200 300 400 500 600 700 800 900 1000
Capacitive Load (pF)
Figure 41. Small-Signal Overshoot versus
Capacitive Load (100-mV Output Step)
Figure 42. Small-Signal Overshoot versus
Capacitive Load (100-mV Output Step)
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ELECTRICAL OVERSTRESS
Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress.
These questions tend to focus on the device inputs, but may involve the supply voltage pins or even the output
pin. Each of these different pin functions have electrical stress limits determined by the voltage breakdown
characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin.
Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from
accidental ESD events both before and during product assembly.
These ESD protection diodes also provide in-circuit, input overdrive protection, as long as the current is limited to
10 mA as stated in the Absolute Maximum Ratings. Figure 43 shows how a series input resistor may be added to
the driven input to limit the input current. The added resistor contributes thermal noise at the amplifier input and
its value should be kept to a minimum in noise-sensitive applications.
V+
IOVERLOAD
10 mA max
VOUT
Device
VIN
5 kW
Figure 43. Input Current Protection
An ESD event produces a short duration, high-voltage pulse that is transformed into a short duration,
high-current pulse as it discharges through a semiconductor device. The ESD protection circuits are designed to
provide a current path around the operational amplifier core to prevent it from being damaged. The energy
absorbed by the protection circuitry is then dissipated as heat.
When the operational amplifier connects into a circuit, the ESD protection components are intended to remain
inactive and not become involved in the application circuit operation. However, circumstances may arise where
an applied voltage exceeds the operating voltage range of a given pin. Should this condition occur, there is a risk
that some of the internal ESD protection circuits may be biased on, and conduct current. Any such current flow
occurs through ESD cells and rarely involves the absorption device.
If there is an uncertainty about the ability of the supply to absorb this current, external zener diodes may be
added to the supply pins. The zener voltage must be selected such that the diode does not turn on during normal
operation.
However, its zener voltage should be low enough so that the zener diode conducts if the supply pin begins to
rise above the safe operating supply voltage level.
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APPLICATION EXAMPLES
The application examples of Figure 44 and Figure 45 highlight only a few of the circuits where the OPAx188
family of devices can be used.
15 V
U2
1/2
VOUTP
OPA2188
3.3 V
R5
VDIFF/2
-15 V
1 kW
Ref 1
Ref 2
RG
500 W
R7
U1
INA159
VOUT
+
1 kW
VCM
10
Sense
-15 V
U5
1/2
-VDIFF/2
VOUTN
OPA2188
15 V
Figure 44. Discrete INA + Attenuation for ADC with 3.3-V Supply
+15 V
(5 V)
Out
In
REF5050
1 mF
1 mF
R2
49.1 kW
R3
60.4 kW
R1
4.99 kW
0°C = 0 V
VOUT
OPA188
200°C = 5 V
R5
105.8 kW(1)
RTD
Pt100
R4
1 kW
(1) R5 provides positive-varying excitation to linearize output.
Figure 45. RTD Amplifier with Linearization
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PACKAGE OPTION ADDENDUM
www.ti.com
15-Aug-2011
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
OPA2188AID
PREVIEW
ACTIVE
SOIC
D
8
8
TBD
Call TI
Call TI
OPA2188AIDGKR
MSOP
DGK
2500
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
OPA2188AIDGKT
OPA2188AIDR
ACTIVE
MSOP
SOIC
DGK
D
8
8
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
PREVIEW
TBD
Call TI
Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
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