OPA2357AIDGST [TI]

250MHz, Rail-to-Rail I/O, CMOSnull; 250MHz轨至轨I / O, CMOSnull
OPA2357AIDGST
型号: OPA2357AIDGST
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

250MHz, Rail-to-Rail I/O, CMOSnull
250MHz轨至轨I / O, CMOSnull

运算放大器 放大器电路 光电二极管
文件: 总30页 (文件大小:1094K)
中文:  中文翻译
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OPA357  
OPA2357  
SBOS235E − MARCH 2002− REVISED MAY 2009  
250MHz, Rail-to-Rail I/O, CMOS  
Operational Amplifier with Shutdown  
FD EATURES  
DESCRIPTION  
UNITY-GAIN BANDWIDTH: 250MHz  
WIDE BANDWIDTH: 100MHz GBW  
HIGH SLEW RATE: 150V/ms  
LOW NOISE: 6.5nV/Hz  
The OPA357 series of high-speed, voltage-feedback  
CMOS operational amplifiers are designed for video and  
other applications requiring wide bandwidth. They are  
unity-gain stable and can drive large output currents.  
Differential gain is 0.02% and differential phase is 0.09°.  
Quiescent current is only 4.9mA per channel.  
D
D
D
D
D
D
RAIL-TO-RAIL I/O  
HIGH OUTPUT CURRENT: > 100mA  
EXCELLENT VIDEO PERFORMANCE:  
The OPA357 series op amps are optimized for operation  
on single or dual supplies as low as 2.5V ( 1.25V) and up  
to 5.5V ( 2.75V). Common-mode input range extends  
beyond the supplies. The output swing is within 100mV of  
the rails, supporting wide dynamic range.  
Diff Gain: 0.02%, Diff Phase: 0.095  
0.1dB Gain Flatness: 40MHz  
D
D
D
D
D
D
LOW INPUT BIAS CURRENT: 3pA  
QUIESCENT CURRENT: 4.9mA  
THERMAL SHUTDOWN  
For applications requiring the full 100mA continuous  
output current, the single SO-8 PowerPAD version is  
available.  
SUPPLY RANGE: 2.5V to 5.5V  
SHUTDOWN I < 6mA  
Q
The single version (OPA357), comes in the miniature  
SOT23-6 and SO-8 PowerPAD packages. The dual  
version (OPA2357) is offered in the MSOP-10 package.  
MicroSIZE AND PowerPADPACKAGES  
The dual version features completely independent  
circuitry for lowest crosstalk and freedom from interaction.  
All are specified over the extended −40°C to +125°C  
temperature range.  
AD PPLICATIONS  
VIDEO PROCESSING  
D
D
D
D
D
D
ULTRASOUND  
OPTICAL NETWORKING, TUNABLE LASERS  
PHOTODIODE TRANSIMPEDANCE AMPS  
ACTIVE FILTERS  
OPAx357 RELATED PRODUCTS  
FEATURES  
PRODUCT  
OPAx354  
HIGH-SPEED INTEGRATORS  
Non-Shutdown Version of OPA357 Family  
ANALOG-TO-DIGITAL (A/D) CONVERTER  
INPUT BUFFERS  
200MHz GBW, Rail-to-Rail Output, CMOS, Shutdown OPAx355  
200MHz GBW, Rail-to-Rail Output, CMOS  
38MHz GBW, Rail-to-Rail Input/Output, CMOS  
75MHz BW G = 2, Rail-to-Rail Output  
OPAx356  
OPAx350/3  
OPAx631  
OPAx634  
THS412x  
D
DIGITAL-TO-ANALOG (D/A) CONVERTER  
OUTPUT AMPLIFIERS  
D
BARCODE SCANNERS  
COMMUNICATIONS  
150MHz BW G = 2, Rail-to-Rail Output  
D
100MHz BW, Differential Input/Output, 3.3V Supply  
V+  
VIN  
VOUT  
OPA357  
+VIN  
V
Enable  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PowerPAD is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.  
ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆꢇ ꢂꢈ ꢃ ꢉꢆꢉ ꢊꢋ ꢌꢍ ꢎ ꢏꢐ ꢑꢊꢍꢋ ꢊꢒ ꢓꢔ ꢎ ꢎ ꢕꢋꢑ ꢐꢒ ꢍꢌ ꢖꢔꢗ ꢘꢊꢓ ꢐꢑꢊ ꢍꢋ ꢙꢐ ꢑꢕꢚ ꢀꢎ ꢍꢙꢔ ꢓꢑꢒ  
ꢓ ꢍꢋ ꢌꢍꢎ ꢏ ꢑꢍ ꢒ ꢖꢕ ꢓ ꢊ ꢌꢊ ꢓ ꢐ ꢑꢊ ꢍꢋꢒ ꢖ ꢕꢎ ꢑꢛꢕ ꢑꢕ ꢎ ꢏꢒ ꢍꢌ ꢆꢕꢜ ꢐꢒ ꢇꢋꢒ ꢑꢎ ꢔꢏ ꢕꢋꢑ ꢒ ꢒꢑ ꢐꢋꢙ ꢐꢎ ꢙ ꢝ ꢐꢎ ꢎ ꢐ ꢋꢑꢞꢚ  
ꢀꢎ ꢍ ꢙꢔꢓ ꢑ ꢊꢍ ꢋ ꢖꢎ ꢍ ꢓ ꢕ ꢒ ꢒ ꢊꢋ ꢟ ꢙꢍ ꢕ ꢒ ꢋꢍꢑ ꢋꢕ ꢓꢕ ꢒꢒ ꢐꢎ ꢊꢘ ꢞ ꢊꢋꢓ ꢘꢔꢙ ꢕ ꢑꢕ ꢒꢑꢊ ꢋꢟ ꢍꢌ ꢐꢘ ꢘ ꢖꢐ ꢎ ꢐꢏ ꢕꢑꢕ ꢎ ꢒꢚ  
Copyright 2002-2009, Texas Instruments Incorporated  
www.ti.com  
ꢂꢀꢉꢠ ꢡꢢ  
ꢂꢀꢉꢣ ꢠꢡ ꢢ  
www.ti.com  
SBOS235E − MARCH 2002− REVISED MAY 2009  
(1)  
ABSOLUTE MAXIMUM RATINGS  
ELECTROSTATIC  
Supply Voltage, V+ to V− . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5V  
DISCHARGE SENSITIVITY  
(2)  
Signal Input Terminals Voltage  
. . . (V−) − (0.5V) to (V+) + (0.5V)  
. . . . . . . . . . . . . . . . . . . . . 10mA  
This integrated circuit can be damaged by ESD. Texas Instruments  
recommends that all integrated circuits be handled with appropriate  
precautions. Failure to observe proper handling and installation  
procedures can cause damage.  
(2)  
Current  
Enable Input . . . . . . . . . . . . . . . . . . . . (V−) − (0.5V) to (V+) + (0.5V)  
(3)  
Output Short-Circuit  
. . . . . . . . . . . . . . . . . . . . . . . . . . Continuous  
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . −55°C to +150°C  
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C  
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C  
ESD damage can range from subtle performance degradation to  
complete device failure. Precision integrated circuits may be more  
susceptible to damage because very small parametric changes could  
cause the device not to meet its published specifications.  
(1)  
Stresses above these ratings may cause permanent damage.  
Exposure to absolute maximum conditions for extended periods  
may degrade device reliability. These are stress ratings only, and  
functional operation of the device at these or any other conditions  
beyond those specified is not supported.  
(2)  
(3)  
Input terminals are diode-clamped to the power-supply rails.  
Input signals that can swing more than 0.5V beyond the supply  
rails should be current limited to 10mA or less.  
Short-circuit to ground, one amplifier per package.  
(1)  
PACKAGE/ORDERING INFORMATION  
SPECIFIED  
TEMPERATURE  
RANGE  
PACKAGE  
DESIGNATOR  
PACKAGE  
MARKING  
ORDERING  
NUMBER  
TRANSPORT  
MEDIA, QUANTITY  
PRODUCT  
PACKAGE−LEAD  
OPA357  
SO-8 PowerPAD  
DDA  
−40°C to +125°C  
OPA357A  
OPA357AIDDA  
Rails, 97  
OPA357AIDDAR  
Tape and Reel, 2500  
OPA357  
SOT23-6  
DBV  
−40°C to +125°C  
OADI  
OPA357AIDBVT  
OPA357AIDBVR  
Tape and Reel, 250  
Tape and Reel, 3000  
OPA2357  
MSOP-10  
DGS  
−40°C to +125°C  
BBG  
OPA2357AIDGST  
Tape and Reel, 250  
OPA2357AIDGSR Tape and Reel, 2500  
(1)  
For the most current package and ordering information, see the Package Option Addendum located at the end of this document, or see the  
TI website at www.ti.com.  
PIN CONFIGURATION  
Top View  
OPA357  
OPA357  
OPA2357  
NC(2)  
1
2
3
4
8
7
6
5
Enable  
V+  
Out A  
1
2
3
4
5
10 V+  
Out  
1
2
3
6
5
4
V+  
In A  
9
8
7
6
Out B  
In  
V
Enable  
A
Out  
+In A  
In B  
+In  
+In  
In  
B
NC(2)  
+In B  
V
V
SOT23(1)  
Enable A  
Enable B  
SO PowerPAD(3)  
MSOP−10  
NOTES: (1) Pin 1 of the SOT23-6 is determined by orienting the package marking as indicated in the diagram.  
(2) NC means no internal connection.  
(3) PowerPAD should be connected to V− or left floating.  
2
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www.ti.com  
SBOS235E − MARCH 2002− REVISED MAY 2009  
ELECTRICAL CHARACTERISTICS: V = +2.7V to +5.5V Single-Supply  
S
Boldface limits apply over the specified temperature range, T = −40°C to +125°C.  
A
At T = +25°C, R = 0, R = 1kΩ, and connected to V /2, unless otherwise noted.  
A
F
L
S
OPA357AI  
OPA2357AI  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
OFFSET VOLTAGE  
Input Offset Voltage  
V
V
= +5V  
2
8
mV  
mV  
OS  
S
Specified Temperature Range  
Specified Temperature Range  
+10  
vs Temperature  
dV /dT  
OS  
+4  
µV/°C  
µV/V  
µV/V  
vs Power Supply  
PSRR  
V
= +2.7V to +5.5V, V  
CM  
Specified Temperature Range  
= (V /2) − 0.55V  
200  
800  
S
S
900  
INPUT BIAS CURRENT  
Input Bias Current  
I
3
1
50  
50  
pA  
pA  
B
Input Offset Current  
I
OS  
NOISE  
Input Voltage Noise Density  
Current Noise Density  
e
i
f = 1MHz  
f = 1MHz  
6.5  
50  
nV/Hz  
fA/Hz  
n
n
INPUT VOLTAGE RANGE  
Common-Mode Voltage Range  
Common-Mode Rejection Ratio  
V
(V−) − (0.1)  
(V+) + (0.1V)  
V
CM  
CMRR  
V
= +5.5V, 0.1V < V  
CM  
< +3.5V  
66  
64  
56  
55  
80  
68  
dB  
dB  
dB  
dB  
S
Specified Temperature Range  
= +5.5V, 0.1V < V < +5.6V  
V
S
CM  
Specified Temperature Range  
INPUT IMPEDANCE  
Differential  
13  
10 || 2  
|| pF  
|| pF  
13  
Common-Mode  
10 || 2  
OPEN-LOOP GAIN  
A
V
= +5V, +0.3V < V < +4.7V  
94  
110  
dB  
OL  
S
O
Specified Temperature Range  
V
= +5V, +0.4V < V < +4.6V  
90  
dB  
S
O
FREQUENCY RESPONSE  
Small-Signal Bandwidth  
f
f
G = +1, V = 100mV , R = 25Ω  
250  
90  
MHz  
MHz  
MHz  
MHz  
V/µs  
V/µs  
V/µs  
ns  
−3dB  
O
PP  
F
G = +2, V = 100mV  
O
−3dB  
PP  
Gain-Bandwidth Product  
Bandwidth for 0.1dB Gain Flatness  
Slew Rate  
GBW  
G = +10  
100  
40  
f
G = +2, V = 100mV  
O PP  
0.1dB  
SR  
V
V
V
= +5V, G = +1, 4V Step  
= +5V, G = +1, 2V Step  
= +3V, G = +1, 2V Step  
150  
130  
110  
2
S
S
S
Rise-and-Fall Time  
G = +1, V = 200mV , 10% to 90%  
O
PP  
G = 1, V = 2V , 10% to 90%  
11  
ns  
O
PP  
Settling Time, 0.1%  
0.01%  
V
= +5V, G = +1, 2V Output Step  
30  
ns  
S
60  
ns  
Overload Recovery Time  
Harmonic Distortion  
2nd-Harmonic  
V
S Gain = V  
5
ns  
IN  
S
G = +1, f = 1MHz, V = 2V , R = 200, V  
PP  
= 1.5V  
= 1.5V  
−75  
−83  
dBc  
dBc  
O
L
CM  
CM  
3rd-Harmonic  
G = +1, f = 1MHz, V = 2V , R = 200, V  
O
PP  
L
Differential Gain Error  
Differential Phase Error  
Channel-to-Channel Crosstalk, OPA2357  
NTSC, R = 150Ω  
0.02  
0.09  
−100  
%
L
NTSC, R = 150Ω  
degrees  
dB  
L
f = 5MHz  
OUTPUT  
Voltage Output Swing from Rail  
V
= +5V, R = 1k, A  
> 94dB  
0.1  
0.3  
V
V
S
L
OL  
Specified Temperature Range  
V
= +5V, R = 1k, A  
> 90dB  
0.4  
S
L
OL  
(1)(2)  
Output Current  
, Single, Dual  
I
V
= +5V  
= +3V  
100  
mA  
mA  
O
S
S
V
50  
0.05  
35  
Closed-Loop Output Impedance  
Open-Loop Output Resistance  
f < 100kHz  
R
O
(1)  
(2)  
See typical characteristics Output Voltage Swing vs Output Current.  
Specified by design.  
3
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ꢂꢀꢉꢣ ꢠꢡ ꢢ  
www.ti.com  
SBOS235E − MARCH 2002− REVISED MAY 2009  
ELECTRICAL CHARACTERISTICS: V = +2.7V to +5.5V Single-Supply (continued)  
S
Boldface limits apply over the specified temperature range, T = −40°C to +125°C.  
A
At T = +25°C, R = 0, R = 1kΩ, and connected to V /2, unless otherwise noted.  
A
F
L
S
OPA357AI  
OPA2357AI  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
POWER SUPPLY  
Specified Voltage Range  
V
2.7  
5.5  
V
V
S
Operating Voltage Range  
Quiescent Current (per amplifier)  
2.5 to 5.5  
4.9  
I
V
= +5V, Enabled, I = 0  
6
mA  
mA  
Q
S
O
Specified Temperature Range  
7.5  
ENABLE/SHUTDOWN FUNCTION  
Disabled (logic−LOW Threshold)  
Enabled (logic−HIGH Threshold)  
Logic Input Current  
0.8  
V
V
2
Logic LOW  
200  
100  
30  
nA  
ns  
ns  
dB  
µA  
Turn-On Time  
Turn-Off Time  
Off Isolation  
G = +1, 5MHz, R = 10Ω  
74  
L
Quiescent Current (per amplifier)  
3.4  
6
THERMAL SHUTDOWN  
Junction Temperature  
Shutdown  
T
J
+160  
+140  
°C  
°C  
Reset from Shutdown  
TEMPERATURE RANGE  
Specified Range  
Operating Range  
Storage Range  
Thermal Resistance  
SOT23-6  
−40  
−55  
−65  
+125  
+150  
+150  
°C  
°C  
°C  
°C/W  
°C/W  
°C/W  
°C/W  
q
JA  
150  
65  
SO-8 PowerPAD  
MSOP-10  
150  
(1)  
(2)  
See typical characteristics Output Voltage Swing vs Output Current.  
Specified by design.  
4
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www.ti.com  
SBOS235E − MARCH 2002− REVISED MAY 2009  
TYPICAL CHARACTERISTICS  
At T = +25°C, V = 5V, G = +1, R = 0, R = 1k, and connected to V /2, unless otherwise noted.  
A
S
F
L
S
INVERTING SMALLSIGNAL  
FREQUENCY RESPONSE  
NONINVERTING SMALL−SIGNAL  
FREQUENCY RESPONSE  
3
0
3
6
9
3
0
3
6
9
G = +1  
RF = 25Ω  
VO = 0.1VPP, RF = 604  
VO = 0.1VPP  
G = +2, RF = 604  
G =  
G =  
1
G = +5, RF = 604Ω  
2
G = +10, RF = 604  
G =  
5
G = 10  
12  
12  
15  
100k  
15  
100k  
1M  
10M  
100M  
1G  
1M  
10M  
Frequency (Hz)  
100M  
1G  
Frequency (Hz)  
NONINVERTING SMALL−SIGNAL STEP RESPONSE  
NONINVERTING LARGE−SIGNAL STEP RESPONSE  
Time (20ns/div)  
Time (20ns/div)  
0.1dB GAIN FLATNESS  
VO = 0.1VPP  
0.5  
0.4  
0.3  
0.2  
0.1  
0
LARGE−SIGNAL DISABLE/ENABLE RESPONSE  
G = +1  
Enabled  
RF = 25  
4.5  
3.5  
2.5  
1.5  
0.5  
0.1  
0.2  
0.3  
0.4  
0.5  
G = +2  
Disabled  
RF = 604  
VOUT  
fIN = 5MHz  
100k  
1M  
10M  
100M  
1G  
Time (200ns/div)  
Frequency (Hz)  
5
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ꢂꢀꢉꢣ ꢠꢡ ꢢ  
www.ti.com  
SBOS235E − MARCH 2002− REVISED MAY 2009  
TYPICAL CHARACTERISTICS (continued)  
At T = +25°C, V = 5V, G = +1, R = 0, R = 1k, and connected to V /2, unless otherwise noted.  
A
S
F
L
S
HARMONIC DISTORTION vs OUTPUT VOLTAGE  
HARMONIC DISTORTION vs NONINVERTING GAIN  
50  
60  
70  
80  
90  
50  
60  
70  
80  
90  
G =  
1
VO = 2VPP  
f = 1MHz  
f = 1MHz  
RL = 200  
RL = 200  
2nd−Harmonic  
2nd−Harmonic  
3rd−Harmonic  
3rd−Harmonic  
3
100  
100  
0
1
2
4
1
10  
Output Voltage (VPP  
)
Gain (V/V)  
HARMONIC DISTORTION vs INVERTING GAIN  
HARMONIC DISTORTION vs FREQUENCY  
50  
60  
70  
80  
90  
50  
60  
70  
80  
90  
G = +1  
VO = 2VPP  
VO = 2VPP  
f = 1MHz  
RL = 200  
RL = 200  
V
CM = 1.5V  
2nd−Harmonic  
2nd−Harmonic  
3rd−Harmonic  
3rd−Harmonic  
100  
100  
100k  
1M  
Frequency (Hz)  
10M  
1
10  
Gain (V/V)  
INPUT VOLTAGE AND CURRENT NOISE  
SPECTRAL DENSITY vs FREQUENCY  
HARMONIC DISTORTION vs LOAD RESISTANCE  
G = +1  
50  
60  
70  
80  
90  
10k  
VO = 2VPP  
f = 1MHz  
VCM = 1.5V  
1k  
100  
10  
Current Noise  
Voltage Noise  
2nd−Harmonic  
3rd−Harmonic  
100  
1
100  
1k  
10  
100  
1k  
10k  
100k  
1M  
10M  
100M  
RL ()  
Frequency (Hz)  
6
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SBOS235E − MARCH 2002− REVISED MAY 2009  
TYPICAL CHARACTERISTICS (continued)  
At T = +25°C, V = 5V, G = +1, R = 0, R = 1k, and connected to V /2, unless otherwise noted.  
A
S
F
L
S
FREQUENCY RESPONSE FOR VARIOUS RL  
RL = 10k  
FREQUENCY RESPONSE FOR VARIOUS CL  
G = +1  
3
0
3
6
9
9
6
3
0
3
6
9
VO = 0.1VPP  
RS = 0Ω  
CL = 100pF  
G = +1  
RF = 0  
VO = 0.1VPP  
CL = 0pF  
RL = 1k  
CL = 47pF  
RL = 100  
RL = 50  
CL = 5.6pF  
12  
12  
15  
15  
100k  
1M  
10M  
Frequency (Hz)  
100M  
1G  
100k  
1M  
10M  
Frequency (Hz)  
100M  
1G  
RECOMMENDED RS vs CAPACITIVE LOAD  
FREQUENCY RESPONSE vs CAPACITIVE LOAD  
G = +1  
160  
140  
120  
100  
80  
3
0
CL = 5.6pF, RS = 0  
For 0.1dB  
Flatness  
VO = 0.1VPP  
CL = 47pF, RS = 140  
3
6
9
CL = 100pF, RS = 120  
60  
VIN  
VIN  
RS  
RS  
VO  
VO  
1kΩ  
OPA357  
OPA357  
40  
CL  
1k  
CL  
12  
20  
0
15  
100k  
1G  
1
1k  
10  
100  
1M  
10M  
Frequency (Hz)  
100M  
Capacitive Load (pF)  
COMMON−MODE REJECTION RATIO AND  
POWER−SUPPLY REJECTION RATIO vs FREQUENCY  
OPEN−LOOP GAIN AND PHASE  
180  
160  
140  
120  
100  
80  
100  
80  
60  
40  
20  
0
CMRR  
Phase  
Gain  
PSRR+  
PSRR  
60  
40  
20  
0
20  
40  
10k  
100k  
1M  
10M  
100M  
1G  
10  
100  
1k  
10k 100k  
1M  
10M 100M 1G  
Frequency (Hz)  
Frequency (Hz)  
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TYPICAL CHARACTERISTICS (continued)  
At T = +25°C, V = 5V, G = +1, R = 0, R = 1k, and connected to V /2, unless otherwise noted.  
A
S
F
L
S
COMPOSITE VIDEO  
DIFFERENTIAL GAIN AND PHASE  
INPUT BIAS CURRENT vs TEMPERATURE  
10k  
1k  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
dP  
100  
10  
dG  
1
15  
1
2
3
4
55  
35  
5
25  
45  
65  
85 105 125 135  
_
Temperature ( C)  
Number of 150 Loads  
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT  
FOR VS = 3V  
SUPPLY CURRENT vs TEMPERATURE  
VS = 5V  
3
7
6
5
4
3
2
1
0
2
1
0
VS = 2.5V  
_
_
_
+125 C  
+25 C  
55 C  
0
20  
40  
60  
80  
100  
120  
15  
55  
35  
5
25  
45  
65  
85 105 125 135  
_
Output Current (mA)  
Temperature ( C)  
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT  
FOR VS = 5V  
SHUTDOWN CURRENT vs TEMPERATURE  
VS = 5.5V  
5
4
3
2
1
0
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
VS = 5V  
_
+25 C  
_
_
55 C  
+125 C  
VS = 2.5V  
VS = 3V  
0
25  
50  
75  
100  
125  
150  
175  
200  
15  
55  
35  
5
25  
45  
65  
85 105 125 135  
_
Output Current (mA)  
Temperature ( C)  
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TYPICAL CHARACTERISTICS (continued)  
At T = +25°C, V = 5V, G = +1, R = 0, R = 1k, and connected to V /2, unless otherwise noted.  
A
S
F
L
S
CLOSED−LOOP OUTPUT IMPEDANCE vs FREQUENCY  
DISABLE FEEDTHROUGH vs FREQUENCY  
VDISABLE = 0  
100  
10  
0
20  
40  
60  
80  
RL = 10  
1
Forward  
Reverse  
0.1  
0.01  
OPA357  
100  
ZO  
120  
100k  
1M  
10M  
100M  
1G  
100k  
1M  
10M  
Frequency (Hz)  
100M  
1G  
Frequency (Hz)  
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY  
VS = 5.5V  
OUTPUT SETTLING TIME TO 0.1%  
VO = 2VPP  
6
5
4
3
2
1
0
0.5  
0.4  
0.3  
0.2  
0.1  
0
Maximum Output  
Voltage without  
Slew−Rate  
Induced Distortion  
VS = 2.7V  
0.1  
0.2  
0.3  
0.4  
0.5  
0
10  
20  
30  
40  
50  
60  
70  
80  
90 100  
1
10  
Frequency (MHz)  
100  
Time (ns)  
OPEN−LOOP GAIN vs TEMPERATURE  
OFFSET VOLTAGE PRODUCTION DISTRIBUTION  
120  
110  
100  
90  
RL = 1k  
80  
70  
15  
55  
35  
5
25  
45  
65  
85 105 125 135  
2 1  
8
7
6
5
4
3
0
1
2
3
4
5
6
7 8  
_
Temperature ( C)  
Offset Voltage (mV)  
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TYPICAL CHARACTERISTICS (continued)  
At T = +25°C, V = 5V, G = +1, R = 0, R = 1k, and connected to V /2, unless otherwise noted.  
A
S
F
L
S
COMMON−MODE REJECTION RATIO AND  
POWER−SUPPLY REJECTION RATIO vs TEMPERATURE  
CHANNEL−TO−CHANNEL CROSSTALK  
0
20  
40  
60  
80  
100  
90  
80  
70  
60  
50  
Common−Mode Rejection Ratio  
Power−Supply Rejection Ratio  
OPA2357  
100  
120  
100k  
1M  
10M  
Frequency (Hz)  
100M  
1G  
15  
55  
35  
5
25  
45  
65  
85 105 125 135  
_
Temperature ( C)  
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The Enable input can be modeled as a CMOS input gate  
with a 100kpull-up resistor to V+. This pin should be  
connected to a valid high or low voltage or driven, not left  
open circuit.  
APPLICATIONS INFORMATION  
The OPA357 is a CMOS, rail-to-rail I/O, high-speed,  
voltage-feedback operational amplifier designed for video,  
high-speed, and other applications. It is available as a  
single or dual op amp.  
The enable time is 100ns and the disable time is only 30ns.  
This allows the OPA357 to be operated as a gated  
amplifier, or to have its output multiplexed onto a common  
output bus. When disabled, the output assumes a  
high-impedance state.  
The amplifier features a 100MHz gain bandwidth, and  
150V/µs slew rate, but it is unity-gain stable and can be  
operated as a +1V/V voltage follower.  
OPERATING VOLTAGE  
RAIL-TO-RAIL INPUT  
The specified input common-mode voltage range of the  
OPA357 extends 100mV beyond the supply rails. This is  
The OPA357 is specified over a power-supply range of  
+2.7V to +5.5V ( 1.35V to 2.75V). However, the supply  
voltage may range from +2.5V to +5.5V ( 1.25V to  
2.75V). Supply voltages higher than 7.5V (absolute  
maximum) can permanently damage the amplifier.  
achieved with  
a
complementary input stagean  
N-channel input differential pair in parallel with a  
P-channel differential pair, as shown in Figure 1. The  
N-channel pair is active for input voltages close to the  
positive rail, typically (V+) − 1.2V to 100mV above the  
positive supply, while the P-channel pair is on for inputs  
from 100mV below the negative supply to approximately  
(V+) − 1.2V. There is a small transition region, typically  
(V+) − 1.5V to (V+) − 0.9V, in which both pairs are on. This  
600mV transition region can vary 500mV with process  
variation. Thus, the transition region (both input stages on)  
can range from (V+) − 2.0V to (V+) − 1.5V on the low end,  
up to (V+) − 0.9V to (V+) − 0.4V on the high end.  
Parameters that vary over supply voltage or temperature  
are shown in the Typical Characteristics section of this  
data sheet.  
ENABLE FUNCTION  
The OPA357’s Enable function is implemented using a  
Schmitt trigger. The amplifier is enabled by applying a TTL  
HIGH voltage level (referenced to V−) to the Enable pin.  
Conversely, a TTL LOW voltage level (referenced to V−)  
will disable the amplifier, reducing its supply current from  
4.9mA to only 3.4µA per amplifier. Independent Enable  
pins are available for each channel (dual version),  
providing maximum design flexibility. For portable  
battery-operated applications, this feature can be used to  
greatly reduce the average current and thereby extend  
battery life.  
A double-folded cascode adds the signal from the two  
input pairs and presents a differential signal to the class AB  
output stage.  
V+  
Reference  
Current  
VIN+  
VIN−  
VBIAS1  
Class AB  
Control  
VO  
Circuitry  
VBIAS2  
V
(Ground)  
Figure 1. Simplified Schematic  
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RAIL-TO-RAIL OUTPUT  
R2  
A class AB output stage with common-source transistors  
is used to achieve rail-to-rail output. For high-impedance  
loads (> 200), the output voltage swing is typically  
100mV from the supply rails. With 10loads, a useful  
output swing can be achieved while maintaining high  
open-loop gain. See the typical characteristic curve Output  
Voltage Swing vs Output Current.  
10k  
C1  
200pF  
+5V  
µ
1 F  
R1  
100k  
R5 = 1  
OUTPUT DRIVE  
OPA2357  
The OPA357’s output stage can supply a continuous  
output current of 100mA and still provide approximately  
2.7V of output swing on a 5V supply, as shown in Figure 2.  
For maximum reliability, it is not recommended to run a  
continuous DC current in excess of 100mA. Refer to the  
typical characteristic curve Output Voltage Swing vs  
Output Current. For supplying continuous output currents  
greater than 100mA, the OPA357 may be operated in  
parallel as shown in Figure 3.  
R3  
100k  
+
RSHUNT  
R6 = 1  
2V In = 200mA  
Out, as Shown  
1
OPA2357  
R4  
10k  
The OPA357 will provide peak currents up to 200mA,  
which corresponds to the typical short-circuit current.  
Therefore, an on-chip thermal shutdown circuit is provided  
to protect the OPA357 from dangerously high junction  
temperatures. At 160°C, the protection circuit will shut  
down the amplifier. Normal operation will resume when the  
junction temperature cools to below 140°C.  
Laser Diode  
Figure 3. Parallel Operation  
VIDEO  
The OPA357 output stage is capable of driving standard  
back-terminated 75video cables, as shown in Figure 4.  
By back-terminating a transmission line, it does not exhibit  
a capacitive load to its driver. A properly back-terminated  
75cable does not appear as capacitance; it presents  
only a 150resistive load to the OPA357 output.  
R2  
1kΩ  
+
V1  
5V  
C1  
50pF  
1µF  
R1  
V+  
10kΩ  
+5V  
OPA357  
Video  
75  
R3  
V−  
In  
Video  
10k  
OPA357  
VIN  
RSHUNT  
75Ω  
+2.5V  
Output  
+
R4  
1kΩ  
To enable,  
connect to V+  
1V In = 100mA  
Out, as Shown  
Laser Diode  
or drive with logic.  
604Ω  
604Ω  
+2.5V  
Figure 2. Laser Diode Driver  
Figure 4. Single-Supply Video Line Driver  
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The OPA357 can be used as an amplifier for RGB graphic  
signals, which have a voltage of zero at the video black  
level, by offsetting and AC-coupling the signal. See  
Figure 5.  
604  
+3V  
+
µ
1 F  
10nF  
V+  
604  
75  
1/2  
OPA2357  
Red  
R1  
R2  
Red(1)  
75  
V+  
R1  
R2  
Green(1)  
75  
1/2  
OPA2357  
Green  
604  
75  
604  
NOTE: (1) Source video signal offset  
300mV above ground to accomodate  
op amp swing−to−ground capability.  
604  
+3V  
+
µ
1 F  
10nF  
V+  
604  
75  
Blue  
R1  
R2  
OPA357  
Blue(1)  
75  
Figure 5. RGB Cable Driver  
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inputs to source onto a single line. This simple Wired-OR  
Video Multiplexer can be easily implemented using the  
OPA357; see Figure 6.  
WIDEBAND VIDEO MULTIPLEXING  
One common application for video speed amplifiers which  
include an enable pin is to wire multiple amplifier outputs  
together, then select which one of several possible video  
+2.5V  
+
+
µ
1 F  
10nF  
10nF  
A
49.9  
Signal #1  
OPA357  
µ
1 F  
2.5V  
1k  
49.9  
VOUT  
1k  
49.9  
+2.5V  
+
+
µ
1 F  
10nF  
10nF  
B
49.9  
Signal #2  
OPA357  
µ
1 F  
2.5V  
1k  
1k  
HCO4  
BON  
Select  
AON  
Figure 6. Multiplexed Output  
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resistance, to create a pole in the small-signal response  
that degrades the phase margin. Refer to the typical  
characteristic curve Frequency Response for Various CL  
for details.  
DRIVING ANALOG−TO−DIGITAL  
CONVERTERS  
The OPA357 series op amps offer 60ns of settling time to  
0.01%, making them a good choice for driving high- and  
medium-speed sampling A/D converters and reference  
circuits. The OPA357 series provide an effective means of  
buffering the A/D converter’s input capacitance and  
resulting charge injection while providing signal gain.  
The OPA357’s topology enhances its ability to drive  
capacitive loads. In unity gain, these op amps perform well  
with large capacitive loads. Refer to the typical  
characteristic curves Recommended RS vs Capacitive  
Load and Frequency Response vs Capacitive Load for  
details.  
See Figure 7 for the OPA357 driving an A/D converter.  
With the OPA357 in an inverting configuration, a capacitor  
across the feedback resistor can be used to filter  
high-frequency noise in the signal; see Figure 7.  
One method of improving capacitive load drive in the  
unity-gain configuration is to insert a 10to 20resistor  
in series with the output, as shown in Figure 8. This  
significantly reduces ringing with large capacitive  
loadssee the typical characteristic curve Frequency  
Response vs Capacitive Load. However, if there is a  
resistive load in parallel with the capacitive load, RS  
creates a voltage divider. This introduces a DC error at the  
output and slightly reduces output swing. This error may  
be insignificant. For instance, with RL = 10kand RS =  
20, there is only about a 0.2% error at the output.  
CAPACITIVE LOAD AND STABILITY  
The OPA357 series op amps can drive a wide range of  
capacitive loads. However, all op amps under certain  
conditions may become unstable. Op amp configuration,  
gain, and load value are just a few of the factors to consider  
when determining stability. An op amp in unity-gain  
configuration is most susceptible to the effects of  
capacitive loading. The capacitive load reacts with the op  
amp’s output resistance, along with any additional load  
+5V  
330pF  
5k  
5k  
VIN  
VREF  
V+  
ADS7818, ADS7861,  
5kΩ  
+In  
or ADS7864  
OPA357  
12Bit A/D Converter  
+2.5V  
µ
In  
0.1 F  
GND  
VIN = 0V to 5V for 0V to 5V output.  
NOTE: A/D Converter Input = 0V to VREF  
Figure 7. The OPA357 in Inverting Configuration Driving an A/D Converter  
V+  
RS  
VOUT  
OPA357  
VIN  
RL  
CL  
To enable,  
connect to V+  
or drive with logic.  
Figure 8. Series Resistor in Unity-Gain Configuration Improves Capacitive Load Drive  
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WIDEBAND TRANSIMPEDANCE AMPLIFIER  
PCB LAYOUT  
Wide bandwidth, low input bias current, and low input  
voltage and current noise make the OPA357 an ideal  
wideband photodiode transimpedance amplifier for  
low-voltage single-supply applications. Low-voltage noise  
is important because photodiode capacitance causes the  
effective noise gain of the circuit to increase at high  
frequency.  
Good high-frequency printed circuit board (PCB) layout  
techniques should be employed for the OPA357.  
Generous use of ground planes, short and direct signal  
traces, and a suitable bypass capacitor located at the V+  
pin will assure clean, stable operation. Large areas of  
copper also provides a means of dissipating heat that is  
generated in normal operation.  
The key elements to a transimpedance design, as shown  
in Figure 9, are the expected diode capacitance (including  
the parasitic input common-mode and differential-mode  
input capacitance (2 + 2)pF for the OPA357), the desired  
transimpedance gain (RF), and the Gain Bandwidth  
Product (GBP) for the OPA357 (100MHz). With these 3  
variables set, the feedback capacitor value (CF) may be set  
to control the frequency response.  
Sockets are definitely not recommended for use with any  
high-speed amplifier.  
A 10nF ceramic bypass capacitor is the minimum  
recommended value; adding a 1µF or larger tantalum  
capacitor in parallel can be beneficial when driving a  
low-resistance load. Providing adequate bypass  
capacitance is essential to achieving very low harmonic  
and intermodulation distortion.  
CF  
<1pF  
POWER DISSIPATION  
(prevents gain peaking)  
Besides the regular SOT23-6 and MSOP-10, the single  
and dual versions of the OPA357 also come in an SO-8  
PowerPAD. The SO-8 PowerPAD is a standard-size SO-8  
package where the exposed leadframe on the bottom of  
the package is soldered directly to the PCB to create an  
extremely low thermal resistance. This will enhance the  
OPA357’s power dissipation capability significantly and  
eliminates the use of bulky heatsinks and slugs  
traditionally used in thermal packages. This package can  
be easily mounted using standard PCB assembly  
techniques. NOTE: Since the SO-8 PowerPAD is  
pin-compatible with standard SO-8 packages, the  
OPA357 can directly replace operational amplifiers in  
existing sockets. Soldering the PowerPAD to the PCB is  
always recommended, even with applications that have  
low power dissipation. This provides the necessary  
thermal and mechanical connection between the  
leadframe die pad and the PCB.  
RF  
10M  
+V  
λ
CD  
VOUT  
OPA357  
To enable,  
connect to V+  
or drive with logic.  
Figure 9. Transimpedance Amplifier  
To achieve a maximally flat 2nd-order Butterworth  
frequency response, the feedback pole should be set to:  
For resistive loads, the maximum power dissipation occurs  
at a DC output voltage of one-half the power-supply  
voltage. Dissipation with AC signals is lower. Application  
Bulletin AB-039 (SBOA022), Power Amplifier Stress and  
Power Handling Limitations, explains how to calculate or  
measure power dissipation with unusual signals and  
loads, and can be found at www.ti.com.  
GBP  
4pRFCD  
1
+
Ǹ
2pRFCF  
(1)  
Typical surface-mount resistors have  
capacitance of around 0.2pF that must be deducted from  
the calculated feedback capacitance value.  
a
parasitic  
Any tendency to activate the thermal protection circuit  
indicates excessive power dissipation or an inadequate  
heat sink. For reliable operation, junction temperature  
should be limited to 150°C, maximum. To estimate the  
margin of safety in a complete design, increase the  
ambient temperature until the thermal protection is  
triggered at 160°C. The thermal protection should trigger  
more than 35°C above the maximum expected ambient  
condition of your application.  
Bandwidth is calculated by:  
GBP  
2pRFCD  
f*3dB  
+
Hz  
Ǹ
(2)  
For even higher transimpedance bandwidth, the  
high-speed CMOS OPA355 (200MHz GBW) or the  
OPA655 (400MHz GBW) may be used.  
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PowerPAD THERMALLY ENHANCED  
PACKAGE  
PowerPAD ASSEMBLY PROCESS  
1. The PowerPAD must be connected to the device’s most  
negative supply voltage, which will be ground in  
single-supply applications, and V− in split−supply  
applications.  
The OPA357 uses the SO-8 PowerPAD package, a  
thermally enhanced, standard size IC package designed  
to eliminate the use of bulky heatsinks and slugs  
traditionally used in thermal packages. This package can  
be easily mounted using standard PCB assembly  
techniques.  
2. Prepare the PCB with a top-side etch pattern, as shown  
in Figure 11. The exact land design may vary based on the  
specific assembly process requirements. There should be  
etch for the leads as well as etch for the thermal land.  
The PowerPAD package is designed so that the leadframe  
die pad (or thermal pad) is exposed on the bottom of the  
IC, as shown in Figure 10. This provides an extremely low  
thermal resistance (qJC) path between the die and the  
exterior of the package. The thermal pad on the bottom of  
the IC is then soldered directly to the PCB, using the PCB  
as a heatsink. In addition, plated-through holes (vias)  
provide a low thermal resistance heat flow path to the back  
side of the PCB.  
Thermal Land  
(Copper)  
Minimum Size  
OPTIONAL:  
Additional 4 vias outside  
4.8mm x 3.8mm  
of thermal pad area but  
(189 mils x 150 mils)  
under the package.  
REQUIRED:  
Thermal pad area 2.286mm x 2.286mm  
(90 mils x 90 mils) with 5 vias  
(via diameter = 13 mils)  
Leadframe (Copper Alloy)  
Figure 11. 8-Pin PowerPAD PCB Etch and Via  
Pattern  
IC (Silicon)  
Die Attach (Epoxy)  
3. Place the recommended number of plated-through  
holes (or thermal vias) in the area of the thermal pad.  
These holes should be 13 mils in diameter. They are kept  
small so that solder wicking through the holes is not a  
problem during reflow. The minimum recommended  
number of holes for the SO-8 PowerPAD package is 5, as  
shown in Figure 11.  
Leadframe Die Pad  
Exposed at Base of the Package  
(Copper Alloy)  
Mold Compound (Plastic)  
4. It is recommended, but not required, to place a small  
number of additional holes under the package and outside  
the thermal pad area. These holes provide additional heat  
paths between the copper thermal land and the ground  
plane. They may be larger because they are not in the area  
to be soldered, so wicking is not a problem. This is  
illustrated in Figure 11.  
Figure 10. Section View of a PowerPAD Package  
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5. Connect all holes, including those within the thermal pad  
area and outside the pad area, to the internal ground plane  
or other internal copper plane for single-supply  
applications, and to V− for split-supply applications.  
7. The top-side solder mask should leave the pad  
connections and the thermal pad area exposed. The  
thermal pad area should leave the 13 mil holes exposed.  
The larger holes outside the thermal pad area may be  
covered with solder mask.  
6. When laying out these holes, do not use the typical web  
or spoke via connection methodology, as shown in  
Figure 12. Web connections have a high thermal  
resistance connection that is useful for slowing the heat  
transfer during soldering operations. This makes soldering  
the vias that have ground plane connections easier.  
However, in this application, low thermal resistance is  
desired for the most efficient heat transfer. Therefore, the  
holes under the PowerPAD package should make their  
connection to the internal ground plane with a complete  
connection around the entire circumference of the  
plated-through hole.  
8. Apply solder paste to the exposed thermal pad area and  
all of the package terminals.  
9. With these preparatory steps in place, the PowerPAD IC  
is simply placed in position and run through the solder  
reflow operation as any standard surface-mount  
component. This results in a part that is properly installed.  
For detailed information on the PowerPAD package  
including thermal modeling considerations and repair  
procedures, please see Technical Brief SLMA002,  
PowerPAD Thermally Enhanced Package, located at  
www.ti.com.  
Web or Spoke Via  
Solid Via  
NOT RECOMMENDED  
(due to poor heat conduction)  
RECOMMENDED  
Figure 12. Via Connection  
18  
PACKAGE OPTION ADDENDUM  
www.ti.com  
11-Apr-2013  
PACKAGING INFORMATION  
Orderable Device  
OPA2357AIDGSR  
OPA2357AIDGSRG4  
OPA2357AIDGST  
OPA2357AIDGSTG4  
OPA357AIDBVR  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
Top-Side Markings  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4)  
ACTIVE  
VSSOP  
VSSOP  
VSSOP  
VSSOP  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DGS  
10  
10  
10  
10  
6
2500  
Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR  
& no Sb/Br)  
BBG  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
DGS  
DGS  
DGS  
DBV  
DBV  
DBV  
DBV  
DDA  
DDA  
DDA  
DDA  
2500  
250  
250  
3000  
3000  
250  
250  
75  
Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR  
& no Sb/Br)  
BBG  
BBG  
BBG  
OADI  
OADI  
OADI  
OADI  
Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR  
& no Sb/Br)  
Green (RoHS CU NIPDAUAG Level-2-260C-1 YEAR  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU SN  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
OPA357AIDBVRG4  
OPA357AIDBVT  
6
Green (RoHS  
& no Sb/Br)  
6
Green (RoHS  
& no Sb/Br)  
OPA357AIDBVTG4  
OPA357AIDDA  
6
Green (RoHS  
& no Sb/Br)  
ACTIVE SO PowerPAD  
ACTIVE SO PowerPAD  
ACTIVE SO PowerPAD  
ACTIVE SO PowerPAD  
8
Green (RoHS  
& no Sb/Br)  
OPA  
357A  
OPA357AIDDAG3  
OPA357AIDDAR  
OPA357AIDDARG3  
8
75  
Green (RoHS  
& no Sb/Br)  
CU SN  
OPA  
357A  
8
2500  
2500  
Green (RoHS  
& no Sb/Br)  
CU SN  
OPA  
357A  
8
Green (RoHS  
& no Sb/Br)  
CU SN  
OPA  
357A  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
11-Apr-2013  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4)  
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a  
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
26-Aug-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
OPA2357AIDGSR  
OPA2357AIDGST  
OPA357AIDBVR  
OPA357AIDBVT  
OPA357AIDDAR  
VSSOP  
VSSOP  
SOT-23  
SOT-23  
DGS  
DGS  
DBV  
DBV  
DDA  
10  
10  
6
2500  
250  
330.0  
180.0  
179.0  
179.0  
330.0  
12.4  
12.4  
8.4  
5.3  
5.3  
3.2  
3.2  
6.4  
3.4  
3.4  
3.2  
3.2  
5.2  
1.4  
1.4  
1.4  
1.4  
2.1  
8.0  
8.0  
4.0  
4.0  
8.0  
12.0  
12.0  
8.0  
Q1  
Q1  
Q3  
Q3  
Q1  
3000  
250  
6
8.4  
8.0  
SO  
Power  
PAD  
8
2500  
12.4  
12.0  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
26-Aug-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
OPA2357AIDGSR  
OPA2357AIDGST  
OPA357AIDBVR  
OPA357AIDBVT  
OPA357AIDDAR  
VSSOP  
VSSOP  
DGS  
DGS  
DBV  
DBV  
DDA  
10  
10  
6
2500  
250  
367.0  
210.0  
195.0  
195.0  
367.0  
367.0  
185.0  
200.0  
200.0  
367.0  
35.0  
35.0  
45.0  
45.0  
35.0  
SOT-23  
3000  
250  
SOT-23  
6
SO PowerPAD  
8
2500  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest  
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and  
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale  
supplied at the time of order acknowledgment.  
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary  
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily  
performed.  
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and  
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide  
adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or  
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information  
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Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration  
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Applications  
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amplifier.ti.com  
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