OPA314_15 [TI]
Operational Amplifier;
| 型号： | OPA314_15 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Operational Amplifier |
| 文件： | 总35页 (文件大小：1554K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
OPA314
OPA2314
OPA4314
www.ti.com
SBOS563D –MAY 2011–REVISED MARCH 2012
3-MHz, Low-Power, Low-Noise, RRIO, 1.8-V CMOS
OPERATIONAL AMPLIFIER
Check for Samples: OPA314, OPA2314, OPA4314
1
FEATURES
DESCRIPTION
The OPA314 family of single-, dual-, and quad-
2
•
•
•
•
•
•
•
•
•
Low IQ: 150 µA/ch
channel operational amplifiers represents a new
generation of low-power, general-purpose CMOS
amplifiers. Rail-to-rail input and output swings, low
quiescent current (150 μA typ at 5.0 VS) combined
with a wide bandwidth of 3 MHz, and very low noise
(14 nV/√Hz at 1 kHz) make this family very attractive
for a variety of battery-powered applications that
Wide Supply Range: 1.8 V to 5.5 V
Low Noise: 14 nV/√Hz at 1 kHz
Gain Bandwidth: 3 MHz
Low Input Bias Current: 0.2 pA
Low Offset Voltage: 0.5 mV
Unity-Gain Stable
require
a
good balance between cost and
performance. The low input bias current supports
applications with mega-ohm source impedances.
Internal RF/EMI Filter
Extended Temperature Range:
–40°C to +125°C
The robust design of the OPA314 devices provides
ease-of-use to the circuit designer: unity-gain stability
with capacitive loads of up to 300 pF, an integrated
RF/EMI rejection filter, no phase reversal in overdrive
conditions, and high electrostatic discharge (ESD)
protection (4-kV HBM).
APPLICATIONS
•
Battery-Powered Instruments:
–
–
Consumer, Industrial, Medical
Notebooks, Portable Media Players
These devices are optimized for low-voltage
operation as low as +1.8 V (±0.9 V) and up to +5.5 V
(±2.75 V), and are specified over the full extended
temperature range of –40°C to +125°C.
•
•
•
•
•
Photodiode Amplifiers
Active Filters
Remote Sensing
The OPA314 (single) is available in both SC70-5 and
SOT23-5 packages. The OPA2314 (dual) is offered in
SO-8, MSOP-8, and DFN-8 packages. The quad-
channel OPA4314 is offered in a TSSOP-14 package.
Wireless Metering
Handheld Test Equipment
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011–2012, Texas Instruments Incorporated
OPA314
OPA2314
OPA4314
SBOS563D –MAY 2011–REVISED MARCH 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE INFORMATION(1)
PRODUCT
PACKAGE-LEAD
PACKAGE DESIGNATOR
PACKAGE MARKING
SC70-5
DCK
DBV
D
SAA
RAZ
OPA314
SOT23-5
SO-8
O2314
OCPQ
QXY
OPA2314
OPA4314
MSOP-8
DFN-8
DGK
DRB
PW
TSSOP-14
OPA4314
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range, unless otherwise noted.
OPA314, OPA2314, OPA4314
UNIT
V
Supply voltage
7
(V–) – 0.5 to (V+) + 0.5
±10
Voltage(2)
Current(2)
V
Signal input terminals
mA
mA
°C
°C
°C
V
Output short-circuit(3)
Continuous
–40 to +150
–65 to +150
+150
Operating temperature, TA
Storage temperature, Tstg
Junction temperature, TJ
Human body model (HBM)
Charged device model (CDM)
Machine model (MM)
4000
ESD rating
1000
V
200
V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails should
be current limited to 10 mA or less.
(3) Short-circuit to ground, one amplifier per package.
2
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OPA314
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OPA4314
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SBOS563D –MAY 2011–REVISED MARCH 2012
ELECTRICAL CHARACTERISTICS: VS = +1.8 V to +5.5 V(1)
Boldface limits apply over the specified temperature range: TA = –40°C to +125°C.
At TA = +25 °C, RL = 10 kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
OPA314, OPA2314, OPA4314
PARAMETER
OFFSET VOLTAGE
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOS
Input offset voltage
vs Temperature
VCM = (VS+) – 1.3 V
VCM = (VS+) – 1.3 V
At dc
0.5
1
2.5
mV
μV/°C
dB
dVOS/dT
PSRR
vs power supply
78
92
Over temperature
Channel separation, dc
74
dB
10
µV/V
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
(V–) – 0.2
(V+) + 0.2
V
VS = 1.8 V to 5.5 V, (VS–) – 0.2 V < VCM < (VS+) – 1.3 V
VS = 5.5 V, VCM = –0.2 V to 5.7 V(2)
75
66
70
73
60
96
80
86
90
dB
dB
dB
dB
dB
CMRR
Common-mode rejection ratio
VS = 1.8 V, (VS–) – 0.2 V < VCM < (VS+) – 1.3 V
VS = 5.5 V, (VS–) – 0.2 V < VCM < (VS+) – 1.3 V
VS = 5.5 V, VCM = –0.2 V to 5.7 V(2)
Over temperature
INPUT BIAS CURRENT
IB
Input bias current
±0.2
±0.2
±10
±600
±10
pA
pA
pA
pA
Over temperature
Input offset current
Over temperature
IOS
±600
NOISE
Input voltage noise (peak-to-
peak)
f = 0.1 Hz to 10 Hz
5
μVPP
f = 10 kHz
f = 1 kHz
f = 1 kHz
13
14
5
nV/√Hz
nV/√Hz
fA/√Hz
en
in
Input voltage noise density
Input current noise density
INPUT CAPACITANCE
Differential
CIN
VS = 5.0 V
VS = 5.0 V
1
5
pF
pF
Common-mode
OPEN-LOOP GAIN
VS = 1.8 V, 0.2 V < VO < (V+) – 0.2 V, RL = 10 kΩ
VS = 5.5 V, 0.2 V < VO < (V+) – 0.2 V, RL = 10 kΩ
VS = 1.8 V, 0.5 V < VO < (V+) – 0.5 V, RL = 2 kΩ(2)
VS = 5.5 V, 0.5 V < VO < (V+) – 0.5 V, RL = 2 kΩ(2)
VS = 5.5 V, 0.2 V < VO < (V+) – 0.2 V, RL = 10 kΩ
VS = 5.5 V, 0.5 V < VO < (V+) – 0.2 V, RL = 2 kΩ
VS = 5.0 V, G = +1, RL = 10 kΩ
90
100
90
115
128
100
110
110
100
65
dB
dB
AOL
Open-loop voltage gain
dB
94
dB
90
dB
dB
deg
Over temperature
Phase margin
(1) Parameters with minimum or maximum specification limits are 100% production tested at +25ºC, unless otherwise noted. Over
temperature limits are based on characterization and statistical analysis.
(2) Specified by design and characterization; not production tested.
Copyright © 2011–2012, Texas Instruments Incorporated
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OPA314
OPA2314
OPA4314
SBOS563D –MAY 2011–REVISED MARCH 2012
www.ti.com
ELECTRICAL CHARACTERISTICS: VS = +1.8 V to +5.5 V(1) (continued)
Boldface limits apply over the specified temperature range: TA = –40°C to +125°C.
At TA = +25 °C, RL = 10 kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
OPA314, OPA2314, OPA4314
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
FREQUENCY RESPONSE
VS = 1.8 V, RL = 10 kΩ, CL = 10 pF
VS = 5.0 V, RL = 10 kΩ, CL = 10 pF
VS = 5.0 V, G = +1
2.7
3
MHz
MHz
V/μs
μs
GBW
SR
tS
Gain-bandwidth product
Slew rate(3)
1.5
2.3
3.1
5.2
To 0.1%, VS = 5.0 V, 2-V step , G = +1
To 0.01%, VS = 5.0V, 2-V step , G = +1
VS = 5.0 V, VIN × Gain > VS
Settling time
μs
Overload recovery time
μs
Total harmonic distortion +
noise(4)
THD+N
VS = 5.0 V, VO = 1 VRMS, G = +1, f = 1 kHz, RL = 10 kΩ
0.001
%
OUTPUT
VS = 1.8 V, RL = 10 kΩ
VS = 5.5 V, RL = 10 kΩ
VS = 1.8 V, RL = 2 kΩ
VS = 5.5 V, RL = 2 kΩ
VS = 5.5 V, RL = 10 kΩ
VS = 5.5 V, RL = 2 kΩ
VS = 5.0 V
5
5
15
20
30
40
30
mV
mV
mV
mV
mV
mV
mA
Ω
Voltage output swing from supply
rails
VO
15
22
Over temperature
60
±20
570
ISC
RO
Short-circuit current
Open-loop output impedance
VS = 5.5 V, f = 100 Hz
POWER SUPPLY
VS
IQ
Specified voltage range
1.8
5.5
180
190
210
220
V
OPA314, OPA2314, OPA4314, VS = 1.8 V, IO = 0 mA
OPA2314, OPA4314, VS = 5.0 V, IO = 0 mA
OPA314, VS = 5.0 V, IO = 0 mA
130
150
150
µA
µA
µA
µA
µs
Quiescent current per amplifier
Over temperature
VS = 5.0 V, IO = 0 mA
Power-on time
VS = 0 V to 5 V, to 90% IQ level
44
TEMPERATURE
Specified range
–40
–40
–65
+125
+150
+150
°C
°C
°C
Operating range
Storage range
(3) Signifies the slower value of the positive or negative slew rate.
(4) Third-order filter; bandwidth = 80 kHz at –3 dB.
4
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Product Folder Link(s): OPA314 OPA2314 OPA4314
OPA314
OPA2314
OPA4314
www.ti.com
SBOS563D –MAY 2011–REVISED MARCH 2012
THERMAL INFORMATION: OPA314
OPA314
THERMAL METRIC(1)
DBV (SOT23)
5 PINS
228.5
99.1
DCK (SC70)
5 PINS
281.4
91.6
UNITS
θJA
Junction-to-ambient thermal resistance
Junction-to-case(top) thermal resistance
Junction-to-board thermal resistance
θJC(top)
θJB
54.6
59.6
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case(bottom) thermal resistance
7.7
1.5
ψJB
53.8
58.8
θJC(bottom)
N/A
N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
THERMAL INFORMATION: OPA2314
OPA2314
THERMAL METRIC(1)
D (SO)
8 PINS
138.4
89.5
DGK (MSOP)
8 PINS
191.2
61.9
DRB (DFN)
8 PINS
53.8
UNITS
θJA
Junction-to-ambient thermal resistance
Junction-to-case(top) thermal resistance
Junction-to-board thermal resistance
θJC(top)
θJB
69.2
78.6
111.9
5.1
20.1
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case(bottom) thermal resistance
29.9
3.8
ψJB
78.1
110.2
N/A
20.0
θJC(bottom)
N/A
11.6
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
THERMAL INFORMATION: OPA4314
OPA4314
THERMAL METRIC(1)
PW (TSSOP)
14 PINS
121.0
49.4
UNITS
θJA
Junction-to-ambient thermal resistance
Junction-to-case(top) thermal resistance
Junction-to-board thermal resistance
θJC(top)
θJB
62.8
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case(bottom) thermal resistance
5.9
ψJB
62.2
θJC(bottom)
N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Copyright © 2011–2012, Texas Instruments Incorporated
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OPA314
OPA2314
OPA4314
SBOS563D –MAY 2011–REVISED MARCH 2012
www.ti.com
PIN CONFIGURATIONS
DCK PACKAGE
SC70-5
(TOP VIEW)
DBV PACKAGE
SOT23-5
(TOP VIEW)
+IN
V-
1
2
3
5
4
V+
OUT
V-
1
2
3
5
4
V+
-IN
OUT
+IN
-IN
DRB PACKAGE(1)
DFN-8
D, DGK PACKAGES
SO-8, MSOP-8
(TOP VIEW)
(TOP VIEW)
8
7
6
5
V+
OUT A
-IN A
+IN A
V-
1
OUT A
1
8
7
6
5
V+
Exposed
Thermal
Die Pad
on
OUT B
-IN B
+IN B
2
3
4
-IN A
+IN A
V-
2
3
4
OUT B
Underside(2)
-IN B
+IN B
PW PACKAGE
TSSOP-14
(TOP VIEW)
OUT A
1
2
3
4
5
6
7
14 OUT D
13 -IN D
A
D
-IN A
+IN A
V+
12 +IN D
11 V-
+IN B
-IN B
10 +IN C
9
8
-IN C
B
C
OUT B
OUT C
(1) Pitch: 0,65 mm.
(2) Connect thermal pad to V–. Pad size: 1,8 mm × 1,5 mm.
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OPA314
OPA2314
OPA4314
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SBOS563D –MAY 2011–REVISED MARCH 2012
TYPICAL CHARACTERISTICS
Table 1. Characteristic Performance Measurements
TITLE
FIGURE
Figure 1
Open-Loop Gain and Phase vs Frequency
Open-Loop Gain vs Temperature
Figure 2
Quiescent Current vs Supply Voltage
Figure 3
Quiescent Current vs Temperature
Figure 4
Offset Voltage Production Distribution
Figure 5
Offset Voltage Drift Distribution
Figure 6
Offset Voltage vs Common-Mode Voltage (Maximum Supply)
Offset Voltage vs Temperature
Figure 7
Figure 8
CMRR and PSRR vs Frequency (RTI)
Figure 9
CMRR and PSRR vs Temperature
Figure 10
Figure 11
Figure 12
Figure 13
Figure 14
Figure 15
Figure 16
Figure 17
Figure 18
Figure 19
Figure 20
Figure 21
Figure 22
Figure 23
Figure 24
Figure 25
Figure 26
Figure 27
Figure 28
Figure 29
Figure 30
Figure 31
Figure 32
0.1-Hz to 10-Hz Input Voltage Noise (5.5 V)
Input Voltage Noise Spectral Density vs Frequency (1.8 V, 5.5 V)
Input Voltage Noise vs Common-Mode Voltage (5.5 V)
Input Bias and Offset Current vs Temperature
Open-Loop Output Impedance vs Frequency
Maximum Output Voltage vs Frequency and Supply Voltage
Output Voltage Swing vs Output Current (over Temperature)
Closed-Loop Gain vs Frequency, G = 1, –1, 10 (1.8 V)
Closed-Loop Gain vs Frequency, G = 1, –1, 10 (5.5 V)
Small-Signal Overshoot vs Load Capacitance
Small-Signal Step Response, Noninverting (1.8 V)
Small-Signal Step Response, Noninverting ( 5.5 V)
Large-Signal Step Response, Noninverting (1.8 V)
Large-Signal Step Response, Noninverting ( 5.5 V)
Positive Overload Recovery
Negative Overload Recovery
No Phase Reversal
Channel Separation vs Frequency (Dual)
THD+N vs Amplitude (G = +1, 2 kΩ, 10 kΩ)
THD+N vs Amplitude (G = –1, 2 kΩ, 10 kΩ)
THD+N vs Frequency (0.5 VRMS, G = +1, 2 kΩ, 10 kΩ)
EMIRR
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OPA314
OPA2314
OPA4314
SBOS563D –MAY 2011–REVISED MARCH 2012
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TYPICAL CHARACTERISTICS
At TA = +25°C, RL = 10 kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
OPEN-LOOP GAIN AND PHASE
vs FREQUENCY
OPEN-LOOP GAIN
vs TEMPERATURE
140
120
100
80
0
140
130
120
110
100
RL = 10 kW/10 pF
-20
-40
-60
-80
-100
-120
-140
-160
VS
= 2.5 V
10 kW, 5.5 V
2 kW, 5.5 V
60
40
10 kW, 1.8 V
20
0
-20
1
10
100
1k
10k
100k
1M
10M
-50
-25
0
25
50
75
100
125
Frequency (Hz)
Temperature (°C)
Figure 1.
Figure 2.
QUIESCENT CURRENT
vs SUPPLY
QUIESCENT CURRENT
vs TEMPERATURE
180
170
160
150
140
130
120
110
100
90
160
155
150
145
140
135
130
125
120
VS = 5.5 V
VS = 1.8 V
80
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
-50
-25
0
25
50
75
100
125
Supply Voltage (V)
Temperature (°C)
Figure 3.
Figure 4.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
OFFSET VOLTAGE DRIFT DISTRIBUTION
12
10
8
30
25
20
15
10
5
6
4
2
0
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
Offset Voltage Drift (mV/°C)
Offset Voltage (mV)
Figure 5.
Figure 6.
8
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SBOS563D –MAY 2011–REVISED MARCH 2012
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 10 kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
OFFSET VOLTAGE vs COMMON-MODE VOLTAGE
OFFSET VOLTAGE vs TEMPERATURE
1000
1500
1000
500
800
600
400
200
0
0
-200
-400
-600
-800
-1000
-500
-1000
-1500
Typical Units
VS 2.75 V
Typical Units
VS 2ꢀ.5 V
=
=
-2
-1.25
-2.75
-0.5
0
0.5
1.25
2
2.75
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
Common-Mode Voltage (V)
Figure 7.
Figure 8.
CMRR AND PSRR
vs FREQUENCY (Referred-to-Input)
CMRR AND PSRR
vs TEMPERATURE
120
100
80
60
40
20
0
104
102
100
98
96
94
92
90
88
86
84
+PSRR
CMRR
-PSRR
CMRR
PSRR
VS
10
=
2ꢀ.7 V
100
1k
10k
100k
1M
-50
-25
0
25
50
75
100
125
Frequency (Hz)
Temperature (°C)
Figure 9.
Figure 10.
INPUT VOLTAGE NOISE SPECTRAL DENSITY
vs FREQUENCY
0.1-Hz to 10-Hz INPUT VOLTAGE NOISE
100
VS = ±02ꢀ V
VS = ±±2.7 V
10
Time (1 s/div)
10
100
1k
10k
100k
Frequency (Hz)
Figure 11.
Figure 12.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 10 kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
VOLTAGE NOISE
vs COMMON-MODE VOLTAGE
INPUT BIAS AND OFFSET CURRENT
vs TEMPERATURE
20
18
16
14
12
10
1000
900
800
700
600
500
400
300
200
100
0
VS
= 2.ꢀ5 V
f = 1 kHz
IB
IOS
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
-50
-25
0
25
50
75
100
125
150
Common-Mode Input Voltage (V)
Temperature (°C)
Figure 13.
Figure 14.
OPEN-LOOP OUTPUT IMPEDANCE
vs FREQUENCY
MAXIMUM OUTPUT VOLTAGE
vs FREQUENCY AND SUPPLY VOLTAGE
6
5
4
3
2
1
0
100k
10k
1k
VIN = 5.5 V
VIN = 3.3 V
VIN = 1.8 V
VS = ±02ꢀ V
RL = 10 kW
CL = 10 pF
VS = ±±2.7 V
1
1
10
100
1k
10k
100k
1M
10M
10k
100k
Frequency (Hz)
1M
10M
Frequency (Hz)
Figure 15.
Figure 16.
OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT (Over Temperature)
CLOSED-LOOP GAIN vs FREQUENCY
3
2
40
20
VS = 1.8 V
G = -1 V/V
G = +1 V/V
G = +10 V/V
1
+25°C
0
+125°C
-40°C
-1
-2
-3
0
VS
30
=
2ꢀ.5 V
35 40
-20
0
5
10
15
20
25
10k
100k
1M
10M
Output Current (mA)
Frequency (Hz)
Figure 17.
Figure 18.
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SBOS563D –MAY 2011–REVISED MARCH 2012
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 10 kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
CLOSED-LOOP GAIN vs FREQUENCY
SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE
40
70
60
50
40
30
20
10
0
VS = 5.5 V
G = -1 V/V
G = +1 V/V
G = +10 V/V
20
0
VS
= 2ꢀ75 V
Gain = +1 V/V
RL = 10 kW
-20
10k
100k
1M
10M
0
200
400
600
800
1000
1200
Frequency (Hz)
Capacitive Load (pF)
Figure 19.
Figure 20.
SMALL-SIGNAL PULSE RESPONSE (Noninverting)
SMALL-SIGNAL PULSE RESPONSE (Inverting)
Gain = +1
VS
Gain = +1
VS = 2ꢀ.5 V
=
0ꢀ. V
RF = 10 kW
RF = 10 kW
VIN
VIN
Z
L = 10 pF + 10 kW
L = 100 pF + 10 kW
ZL = 10 pF + 10 kW
ZL = 100 pF + 10 kW
Z
Time (1 ms/div)
Time (1 ms/div)
Figure 21.
Figure 22.
LARGE-SIGNAL PULSE RESPONSE (Noninverting)
LARGE-SIGNAL PULSE RESPONSE (Inverting)
1
2
Gain = +1
=
Gain = +1
VS = 2.ꢀ5 V
0.75
0.5
1.5
1
VIN
VS
0.ꢀ V
VIN
RL = 10 kW
RL = 10 kW
0.25
0
0.5
0
VOUT
-0.25
-0.5
-0.75
-1
-0.5
-1
VOUT
-1.5
-2
Time (1 ms/div)
Time (1 ms/div)
Figure 23.
Figure 24.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 10 kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
POSITIVE OVERLOAD RECOVERY
NEGATIVE OVERLOAD RECOVERY
3
2.5
2
1
0.5
0
Output
Input
1.5
1
-0.5
-1
0.5
0
-1.5
-2
Output
Input
-0.5
-1
-2.5
-3
0
2
4
6
8
10
12
14
0
2
4
6
8
10
12
14
Time (2 ms/div)
Time (2 ms/div)
Figure 25.
Figure 26.
CHANNEL SEPARATION vs FREQUENCY
OPA2314
NO PHASE REVERSAL
4
3
-60
-80
VS
= 2.75 V
VIN
VOUT
2
1
0
-100
-120
-140
-1
-2
-3
-4
0
250
500
750
1000
100
1k
10k
100k
1M
10M
Time (125 ms/div)
Frequency (Hz)
Figure 27.
Figure 28.
THD+N vs OUTPUT AMPLITUDE
(G = +1 V/V)
THD+N vs OUTPUT AMPLITUDE
(G = –1 V/V)
0.1
0.01
0.1
VS = ±±.ꢀ V
f = 1 kHz
BW = 80 kHz
G = +1 V/V
0.01
0.001
Load = ± kW
Load = ± kW
0.001
VS = ±±.ꢀ V
Load = 10 kW
f = 1 kHz
BW = 80 kHz
G = -1 V/V
Load = 10 kW
0.0001
0.0001
0.01
0.1
1
10
0.01
0.1
1
10
Output Amplitude (VRMS
)
Output Amplitude (VRMS)
Figure 29.
Figure 30.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 10 kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
ELECTROMAGNETIC INTERFERENCE REJECTION RATIO
REFERRED TO NONINVERTING INPUT (EMIRR IN+) vs
FREQUENCY
THD+N vs FREQUENCY
120
110
100
90
0.1
0.01
VS = ±±.ꢀ V
VOUT = 0.ꢀ VRMS
BW = 80 kHz
G = +1 V/V
80
70
Load = ± kW
60
50
40
0.001
0.0001
30
Load = 10 kW
PRF = −10 dBm
VS = ±2.5 V
VCM = 0 V
20
10
0
10M
100M
Frequency (Hz)
1G
10G
10
100
1k
10k
100k
G001
Frequency (Hz)
Figure 31.
Figure 32.
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APPLICATION INFORMATION
The OPA314 is a family of low-power, rail-to-rail input and output operational amplifiers specifically designed for
portable applications. These devices operate from 1.8 V to 5.5 V, are unity-gain stable, and suitable for a wide
range of general-purpose applications. The class AB output stage is capable of driving ≤ 10-kΩ loads connected
to any point between V+ and ground. The input common-mode voltage range includes both rails, and allows the
OPA314 series to be used in virtually any single-supply application. Rail-to-rail input and output swing
significantly increases dynamic range, especially in low-supply applications, and makes them ideal for driving
sampling analog-to-digital converters (ADCs).
The OPA314 features 3-MHz bandwidth and 1.5-V/μs slew rate with only 150-μA supply current per channel,
providing good ac performance at very low power consumption. DC applications are also well served with a very
low input noise voltage of 14 nV/√Hz at 1 kHz, low input bias current (0.2 pA), and an input offset voltage of
0.5 mV (typical).
OPERATING VOLTAGE
The OPA314 series op amps are fully specified and ensured for operation from +1.8 V to +5.5 V. In addition,
many specifications apply from –40°C to +125°C. Parameters that vary significantly with operating voltages or
temperature are shown in the Typical Characteristics graphs. Power-supply pins should be bypassed with 0.01-
μF ceramic capacitors.
RAIL-TO-RAIL INPUT
The input common-mode voltage range of the OPA314 series extends 200 mV beyond the supply rails. This
performance is achieved with a complementary input stage: an N-channel input differential pair in parallel with a
P-channel differential pair, as shown in Figure 33. The N-channel pair is active for input voltages close to the
positive rail, typically (V+) – 1.3 V to 200 mV above the positive supply, while the P-channel pair is on for inputs
from 200 mV below the negative supply to approximately (V+) – 1.3 V. There is a small transition region, typically
(V+) – 1.4 V to (V+) – 1.2 V, in which both pairs are on. This 200-mV transition region can vary up to 300 mV
with process variation. Thus, the transition region (both stages on) can range from (V+) – 1.7 V to (V+) – 1.5 V
on the low end, up to (V+) – 1.1 V to (V+) – 0.9 V on the high end. Within this transition region, PSRR, CMRR,
offset voltage, offset drift, and THD may be degraded compared to device operation outside this region.
V+
Reference
Current
VIN+
VIN-
VBIAS1
Class AB
Control
Circuitry
VO
VBIAS2
V-
(Ground)
Figure 33. Simplified Schematic
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SBOS563D –MAY 2011–REVISED MARCH 2012
INPUT AND ESD PROTECTION
The OPA314 family incorporates internal electrostatic discharge (ESD) protection circuits on all pins. In the case
of input and output pins, this protection primarily consists of current-steering diodes connected between the input
and power-supply pins. These ESD protection diodes also provide in-circuit, input overdrive protection, as long
as the current is limited to 10 mA as stated in the Absolute Maximum Ratings. Figure 34 shows how a series
input resistor may be added to the driven input to limit the input current. The added resistor contributes thermal
noise at the amplifier input and its value should be kept to a minimum in noise-sensitive applications.
V+
IOVERLOAD
10mA max
VOUT
OPA314
VIN
5kW
Figure 34. Input Current Protection
COMMON-MODE REJECTION RATIO (CMRR)
CMRR for the OPA314 is specified in several ways so the best match for a given application may be used; see
the Electrical Characteristics. First, the CMRR of the device in the common-mode range below the transition
region [VCM < (V+) – 1.3 V] is given. This specification is the best indicator of the capability of the device when
the application requires use of one of the differential input pairs. Second, the CMRR over the entire common-
mode range is specified at (VCM = –0.2 V to 5.7 V). This last value includes the variations seen through the
transition region (see Figure 7).
EMI SUSCEPTIBILITY AND INPUT FILTERING
Operational amplifiers vary with regard to the susceptibility of the device to electromagnetic interference (EMI). If
conducted EMI enters the op amp, the dc offset observed at the amplifier output may shift from its nominal value
while EMI is present. This shift is a result of signal rectification associated with the internal semiconductor
junctions. While all op amp pin functions can be affected by EMI, the signal input pins are likely to be the most
susceptible. The OPA314 operational amplifier family incorporate an internal input low-pass filter that reduces the
amplifiers response to EMI. Both common-mode and differential mode filtering are provided by this filter. The
filter is designed for a cutoff frequency of approximately 80 MHz (–3 dB), with a roll-off of 20 dB per decade.
Texas Instruments has developed the ability to accurately measure and quantify the immunity of an operational
amplifier over a broad frequency spectrum extending from 10 MHz to 6 GHz. The EMI rejection ratio (EMIRR)
metric allows op amps to be directly compared by the EMI immunity. Figure 32 illustrates the results of this
testing on the OPAx314. Detailed information can also be found in the application report, EMI Rejection Ratio of
Operational Amplifiers (SBOA128), available for download from www.ti.com.
RAIL-TO-RAIL OUTPUT
Designed as a micro-power, low-noise operational amplifier, the OPA314 delivers a robust output drive capability.
A class AB output stage with common-source transistors is used to achieve full rail-to-rail output swing capability.
For resistive loads up to 10 kΩ, the output swings typically to within 5 mV of either supply rail regardless of the
power-supply voltage applied. Different load conditions change the ability of the amplifier to swing close to the
rails; refer to the typical characteristic graph, Output Voltage Swing vs Output Current.
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CAPACITIVE LOAD AND STABILITY
The OPA314 is designed to be used in applications where driving a capacitive load is required. As with all op
amps, there may be specific instances where the OPA314 can become unstable. The particular op amp circuit
configuration, layout, gain, and output loading are some of the factors to consider when establishing whether or
not an amplifier is stable in operation. An op amp in the unity-gain (+1-V/V) buffer configuration that drives a
capacitive load exhibits a greater tendency to be unstable than an amplifier operated at a higher noise gain. The
capacitive load, in conjunction with the op amp output resistance, creates a pole within the feedback loop that
degrades the phase margin. The degradation of the phase margin increases as the capacitive loading increases.
When operating in the unity-gain configuration, the OPA314 remains stable with a pure capacitive load up to
approximately 1 nF. The equivalent series resistance (ESR) of some very large capacitors (CL greater than 1 μF)
is sufficient to alter the phase characteristics in the feedback loop such that the amplifier remains stable.
Increasing the amplifier closed-loop gain allows the amplifier to drive increasingly larger capacitance. This
increased capability is evident when observing the overshoot response of the amplifier at higher voltage gains.
See the typical characteristic graph, Small-Signal Overshoot vs. Capacitive Load.
One technique for increasing the capacitive load drive capability of the amplifier operating in a unity-gain
configuration is to insert a small resistor, typically 10 Ω to 20 Ω, in series with the output, as shown in Figure 35.
This resistor significantly reduces the overshoot and ringing associated with large capacitive loads. One possible
problem with this technique, however, is that a voltage divider is created with the added series resistor and any
resistor connected in parallel with the capacitive load. The voltage divider introduces a gain error at the output
that reduces the output swing.
V+
RS
VOUT
OPA314
VIN
10 W to
20 W
RL
CL
Figure 35. Improving Capacitive Load Drive
DFN PACKAGE
The OPA2314 (dual version) uses the DFN style package (also known as SON); this package is a QFN with
contacts on only two sides of the package bottom. This leadless package maximizes printed circuit board (PCB)
space and offers enhanced thermal and electrical characteristics through an exposed pad. One of the primary
advantages of the DFN package is its low, 0.9-mm height. DFN packages are physically small, have a smaller
routing area, improved thermal performance, reduced electrical parasitics, and use a pinout scheme that is
consistent with other commonly-used packages, such as SO and MSOP. Additionally, the absence of external
leads eliminates bent-lead issues.
The DFN package can easily be mounted using standard PCB assembly techniques. See Application Note,
QFN/SON PCB Attachment (SLUA271) and Application Report, Quad Flatpack No-Lead Logic Packages
(SCBA017), both available for download from www.ti.com.
NOTE
The exposed leadframe die pad on the bottom of the DFN package should be connected
to the most negative potential (V–).
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SBOS563D –MAY 2011–REVISED MARCH 2012
APPLICATION EXAMPLES
GENERAL CONFIGURATIONS
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required.
The simplest way to establish this limited bandwidth is to place an RC filter at the noninverting terminal of the
amplifier, as Figure 36 shows.
RG
RF
R1
VOUT
VIN
C1
1
2pR1C1
f
=
-3 dB
VOUT
VIN
RF
1
1 + sR1C1
=
1 +
(
(
RG
Figure 36. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this
task, as Figure 37 shows. For best results, the amplifier should have a bandwidth that is eight to 10 times the
filter frequency bandwidth. Failure to follow this guideline can result in phase shift of the amplifier.
C1
R1 = R2 = R
C1 = C2 = C
R1
R2
Q = Peaking factor
(Butterworth Q = 0.707)
VIN
VOUT
C2
1
2pRC
f
=
-3 dB
RF
RF
RG
=
1
2 -
RG
(
(
Q
Figure 37. Two-Pole Low-Pass Sallen-Key Filter
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REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (February 2012) to Revision D
Page
•
•
Changed product status from mixed status to production data ............................................................................................ 1
Deleted shading and footnote 2 from Package Information table ........................................................................................ 2
Changes from Revision B (December 2011) to Revision C
Page
•
•
•
Changed first Features bullet ................................................................................................................................................ 1
Deleted shading from OPA314 SOT23-5 row (DBV package) in Package Information table .............................................. 2
Added OPA2314, OPA4314 to first two Power Supply, Quiescent current per amplifier parameter rows in Electrical
Characteristics table ............................................................................................................................................................. 4
•
Added OPA314 Power Supply, Quiescent current per amplifier parameter row to Electrical Characteristics table ............ 4
Changes from Revision A (August 2011) to Revision B
Page
•
Deleted shading from OPA2314 MSOP-8 row in Package Information table ...................................................................... 2
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PACKAGE OPTION ADDENDUM
www.ti.com
21-Apr-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
OPA2314AID
OPA2314AIDGK
OPA2314AIDGKR
OPA2314AIDR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PREVIEW
PREVIEW
ACTIVE
ACTIVE
SOIC
MSOP
MSOP
SOIC
D
8
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
DGK
DGK
D
80
Green (RoHS
& no Sb/Br)
CU NIPDAUAGLevel-2-260C-1 YEAR
CU NIPDAUAGLevel-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
8
2500
2500
3000
250
Green (RoHS
& no Sb/Br)
8
Green (RoHS
& no Sb/Br)
OPA2314AIDRBR
OPA2314AIDRBT
OPA314AIDBVR
OPA314AIDBVT
OPA314AIDCKR
OPA314AIDCKT
OPA4314AIPW
OPA4314AIPWR
SON
DRB
DRB
DBV
DBV
DCK
DCK
PW
8
Green (RoHS
& no Sb/Br)
SON
8
Green (RoHS
& no Sb/Br)
SOT-23
SOT-23
SC70
5
3000
250
Green (RoHS
& no Sb/Br)
5
Green (RoHS
& no Sb/Br)
5
3000
250
Green (RoHS
& no Sb/Br)
SC70
5
Green (RoHS
& no Sb/Br)
TSSOP
TSSOP
14
14
90
Green (RoHS
& no Sb/Br)
PW
2000
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
21-Apr-2012
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
OPA2314AIDGKR
OPA2314AIDR
MSOP
SOIC
DGK
D
8
8
2500
2500
3000
250
330.0
330.0
330.0
180.0
178.0
178.0
330.0
12.4
12.4
12.4
12.4
9.0
5.3
6.4
3.4
5.2
1.4
2.1
8.0
8.0
8.0
8.0
4.0
4.0
8.0
12.0
12.0
12.0
12.0
8.0
Q1
Q1
Q2
Q2
Q3
Q3
Q1
OPA2314AIDRBR
OPA2314AIDRBT
OPA314AIDBVR
OPA314AIDBVT
OPA4314AIPWR
SON
DRB
DRB
DBV
DBV
PW
8
3.3
3.3
1.1
SON
8
3.3
3.3
1.1
SOT-23
SOT-23
TSSOP
5
3000
250
3.23
3.23
6.9
3.17
3.17
5.6
1.37
1.37
1.6
5
9.0
8.0
14
2000
12.4
12.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
OPA2314AIDGKR
OPA2314AIDR
MSOP
SOIC
DGK
D
8
8
2500
2500
3000
250
366.0
346.0
346.0
210.0
180.0
180.0
346.0
364.0
346.0
346.0
185.0
180.0
180.0
346.0
50.0
29.0
29.0
35.0
18.0
18.0
29.0
OPA2314AIDRBR
OPA2314AIDRBT
OPA314AIDBVR
OPA314AIDBVT
OPA4314AIPWR
SON
DRB
DRB
DBV
DBV
PW
8
SON
8
SOT-23
SOT-23
TSSOP
5
3000
250
5
14
2000
Pack Materials-Page 2
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