PCF8574RGTRG4 [TI]
REMOTE 8-BIT I/O EXPANDER FOR I2C BUS; 远程8位I / O扩展器I2C总线
| 型号： | PCF8574RGTRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | REMOTE 8-BIT I/O EXPANDER FOR I2C BUS |
| 文件： | 总23页 (文件大小：944K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PCF8574
REMOTE 8-BIT I/O EXPANDER FOR I2C BUS
www.ti.com
SCPS068F–JULY 2001–REVISED OCTOBER 2006
FEATURES
•
Low Standby-Current Consumption of
10 µA Max
I2C to Parallel-Port Expander
•
•
Latched Outputs With High-Current Drive
Capability for Directly Driving LEDs
•
•
•
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
Open-Drain Interrupt Output
Compatible With Most Microcontrollers
RGY PACKAGE
(TOP VIEW)
DGV OR PW PACKAGE
(TOP VIEW)
RGT PACKAGE
DW OR N PACKAGE
(TOP VIEW)
(TOP VIEW)
1
20
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
INT
SCL
NC
P7
P6
19
18
17
16
15
14
13
12
2
3
4
5
6
7
8
9
SCL
NC
SDA
P6
NC
P5
P4
GND
P3
V
SDA
A0
A1
A2
P0
P1
P2
P3
1
2
3
4
5
6
7
8
16
15
CC
NC
P5
P4
GND
P3
14 SCL
VCC
A0
A1
A2
1
2
3
4
12 P6
11 P5
10 P4
SDA
V
CC
INT
P7
P6
P5
P4
13
12
11
10
9
V
CC
A0
A1
NC
A2
A0
A1
NC
A2
P0
9
GND
NC
P2
NC
P2
P1
GND
10
11
NC – No internal connection
NC – No internal connection
DESCRIPTION/ORDERING INFORMATION
This 8-bit input/output (I/O) expander for the two-line bidirectional bus (I2C) is designed for 2.5-V to 6-V VCC
operation.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
PCF8574N
TOP-SIDE MARKING
PCF8574N
PDIP – N
Tube of 25
PCF8574NE4
QFN – RGT
QFN – RGY
Reel of 3000
Reel of 1000
PCF8574RGTR
PCF8574RGYR
PCF8574RGYRG4
PCF8574DW
ZWJ
PF574
Tube of 40
PCF8574DWE4
PCF8574DWR
SOIC – DW
PCF8574
–40°C to 85°C
Reel of 2000
Tube of 70
PCF8574DWRE4
PCF8574PW
PCF8574PWE4
PCF8574PWR
TSSOP – PW
TVSOP – DGV
PF574
PF574
Reel of 2000
Reel of 2000
PCF8574PWRE4
PCF8574DGVR
PCF8574DGVRE4
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2001–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
PCF8574
REMOTE 8-BIT I/O EXPANDER FOR I2C BUS
www.ti.com
SCPS068F–JULY 2001–REVISED OCTOBER 2006
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The PCF8574 provides general-purpose remote I/O expansion for most microcontroller families via the I2C
interface [serial clock (SCL), serial data (SDA)].
The device features an 8-bit quasi-bidirectional I/O port (P0–P7), including latched outputs with high-current
drive capability for directly driving LEDs. Each quasi-bidirectional I/O can be used as an input or output without
the use of a data-direction control signal. At power on, the I/Os are high. In this mode, only a current source to
VCC is active. An additional strong pullup to VCC allows fast rising edges into heavily loaded outputs. This device
turns on when an output is written high and is switched off by the negative edge of SCL. The I/Os should be
high before being used as inputs.
The PCF8574 provides an open-drain output (INT) that can be connected to the interrupt input of a
microcontroller. An interrupt is generated by any rising or falling edge of the port inputs in the input mode. After
time, tiv, INT is valid. Resetting and reactivating the interrupt circuit is achieved when data on the port is changed
to the original setting or data is read from, or written to, the port that generated the interrupt. Resetting occurs in
the read mode at the acknowledge bit after the rising edge of the SCL signal, or in the write mode at the
acknowledge bit after the high-to-low transition of the SCL signal. Interrupts that occur during the acknowledge
clock pulse can be lost (or be very short) due to the resetting of the interrupt during this pulse. Each change of
the I/Os after resetting is detected and, after the next rising clock edge, is transmitted as INT. Reading from, or
writing to, another device does not affect the interrupt circuit.
By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data
on its ports without having to communicate via the I2C bus. Therefore, the PCF8574 can remain a simple slave
device.
LOGIC DIAGRAM (POSITIVE LOGIC)
PCF8574
13
Interrupt
Logic
LP Filter
INT
1
2
3
4
5
A0
A1
A2
P0
P1
P2
P3
P4
P5
P6
P7
6
14
15
7
SCL
SDA
2
Input
Filter
I C Bus
Shift
Register
I/O
Port
Control
8 Bit
9
10
11
12
Write Pulse
Read Pulse
16
8
V
Power-On
Reset
CC
GND
Pin numbers shown are for the DW and N packages.
2
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PCF8574
REMOTE 8-BIT I/O EXPANDER FOR I2C BUS
www.ti.com
SCPS068F–JULY 2001–REVISED OCTOBER 2006
SIMPLIFIED SCHEMATIC DIAGRAM OF EACH P-PORT INPUT/OUTPUT
V
CC
Write Pulse
100 µA
Data From
Shift Register
D
C
Q
FF
S
P0−P7
GND
I
Power-On
Reset
D
C
Q
FF
S
I
Read Pulse
To Interrupt
Logic
Data to
Shift Register
I2C Interface
I2C communication with this device is initiated by a master sending a start condition, a high-to-low transition on
the SDA I/O while the SCL input is high. After the start condition, the device address byte is sent,
most-significant bit (MSB) first, including the data direction bit (R/W). This device does not respond to the
general call address. After receiving the valid address byte, this device responds with an acknowledge, a low on
the SDA I/O during the high of the acknowledge-related clock pulse. The address inputs (A0–A2) of the slave
device must not be changed between the start and the stop conditions.
The data byte follows the address acknowledge. If the R/W bit is high, the data from this device are the values
read from the P port. If the R/W bit is low, the data are from the master, to be output to the P port. The data byte
is followed by an acknowledge sent from this device. If other data bytes are sent from the master, following the
acknowledge, they are ignored by this device. Data are output only if complete bytes are received and
acknowledged. The output data will be valid at time, tpv, after the low-to-high transition of SCL and during the
clock cycle for the acknowledge.
A stop condition, which is a low-to-high transition on the SDA I/O while the SCL input is high, is sent by the
master.
Interface Definition
BIT
BYTE
7 (MSB)
6
H
5
L
4
L
3
2
1
0 (LSB)
R/W
I2C slave address
I/O data bus
L
A2
P3
A1
P2
A0
P1
P7
P6
P5
P4
P0
3
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PCF8574
REMOTE 8-BIT I/O EXPANDER FOR I2C BUS
www.ti.com
SCPS068F–JULY 2001–REVISED OCTOBER 2006
Figure 1 and Figure 2 show the address and timing diagrams for the write and read modes, respectively.
Integral Multiples of Two Bytes
SCL
1
6
2
3
4
6
7
8
1
2
3
4
5
7
8
1
2
3
4
5
6
7
8
5
ACK
From Slave
Start
Condition
ACK
From Slave
ACK
From Slave
R/W
Slave Address (PCF8575C)
Data
Data
SDA
S
0
1
0
0
A2 A1 A0
0
A
P7 P6
1
P0
A
P7
P0
A
P5
Write to
Port
Data A0
and B0
Valid
Data Output
Voltage
t
pv
P5 Output
Voltage
I
P5 Pullup
Output
OH
I
OHT
Current
INT
t
ir
Figure 1. Write Mode (Output)
SCL
1
6
2
3
4
6
7
8
1
2
3
4
5
7
8
1
2
3
4
5
6
7
8
5
ACK
From Master
ACK
From Slave
ACK
From Master
R/W
S
0
1
0
0
A2 A1 A0
1
A
P7 P6 P5 P4 P3 P2 P1 P0
A
P7 P6 P5 P4 P3 P2 P1 P0
A P7 P6
SDA
Read From
Port
Data Into
Port
P7 to P0
P7 to P0
t
su
t
h
INT
t
ir
t
iv
t
ir
A low-to-high transition of SDA while SCL is high is defined as the stop condition (P). The transfer of data can be stopped at any moment by
a stop condition. When this occurs, data present at the latest ACK phase is valid (output mode). Input data is lost.
Figure 2. Read Mode (Input)
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PCF8574
REMOTE 8-BIT I/O EXPANDER FOR I2C BUS
www.ti.com
SCPS068F–JULY 2001–REVISED OCTOBER 2006
Address Reference
INPUTS
I2C BUS SLAVE ADDRESS
A2
L
A1
L
A0
L
32 (decimal), 20 (hexadecimal)
33 (decimal), 21 (hexadecimal)
34 (decimal), 22 (hexadecimal)
35 (decimal), 23 (hexadecimal)
36 (decimal), 24 (hexadecimal)
37 (decimal), 25 (hexadecimal)
38 (decimal), 26 (hexadecimal)
39 (decimal), 27 (hexadecimal)
L
L
H
L
L
H
H
L
L
H
L
H
H
H
H
L
H
L
H
H
H
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
V
VCC
VI
Supply voltage range
Input voltage range(2)
–0.5
7
–0.5 VCC + 0.5
V
VO
IIK
Output voltage range(2)
–0.5 VCC + 0.5
V
Input clamp current
VI < 0
–20
–20
±400
50
mA
mA
µA
mA
mA
mA
IOK
IOK
IOL
IOH
Output clamp current
VO < 0
Input/output clamp current
Continuous output low current
Continuous output high current
Continuous current through VCC or GND
VO < 0 or VO > VCC
VO = 0 to VCC
VO = 0 to VCC
–4
±100
92
DGV package(3)
DW package(3)
N package(3)
PW package(3)
RGT package(4)
RGY package(4)
57
67
θJA
Package thermal impedance
°C/W
83
53
37
Tstg
Storage temperature range
–65
150
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
(4) The package thermal impedance is calculated in accordance with JESD 51-5.
Recommended Operating Conditions
MIN
2.5
MAX UNIT
VCC
VIH
VIL
IOH
IOL
TA
Supply voltage
6
VCC + 0.5
0.3 × VCC
–1
V
V
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
0.7 × VCC
–0.5
V
mA
mA
°C
25
–40
85
5
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PCF8574
REMOTE 8-BIT I/O EXPANDER FOR I2C BUS
www.ti.com
SCPS068F–JULY 2001–REVISED OCTOBER 2006
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
Input diode clamp voltage
Power-on reset voltage(2)
P port
TEST CONDITIONS
VCC
2.5 V to 6 V
6 V
MIN TYP(1)
MAX UNIT
VIK
II = –18 mA
–1.2
1.3
30
–1
3
V
VPOR
IOH
VI = VCC or GND,
VO = GND
IO = 0
2.4
V
2.5 V to 6 V
2.5 V
300
µA
mA
IOHT
P-port transient pullup current High during acknowledge, VOH = GND
SDA
VO = 0.4 V
VO = 1 V
2.5 V to 6 V
5 V
IOL
P port
10
25
mA
INT
VO = 0.4 V
2.5 V to 6 V
1.6
SCL, SDA
INT
±5
±5
II
VI = VCC or GND
2.5 V to 6 V
µA
A0, A1, A2
P port
±5
IIHL
ICC
Ci
VI ≥ VCC or VI ≤ GND
VI = VCC or GND,
VI = VCC or GND,
VI = VCC or GND
2.5 V to 6 V
6 V
±400
100
10
µA
µA
pF
pF
Operating mode
Standby mode
SCL
IO = 0, fSCL = 100 kHz
IO = 0
40
2.5
1.5
3
2.5 V to 6 V
2.5 V to 6 V
7
SDA
7
Cio
VIO = VCC or GND
P port
4
10
(1) All typical values are at VCC = 5 V, TA = 25°C.
(2) The power-on reset circuit resets the I2C-bus logic with VCC < VPOR and sets all I/Os to logic high (with current source to VCC).
I2C Interface Timing Requirements
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3)
MIN
MAX UNIT
fscl
tsch
tscl
tsp
I2C clock frequency
I2C clock high time
I2C clock low time
I2C spike time
I2C serial data setup time
I2C serial data hold time
I2C input rise time
100
kHz
µs
µs
ns
ns
ns
µs
µs
ns
µs
µs
µs
µs
µs
pF
4
4.7
100
tsds
tsdh
ticr
250
0
1
0.3
ticf
I2C input fall time
tocf
tbuf
tsts
tsth
tsps
tvd
I2C output fall time (10-pF to 400-pF bus)
I2C bus free time between stop and start
I2C start or repeated start condition setup
I2C start or repeated start condition hold
I2C stop condition setup
Valid data time
300
4.7
4.7
4
4
SCL low to SDA output valid
3.4
Cb
I2C bus capacitive load
400
6
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PCF8574
REMOTE 8-BIT I/O EXPANDER FOR I2C BUS
www.ti.com
SCPS068F–JULY 2001–REVISED OCTOBER 2006
Switching Characteristics
over recommended operating free-air temperature range, CL ≤ 100 pF (unless otherwise noted) (see Figure 4)
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX UNIT
tpv
tsu
th
Output data valid
SCL
P port
P port
P port
SCL
P port
SCL
SCL
INT
4
µs
µs
µs
µs
µs
Input data setup time
Input data hold time
Interrupt valid time
Interrupt reset delay time
0
4
tiv
tir
4
4
INT
7
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PCF8574
REMOTE 8-BIT I/O EXPANDER FOR I2C BUS
www.ti.com
SCPS068F–JULY 2001–REVISED OCTOBER 2006
PARAMETER MEASUREMENT INFORMATION
V
CC
R
= 1 kΩ
L
L
P
n
DUT
C
= 10 pF to 400 pF
LOAD CIRCUIT
2 Bytes for Complete Device
Programming
Stop
Condition
(P)
Start
Condition
(S)
Bit 0
LSB
(R/W)
Stop
Condition
(P)
Bit 7
MSB
Acknowledge
(A)
Bit 6
t
scl
t
sch
0.7 × V
0.3 × V
CC
SCL
CC
t
icr
t
sts
t
PHL
t
icf
t
buf
t
t
sp
PLH
0.7 × V
0.3 × V
CC
SDA
CC
t
icf
t
icr
t
sdh
t
sps
t
sth
t
sds
Repeat
Start
Condition
Stop
Condition
Start or
Repeat
Start
Condition
VOLTAGE WAVEFORMS
Figure 3. I2C Interface Load Circuit and Voltage Waveforms
8
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PCF8574
REMOTE 8-BIT I/O EXPANDER FOR I2C BUS
www.ti.com
SCPS068F–JULY 2001–REVISED OCTOBER 2006
PARAMETER MEASUREMENT INFORMATION (continued)
Acknowledge
From Slave
Start
Condition
Acknowledge
From Slave
R/W
Slave Address
Data From Port
Data 1
Data From Port
Data 3
S
0
1
0
0
A2 A1 A0
1
A
A
1
P
1
2
3
4
5
6
7
8
A
A
t
ir
B
B
t
ir
INT
A
t
iv
t
sps
A
Data
Into
Port
Data 1
Data 2
Data 3
0.7 × V
0.3 × V
CC
0.7 × V
0.3 × V
CC
SCL
INT
R/W
A
CC
CC
t
iv
t
ir
0.7 × V
0.3 × V
0.7 × V
CC
CC
INT
P
n
0.3 × V
CC
CC
View A−A
SCL
View B−B
Figure 4. Interrupt Voltage Waveforms
0.7 × V
CC
W
A
D
0.3 × V
CC
Slave
Acknowledge
SDA
t
pv
P
n
Last Stable Bit
Unstable
Data
Figure 5. I2C Write Voltage Waveforms
9
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PCF8574
REMOTE 8-BIT I/O EXPANDER FOR I2C BUS
www.ti.com
SCPS068F–JULY 2001–REVISED OCTOBER 2006
PARAMETER MEASUREMENT INFORMATION (continued)
V
CC
V
CC
R
L
= 1 kΩ
R
L
= 4.7 kΩ
INT
SDA
DUT
DUT
C
L
= 10 pF to 400 pF
C
L
= 10 pF to 400 pF
GND
SDA LOAD CONFIGURATION
GND
INTERRUPT LOAD CONFIGURATION
Figure 6. Load Circuits
10
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PACKAGE OPTION ADDENDUM
www.ti.com
14-Nov-2006
PACKAGING INFORMATION
Orderable Device
PCF8574DGVR
PCF8574DGVRE4
PCF8574DW
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TVSOP
DGV
20
20
16
16
16
16
16
16
20
20
20
20
16
16
20
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TVSOP
SOIC
SOIC
SOIC
SOIC
PDIP
DGV
DW
DW
DW
DW
N
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PCF8574DWE4
PCF8574DWR
PCF8574DWRE4
PCF8574N
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
PCF8574NE4
PDIP
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
PCF8574PW
TSSOP
TSSOP
TSSOP
TSSOP
QFN
PW
PW
PW
PW
RGT
RGT
RGY
RGY
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PCF8574PWE4
PCF8574PWR
PCF8574PWRE4
PCF8574RGTR
PCF8574RGTRG4
PCF8574RGYR
PCF8574RGYRG4
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
QFN
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
QFN
1000 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
QFN
1000 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
14-Nov-2006
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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