PT4856C [TI]
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| 型号： | PT4856C |
| 厂家： | 
TEXAS INSTRUMENTS |
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PT4850 Series
25-A Triple Output Isolated DC/DC
Converter For Logic Applications
SLTS166C - FEBRUARY 2002 - REVISED MARCH 2003
Features
• Triple Logic Voltage Outputs
• Dual Logic On/Off Control
• Fixed Frequency Operation
• Solderable Space Saving Package:
1.97 sq. in. PCB Area (suffix N)
(Independently Regulated !)
• Input Voltage Range:
36V to 75V
• 1500VDC Isolation
• IPC Lead Free 2
• Safety Approvals Pending:
UL60950
• Over-Current Protection
• Over-Voltage Protection
• Over-Temperature Shutdown
• Under-Voltage Lockout
• Independently Adjustable Outputs
CSA 22.2 950
VDE EN60950
Description
Ordering Information
PT4851o = +3.3/+2.5/+1.5V
PT4852o = +3.3/+1.8/+1.5V
PT4853o = +3.3/+2.5/+1.2V
PT4854o = +3.3/+1.8/+1.2V
PT4855o = +3.3/+1.5/+1.2V
PT4856o = +5.0/+3.3/+1.5V
The PT4850 Excalibur™ power
modules are a series of isolated triple-
output DC/DC converters that
operate from a standard (–48V)
central office supply. These modules
are rated for a combined output of
up to 25A, and were designed for
powering mixed logic applications.
The triple-output voltage provides
a compact multiple-output power
supply in a single DC/DC module.
Output voltage options include
a low-voltage output for a DSP or
ASIC core, and two additional supply
voltages for the I/O, and other func-
tions.
The PT4850 series incorporates
many features to simplify system
integration. These include a flexible
On/Off enable control, input under-
voltage lockout and over-temperature
protection. All outputs are current
limited and short-circuit protected,
and are internally sequenced to meet
the power-up and power-down re-
quirements of popular DSP ICs.
The PT4850 series is housed in
a space-saving solderable case. The
module requires no external heat
sink. Both vertical and horizontal
pin configurations are available, in-
cluding surface mount.
PT Series Suffix
(PT1234x)
Case/Pin
Order
Package
Code
Configuration
Suffix
Vertical
Horizontal
SMD
N
A
C
(EKD)
(EKA)
(EKC)
(Reference the applicable package code drawing for
the dimensions and PC layout)
Standard Application
PT4850
I/O
9,10,11
8
+Vo1
V1 Adj
COM
+VIN
1
+
+VIN
Co1
12,13,14
25
V2Sense
+Vo2
Logic
Core
15,16
17
+
DSL, DSP,
or ASIC
Chipset
CIN
4
V2 Adj
EN 2
+
Co2
Q1
3
EN 1
24
V3Sense
+Vo3
22,23
21
–VIN
2
–VIN
V3 Adj
+
Co3
1 =Inhibit
COM
18,19,20
Cin =Optional
Co1, Co2, Co3 =Optional. See specifications
EN1 & EN2 operation: See application notes
For technical support and more information, see inside back cover or visit www.ti.com
PT4850 Series
25-A Triple Output Isolated DC/DC
Converter For Logic Applications
SLTS166C - FEBRUARY 2002 - REVISED MARCH 2003
Environmental Specifications
Characteristics
Symbols
Conditions
Min
Typ
Max
Units
(i)
Operating Temperature Range
Case Temperature
Storage Temperature
Over Temperature Protection
Mechanical Shock
T
Over Vin Range
–40
—
–40
—
—
—
—
110
+85
105
°C
°C
°C
°C
a
T
c
T
—
+125
125
s
OTP
Case temperature
Per Mil-STD-883D, Method 2002.3
1 msec, ½ Sine, mounted
—
500
—
G’s
Mechanical Vibration
Mil-STD-883D, Method 2007.2
20-2000 Hz
Suffix N
—
—
10 (ii)
—
—
G’s
(ii)
Suffix A, C
20
Weight
Flammability
—
—
Vertical/Horizontal
Meets UL 94V-O
—
90
—
grams
Notes: (i) See SOA curves or consult factory for appropriate derating.
(ii) The case pins on through-hole pin configurations (N & A) must be soldered. For more information see the applicable package outline drawing.
Pin Configuration
On/Off Enable Logic
Pin 3 Pin 4
Output Status
Pin Function
Pin Function
Pin Function
19
20
21
22
23
24
25
26
COM
10
11
12
13
14
15
16
17
18
+Vo1
1
2
3
4
5
6
7
8
9
+Vin
1
0
×
×
1
0
Off
On
Off
COM
+Vo1
–Vin
Vo3 Adjust
+Vo3
COM
COM
COM
+Vo2
EN 1
EN 2
+Vo3
TEMP
Notes:
Logic 1 =Open circuit
Logic 0 = –Vin (pin 2) potential
Vo3 Rem Sense
Vo2 Rem Sense
Do Not Connect
Pin Not Present
Do Not Connect
Vo1 Adjust
+Vo1
+Vo2
For positive Enable function, connect pin 3
to pin 2 and use pin 4.
Vo2 Adjust
COM
For negative Enable function, leave pin 4
open and use pin 3.
Note: Shaded functions indicate those pins that are at primary-side potential.
Pin Descriptions
+Vin: The positive input supply for the module with
respect to –Vin. When powering the module from a
–48V telecom central office supply, this input is
connected to the primary system ground.
affect the module’s over-temperature shutdown threshold.
Use a high-impedance input when monitoring this signal.)
Vo 1: The highest regulated output voltage, which is
referenced to the COM node.
–Vin: The negative input supply for the module, and
the 0VDC reference for the EN 1, and EN 2 inputs.
When powering the module from a +48V supply,
this input is connected to the 48V(Return).
Vo 2: The regulated output that is designed to power
logic circuitry. It is referenced to the COM node.
Vo 3: The low-voltage regulated output that provides
power for a µ-processor or DSP core, and is refer-
enced to the COM node.
EN 1: The negative logic input that activates the
module output. This pin must be connected to –Vin
to enable the module’s outputs. A high impedance
disables the module’s outputs.
COM: The secondary return reference for the module’s
three regulated output voltages. It is DC isolated from
the input supply pins.
EN 2: The positive logic input that activates the
module output. If not used, this pin should be left
open circuit. Connecting this input to –Vin disables
the module’s outputs.
Vo(n) Adjust: Using a single resistor, this pin allows the
associated output Vo(n) to be adjusted higher or lower
than the preset value. If not used, this pin should be
left open circuit.
TEMP: This pin produces an output signal that tracks
a temperature that is approximately the module’s
metal case. The output voltage is referenced to –Vin
and rises approximately 10mV/°C from an intital
value of 0.1VDC at –40°C. The signal is available
whenever the module is supplied with a valid input
voltage, and is independant of the enable logic status.
(Note: A load impedance of less than 1MΩ will adversly
Vo(n) Rem Sense: An external remote sense input is
provided for the two lowest voltage outputs, +Vo2
and +Vo3. Connecting the remote sense pins im-
proves the load regulation of the applicable output
by allowing the regulation circuit to compensate for
voltage drop between the converter and load. If
desired these inputs may be left disconnected.
For technical support and more information, see inside back cover or visit www.ti.com
PT4850 Series
25-A Triple Output Isolated DC/DC
Converter For Logic Applications
SLTS166C - FEBRUARY 2002 - REVISED MARCH 2003
Electrical Specifications
(Unless otherwise stated, the operating conditions are:- Ta =25°C, Vin =48V, and Io =0.5Iomax)
PT4850 Series (Except PT4856)
Characteristics
Symbols
Conditions
Min
Typ
Max
Units
Output Current
Io
Each output
Io1
Io2
Io3
0
0
0
—
—
—
15
10
10
A
Iotot
Vin
Total (all three outputs)
—
36
—
—
—
—
25
75
80
A
Input Voltage Range
Continuous
V
Surge (1 minute)
Set-Point Voltage Tolerance
Temperature Variation
Line Regulation
Load Regulation
Cross Regulation
Votol
—
—
—
—
—
—
0.5
0.2
5
1.5
—
0.5
10
10
%Vo
%Vo
%Vo
mV
∆Regtemp
∆Regline
∆Regload
∆Regcross
∆Vo tol
–40°C ≤Ta ≤+85°C, Io1 =Io2 =Io3 =Iomin
All outputs, Over Vin range
Each output, 0≤Io≤Iomax
Any output vs. another
—
mV
Total Output Voltage Variation
Includes set-point, line, load,
(1)
—
2
3
%Vo
%
–40°C≤Ta ≤+85°C
Efficiency
η
Io1 =10A, Io2 =5A, Io3 =5A
—
85
—
Vo Ripple (pk-pk)
Vr
20MHz bandwidth,
Io1 =Io2 =Io3 =5A
Vo=5.0V
Vo=3.3V
—
—
—
—
50
20
20
15
75
50
30
25
mVpp
Vo=1.8V/2.5V
Vo≤1.5V
Transient Response
ttr
0.1A/µs load step, 50% to 75% Iomax
Vo over/undershoot
—
—
200
5
—
—
µSec
%Vo
Vos
Output Adjust Range
Current Limit Threshold
Voadj
ILIM
Vo1/Vo2/Vo3
—
10
—
%Vo
∆Vo = –1%
Vo1
Vo2
Vo3
—
—
—
20
15
15
—
—
—
A
(2)
Output Over-Voltage Protection
Switching Frequency
OVP
ƒs
All outputs; module shutdown and latch off
Over Vin and Io ranges
—
280
125
320
—
340
%Vo
kHz
Under Voltage Lockout
Von
Voff
Vin increasing
Vin decreasing
—
30
34
32
36
—
V
Enable Control (pins 3 & 4)
High-Level Input Voltage
Low-Level Input Voltage
Referenced to –Vin (pin 2)
(3)
(3)
VIH
VIL
3.5
—
—
Open
0.8
V
–0.2
Low-Level Input Current
IIL
—
—
—
0
0.5
2.5
2
—
mA
mA
µF
(1)
Standby Input Current
Iin standby
Cint
pins 3 & 4 open circuit
Per each output
4
Internal Input Capacitance
—
External Output Capacitance
Primary/Secondary Isolation
Cout
—
—
5,000
µF
V iso
C iso
Riso
1500
—
—
—
—
V
2,200
—
pF
MΩ
10
(4)
(4)
Temperature Sense
Vtemp
Output
voltage
at
temperatures:-–40°C
100°C
—
—
—
0.1
V
—
1.5
Notes: (1) Limits are specified by design.
(2) This is a fixed parameter. Adjusting Vo1 or Vo2 higher will increase the module’s sensitivity to over-voltage detection. For more information, see the
application note on output voltage adjustment.
(3) The Enable inputs (pins 3 & 4) have internal pull-ups. Leaving pin 4 open-circuit and connecting pin 3 to –Vin (pin 2) allows the the converter to
operate when input power is applied. The maximum open-circuit voltage for the Enable inputs is 5.4V.
(4) Voltage output at “TEMP” pin is defined by the equation:- VTEMP = 0.5 + 0.01·T, where T is in °C. See pin descriptions for more information.
For technical support and more information, see inside back cover or visit www.ti.com
Typical Characteristics
PT4850 Series
25-A Triple Output Isolated DC/DC
Converter For Logic Applications
SLTS166C - FEBRUARY 2002 - REVISED MARCH 2003
PT4851 Performance Characteristics (See Note A)
(Io1 =10A, Io2 =7.5A, Io3 =7.5A represents 100% Load)
PT4852 Performance Characteristics (See Note A)
(Io1 =10A, Io2 =7.5A, Io3 =7.5A represents 100% Load)
Efficiency vs Output Load
Efficiency vs Output Load
90
90
80
80
VIN
VIN
36V
36V
70
70
60
50
48V
48V
75V
75V
60
50
0
20
40
60
80
100
0
20
40
60
80
100
Output Load (%)
Output Load (%)
Power Dissipation vs Output Load
Power Dissipation vs Output Load
16
12
8
16
12
8
VIN
VIN
75V
36V
48V
75V
48V
36V
4
4
0
0
0
20
40
60
80
100
0
20
40
60
80
100
Output Load (%)
Output Load (%)
PT4851 Safe operating Area Curves (See Note B)
(Io1 + Io2 + Io3 =25A, represents 100% load)
PT4852 Safe operating Area Curves (See Note B)
(Io1 + Io2 + Io3 =25A, represents 100% load)
SOA vs Output Power @Vin =48V
SOA vs Output Power @Vin =48V
90
90
80
80
Airflow
Airflow
70
70
500LFM
500LFM
400LFM
400LFM
60
60
300LFM
300LFM
200LFM
200LFM
50
50
100LFM
100LFM
Nat conv
Nat conv
40
40
30
20
30
20
0
20
40
60
80
100
0
20
40
60
80
100
Output Load (%)
Output Load (%)
Note A: All Characteristic data in the above graphs has been developed from actual products tested at 25°C. This data is considered typical data for the ISR.
Note B: SOA curves represent operating conditions at which the internal components are at or below the manufacturer’s maximum rated operating temperatures.
For technical support and more information, see inside back cover or visit www.ti.com
Typical Characteristics
PT4850 Series
25-A Triple Output Isolated DC/DC
Converter For Logic Applications
SLTS166C - FEBRUARY 2002 - REVISED MARCH 2003
PT4853 Performance Characteristics (See Note A)
(Io1 =10A, Io2 =7.5A, Io3 =7.5A represents 100% Load)
PT4854 Performance Characteristics (See Note A)
(Io1 =10A, Io2 =7.5A, Io3 =7.5A represents 100% Load)
Efficiency vs Output Load
Efficiency vs Output Load
90
90
80
80
VIN
VIN
36V
36V
70
60
50
70
60
50
48V
75V
48V
75V
0
20
40
60
80
100
0
20
40
60
80
100
Output Load (%)
Output Load (%)
Power Dissipation vs Output Load
Power Dissipation vs Output Load
16
12
8
16
12
8
VIN
VIN
36V
48V
75V
75V
48V
36V
4
4
0
0
0
20
40
60
80
100
0
20
40
60
80
100
Output Power (%)
Output Load (%)
PT4853 Safe operating Area Curves (See Note B)
(Io1 + Io2 + Io3 =25A, represents 100% load)
PT4854 Safe operating Area Curves (See Note B)
(Io1 + Io2 + Io3 =25A, represents 100% load)
SOA vs Output Power @Vin =48V
SOA vs Output Power @Vin =48V
90
90
80
80
Airflow
Airflow
70
70
500LFM
500LFM
400LFM
400LFM
60
60
300LFM
300LFM
200LFM
200LFM
50
50
100LFM
100LFM
Nat conv
Nat conv
40
40
30
20
30
20
0
20
40
60
80
100
0
20
40
60
80
100
Output Load (%)
Output Load (%)
Note A: All Characteristic data in the above graphs has been developed from actual products tested at 25°C. This data is considered typical data for the ISR.
Note B: SOA curves represent operating conditions at which the internal components are at or below the manufacturer’s maximum rated operating temperatures.
For technical support and more information, see inside back cover or visit www.ti.com
Typical Characteristics
PT4850 Series
25-A Triple Output Isolated DC/DC
Converter For Logic Applications
SLTS166C - FEBRUARY 2002 - REVISED MARCH 2003
PT4855 Performance Characteristics (See Note A)
(Io1 =10A, Io2 =7.5A, Io3 =7.5A represents 100% Load)
Efficiency vs Output Load
90
80
VIN
36V
70
60
50
48V
75V
0
20
40
60
80
100
Output Load (%)
Power Dissipation vs Output Load
16
12
8
VIN
75V
48V
36V
4
0
0
20
40
60
80
100
Output Load (%)
PT4855 Safe operating Area Curves (See Note B)
(Io1 + Io2 + Io3 =25A, represents 100% load)
SOA vs Output Power @Vin =48V
90
80
Airflow
70
500LFM
400LFM
60
300LFM
200LFM
50
100LFM
Nat conv
40
30
20
0
20
40
60
80
100
Output Load (%)
Note A: All Characteristic data in the above graphs has been developed from actual products tested at 25°C. This data is considered typical data for the ISR.
Note B: SOA curves represent operating conditions at which the internal components are at or below the manufacturer’s maximum rated operating temperatures.
For technical support and more information, see inside back cover or visit www.ti.com
PT4856
25-A Triple Output Isolated DC/DC
Converter For Logic Applications
SLTS166C - FEBRUARY 2002 - REVISED MARCH 2003
PT4856 Electrical Specifications
(Unless otherwise stated, the operating conditions are:- Ta =25°C, Vin =48V, and Io =0.5Iomax)
PT4856 (Only)
Characteristics
Symbols
Conditions
Min
Typ
Max
Units
Output Current
Io
Each output
Io1
Io2
Io3
0
0
0
—
—
—
10
10
10
A
Iotot
Vin
Total (all three outputs)
Continuous
Surge (1 minute)
—
36
—
—
—
—
25
75
80
A
Input Voltage Range
V
Set-Point Voltage Tolerance
Temperature Variation
Line Regulation
Load Regulation
Cross Regulation
Votol
—
—
—
—
—
—
0.5
0.2
5
1.5
—
0.5
10
10
%Vo
%Vo
%Vo
mV
∆Regtemp
∆Regline
∆Regload
∆Regcross
∆Vo tol
–40°C ≤Ta ≤+85°C, Io1 =Io2 =Io3 =Iomin
All outputs, Over Vin range
Each output, 0≤Io≤Iomax
Any output vs. another
—
mV
Total Output Voltage Variation
Includes set-point, line, load,
(1)
—
2
3
%Vo
%
–40°C≤Ta ≤+85°C
Efficiency
η
Io1 =7A, Io2 =5A, Io3 =5A
—
88
—
Vo Ripple (pk-pk)
Vr
20MHz bandwidth,
Io1 =Io2 =Io3 =5A
Vo=5.0V
Vo=3.3V
Vo=1.5V
—
—
—
50
20
15
75
50
25
mVpp
Transient Response
ttr
0.1A/µs load step, 50% to 75% Iomax
Vo over/undershoot
—
—
200
5
—
—
µSec
%Vo
Vos
Output Adjust Range
Current Limit Threshold
Voadj
ILIM
Vo1/Vo2/Vo3
—
10
—
%Vo
∆Vo = –1%
Vo1
Vo2
Vo3
—
—
—
20
15
15
—
—
—
A
Output Over-Voltage Protection
Switching Frequency
OVP
ƒs
All outputs; module shutdown and latch off
Over Vin and Io ranges
—
280
125 (2)
320
—
340
%Vo
kHz
Under Voltage Lockout
Von
Voff
Vin increasing
Vin decreasing
—
30
34
32
36
—
V
Enable Control (pins 3 & 4)
High-Level Input Voltage
Low-Level Input Voltage
Referenced to –Vin (pin 2)
VIH
VIL
3.5
—
—
Open (3)
V
(3)
–0.2
0.8
Low-Level Input Current
IIL
—
—
—
0
0.5
2.5
2
—
mA
mA
µF
(1)
Standby Input Current
Iin standby
Cint
pins 3 & 4 open circuit
Per each output
4
Internal Input Capacitance
—
External Output Capacitance
Primary/Secondary Isolation
Cout
—
5,000
µF
V iso
C iso
Riso
1500
—
—
—
—
—
V
2,200
—
pF
MΩ
10
(4)
(4)
Temperature Sense
Vtemp
Output
voltage
at
temperatures:-–40°C
—
—
—
0.1
V
100°C
—
1.5
Notes: (1) Limits are specified by design.
(2) This is a fixed parameter. Adjusting Vo1 or Vo2 higher will increase the module’s sensitivity to over-voltage detection. For more information, see the
application note on output voltage adjustment.
(3) The Enable inputs (pins 3 & 4) have internal pull-ups. Leaving pin 4 open-circuit and connecting pin 3 to –Vin (pin 2) allows the the converter to
operate when input power is applied. The maximum open-circuit voltage for the Enable inputs is 5.4V.
(4) Voltage output at “TEMP” pin is defined by the equation:- VTEMP = 0.5 + 0.01·T, where T is in °C. See pin descriptions for more information.
For technical support and more information, see inside back cover or visit www.ti.com
Typical Characteristics
PT4856
25-A Triple Output Isolated DC/DC
Converter For Logic Applications
SLTS166C - FEBRUARY 2002 - REVISED MARCH 2003
PT4856 Performance Characteristics (See Note A)
(Io1 =10A, Io2 =7.5A, Io3 =7.5A represents 100% Load)
Efficiency vs Output Load
100
90
VIN
80
36V
48V
75V
70
60
50
0
20
40
60
80
100
Output Load (%)
Power Dissipation vs Output Load
25
20
15
10
5
VIN
75V
48V
36V
0
0
20
40
60
80
100
Output Load (%)
PT4856 Safe operating Area Curves (See Note B)
(Io1 + Io2 + Io3 =24A, represents 100% load)
SOA vs Output Power @Vin =48V
90
80
Airflow
70
60
50
40
30
20
300LFM
200LFM
100LFM
Nat Conv
0
20
40
60
80
100
Output Power (W)
Note A: All Characteristic data in the above graphs has been developed from actual products tested at 25°C. This data is considered typical data for the ISR.
Note B: SOA curves represent operating conditions at which the internal components are at or below the manufacturer’s maximum rated operating temperatures.
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes
PT4850 Series
Operating Features of the PT4850 Triple-Output
DC/DC Converters
Primary-Secondary Isolation
Over-Current Protection
The PT4850 series of DC/DC converters provide three
independently regulated logic output voltages, Vo1, Vo2,
and Vo3. Each output is current limited to protect against
load faults. The module will not be damaged by a con-
tinuous load fault applied to any output. Current will
continue to flow into the fault but is reduced as the volt-
age across the fault decreases towards zero.
The PT4850 series of DC/DC converters incorporate
electrical isolation between the input terminals (primary)
and the output terminals (secondary). All converters are
production tested to a withstand voltage of 1500VDC.
The isolation complies with UL60950 and EN60950,
and the requirements for operational isolation. This
allows the converter to be configured for either a positive
or negative input voltage source.
Applying a load fault above the current limit threshold
to any output causes the affected output to significantly
drop. Also load faults applied to Vo1 will affect Vo2 and
Vo3, once Vo1 drops to within 0.2V of either of these
voltages. However, load faults applied to Vo2 or Vo3 will
not affect the other outputs.
The regulation control circuitry for these modules is
located on the secondary (output) side of the isolation
barrier. Control signals are passed between the primary
and secondary sides of the converter via a proprietory
magnetic coupling scheme. This eliminates the use of
opto-couplers. The data sheet ‘Pin Descriptions’ and
‘Pin-Out Information’ provides guidance as to which
reference (primary or secondary) that must be used for
each of the external control signals.
Over-Temperature Protection
The PT4850 DC/DC converter series have an internal
temperature sensor, which monitors the temperature of
the module’s metal case. If the case temperature exceeds
the specified limit the converter will shut down. The
converter will automatically restart when the sensed
temperature returns to within the normal operating
range. The analog voltage generated by the sensor is
also made available at the ‘TEMP’ output (pin 5), and
can be monitored by the host system for diagnostic pur-
poses. Consult the ‘Pin Descriptions’ section of the data
sheet for more information on this feature.
Fuse Recommendations
If desired an input fuse may be added to protect against
the application of a reverse input voltage.
Under-Voltage Lock-Out
The Under-Voltage Lock-Out (UVLO) circuit prevents
operation of the converter whenever the input voltage to
the module is insufficient to maintain output regulation.
The UVLO has approximately 2V of hysterisis. This is
to prevent oscillation with a slowly changing input voltage.
Below the UVLO threshold the module is off and the
enable control inputs, EN1 and EN2 are inoperative.
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes
PT4850 Series
Using the On/Off Enable Controls on the PT4850
Series of Triple Output DC/DC Converters
pin 3 in order to enable the outputs of the converter.
An example of this configuration is detailed in Figure 2.
Note: The converter will only produce and output voltage if a
valid input voltage is applied to Vin.
The PT4850 (48V input) series of 25-A, triple-output
DC/DC converters incorporate two output enable controls.
EN1 (pin 3) is the Negative Enable input, and EN2 (pin 4)
is the Positive Enable input. Both inputs are electrically
referenced to -Vin (pin 2) on the primary or input side of
the converter. A pull-up resistor is not required, but may
be added if desired. Voltages of up to 70V can be safely
applied to the either of the Enable pins.
Figure 2; Negative Enable Configuration
DC/DC
Module
4
EN 2
3
EN 1*
BSS138
Automatic (UVLO) Power-Up
1 =Outputs On
Connecting EN1 (pin 3) to -Vin (pin 2) and leaving EN2
(pin 4) open-circuit configures the converter for auto-
matic power up. (See data sheet “Typical Application”).
The converter control circuitry incorporates an “Under
Voltage Lockout” (UVLO) function, which disables the
converter until the minimum specified input voltage is
present at Vin. (See data sheet Specifications). The UVLO
circuitry ensures a clean transition during power-up and
power-down, allowing the converter to tolerate a slow-
rising input voltage. For most applications EN1 and
EN2, can be configured for automatic power-up.
–VIN
2
–Vin
On/Off Output Voltage Sequencing
The power-up characteristic of the PT4850 series of
DC/DC converters meets the requirements of micro-
processor and DSP chipsets. All three outputs from the
converter are internally sequenced to power up in
unison. Figure 3 shows the waveforms from a PT4851
after power is applied to the input of the converter.
During power-up, all three output voltages rise together
until each reaches their respective output voltage. The
waveforms of Figure 3 were measured with loads of ap-
proximately 50% on each output, with an input source of
48VDC. The converter typically produces a fully regu-
lated output within 150ms.
Positive Output Enable (Negative Inhibit)
To configure the converter for a positive enable func-
tion, connect EN1 (pin 3) to -Vin (pin 2), and apply the
system On/Off control signal to EN2 (pin 4). In this
configuration, a low-level input voltage (-Vin potential)
applied to pin 4 disables the converter outputs. Figure 1
is an example of this configuration.
Figure 3; Vo1, Vo2, Vo3 Power-Up Sequence
Vo1 (1V/Div)
V02 (1V/Div)
Figure 1; Positive Enable Configuration
Vo3 (1V/Div)
DC/DC
Module
4
EN 2
3
EN 1*
BSS138
1 =Outputs Off
–VIN
2
–Vin
HORIZ SCALE: 20ms/Div
During turn-off, all outputs drop rapidly due to the
discharging effect of actively switched rectifiers. The
voltage at Vo2 remains higher than Vo3 during this
period. The discharge time is typically 100µs, but will
vary with the amount of external load capacitance.
Negative Output Enable (Positive Inhibit)
To configure the converter for a negative enable function,
EN2 (pin 4) is left open circuit, and the system On/Off
control signal is applied to EN1 (pin 3). A low-level
input voltage (-Vin potential) must then be applied to
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes
PT4850 Series
Adjusting the Output Voltages of the PT4850
Triple-Output DC/DC Converters
Table 3-1; Adjust Resistor Pin Connections
The output voltages of the PT4850 series of triple-output
DC/DC converters, Vo1, Vo2 and Vo3, are independently
adjustable. The adjustment method uses a single external
resistor, 1 which may be used to adjust a selected output
by up to 10% from the factory preset value. The value
of the resistor determines the magnitude of adjustment,
and the placement of the resistor determines the direction
of adjustment (up or down). The resistor values can be
calculated using the appropriate formula (see below),
using the constants provided in Table 3-2. Alternatively
the resistor value may be selected directly from Table 3-3
and Table 3-4, for Vo1 and Vo2/Vo3 respectively. The
placement of each resistor is as follows.
To Adjust Up
Connect R1
To Adjust Down
Connect (R2)
from
to
from
to
Vox Adj
COM
Vox Adj
Vox
Vo1
Vo2
Vo3
8
12
18
18
8
9
17
21
17
21
16
22
Calculation of Adjust Values
Adjust Up: To increase a specific output, add a resistor R1
between the appropriate Vx Adj (V1 Adj, V2 Adj, or V3 Adj)
and the output common (COM). See Figure 3-1(a)
and Table 3-1 for the resistor placement and pin connec-
tions.
The adjust resistor value may also be calculated using an
equation. In each case, the equation for R1 [Adjust Up] is
different to that for (R2) [Adjust Down]. For the PT4850
series, the following points should be noted.
• Vo1 uses different equations to Vo2 and Vo3. The
equations are defined for the desired output voltage.
Figure 3-1a
• The equations for Vo2 and Vo3 are based on the
percentage of desired adjustment. Both Vo2 and Vo3
use the same constants, which are common for all
output voltages.
PT4850
#
+Vox
+Vx Adj
COM
+Vox
(Adjusted Up)
Vo1 Adjust:
#
#
2.5 Ro
Va – Vo
R1 [Adjust Up] 3
=
=
– Rs kΩ
– Rs kΩ
R1
Output
Common
Ro (Va – 2.5 )
Vo – Va
3
(R2) [Adjust Down]
#
- See Table 3-1 for pin connections,
where Vox equals Vo 1, Vo2, or Vo3
Where: Vo = Original output voltage
Va = Adjusted output voltage
Ro = The resistance value in Table 3-2
Rs = The series resistance from Table 3-2
Adjust Down: Add a resistor (R2), between the appropriate
Vx Adj (V1 Adj, V2 Adj, or V3 Adj) and the output being
adjusted, +Vox. See Figure 3-1(b) and Table 3-1 for the
resistor placement and pin connections.
Vo2 / Vo3 Adjust:
Figure 3-1b
50 · Ro
n%
3
R1 [Adjust Up]
=
=
–Rs
kΩ
PT4850
#
(50 – n%)
(R2) [Adjust Down] 3
Ro ·
–Rs kΩ
+Vox
+Vx Adj
COM
+Vox
n%
(Adjusted Down)
(R2)
Where: Ro = The resistance value in Table 3-2
Rs = The series resistance from Table 3-2
n% = The desired adjustment from the
nominal (in percent)
#
#
Output
Common
#
- See Table 3-1 for pin connections,
where Vox equals Vo 1, Vo2, or Vo3
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes continued
PT4850 Series
Notes:
1. Use only a single 1% (or better) tolerance resistor in
either the R1 or (R2) location to adjust a specific output.
Place the resistor as close to the ISR as possible.
2. Never connect capacitors to any of the ‘Vox Adj’ pins. Any
capacitance added to these control pins will affect the
stability of the respective regulated output.
3. Adjustments made to any output must also comply with
the following limitations.
Vo1
Vo1
≥ (Vo2 + 0.5V), and
≥ (Vo3 + 0.5V)
Table 3-2
ADJUSTMENT RANGE AND FORMULA PARAMETERS
Vo1 Bus
Vo2 / Vo3 Bus
Vo(nom)
Va(min)
Va(max)
Ro (kΩ)
Rs (kΩ)
5.0V
4.5V
5.5V
4.99
4.99
3.3V
2.97V
3.63V
4.42
All
Vnom – 10%
Vnom + 10%
2.1
4.99
4.99
Table 3-3
Table 3-4
ADJUSTMENT RESISTOR VALUES FOR Vo1 Bus
ADJUSTMENT RESISTOR VALUES FOR Vo2 / Vo3 Buses
Adj. Resistors
R1/(R2)
Vo (nom)
% Adjust
–10
– 9
– 8
– 7
– 6
– 5
– 4
– 3
– 2
– 1
0
+ 1
+ 2
+ 3
+ 4
+ 5
3.3V
2.5V
1.8V
1.5V
1.2V
Vo(nom)
Va(req’d)
3.0
3.05
3.1
3.15
3.2
3.25
3.3
3.35
3.4
3.45
3.5
3.55
3.6
•
3.3V
5.0V
——————— Adjusted Output Voltage ———————
R1/(R2)
(3.4)kΩ
(4.6)kΩ
(6.0)kΩ
(7.9)kΩ
(10.4)kΩ
(13.9)kΩ
(19.2)kΩ
(27.9)kΩ
(45.4)kΩ
(97.9)kΩ
2.97
2.25
2.275
2.3
2.325
2.35
2.375
2.4
2.425
2.45
2.475
2.5
2.525
2.55
2.575
2.6
1.62
1.35
1.365
1.38
1.395
1.41
1.425
1.44
1.455
1.47
1.485
1.5
1.515
1.53
1.545
1.56
1.08
(2.4)kΩ
(4.7)kΩ
(8.3)kΩ
(14.2)kΩ
(26.0)kΩ
(61.3)kΩ
3.003
3.036
3.069
3.102
3.135
3.168
3.201
3.234
3.267
3.3
3.333
3.366
3.399
3.432
3.465
3.498
3.531
3.564
3.597
3.630
1.638
1.656
1.674
1.692
1.71
1.728
1.746
1.764
1.782
1.8
1.818
1.836
1.854
1.872
1.89
1.908
1.926
1.944
1.962
1.98
1.092
1.104
1.116
1.128
1.14
1.152
1.64
1.176
1.188
1.2
1.212
1.224
1.236
1.248
1.26
1.272
1.284
1.296
1.308
1.32
216.0kΩ
106.0kΩ
68.7kΩ
50.3kΩ
39.2kΩ
31.8kΩ
100.0kΩ
47.5kΩ
30.0kΩ
21.3kΩ
16.0kΩ
12.5kΩ
10.0kΩ
8.1kΩ
4.5
4.6
4.7
4.8
4.9
5.0
(15.0)kΩ
(21.2)kΩ
(31.6)kΩ
(52.4)kΩ
(115.0)kΩ
2.625
2.65
2.675
2.7
2.725
2.75
1.575
1.58
1.605
1.62
1.635
1.65
+ 6
+ 7
+ 8
+ 9
6.7kΩ
5.5kΩ
+10
5.1
5.2
5.3
5.4
120.0kΩ
57.4kΩ
36.6kΩ
26.2kΩ
20.0kΩ
R1 = Black, R2 = (Blue)
5.5
R1 = Black, R2 = (Blue)
For technical support and more information, see inside back cover or visit www.ti.com
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