PT5521A [TI]

1.5-A 5-V/3.3-V Input Adjustable Integrated Switching Regulator; 1.5 -A 5 -V / 3.3 - V输入可调集成开关稳压器
PT5521A
型号: PT5521A
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

1.5-A 5-V/3.3-V Input Adjustable Integrated Switching Regulator
1.5 -A 5 -V / 3.3 - V输入可调集成开关稳压器

稳压器 开关
文件: 总9页 (文件大小:185K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PT5520 Series  
1.5-A 5-V/3.3-V Input Adjustable  
Integrated Switching Regulator  
SLTS147A  
(Revised 10/5/2001)  
Features  
Single-Device: 5V/3.3V Input  
DSP Compatible  
89% Efficiency  
Small Footprint  
Space-Saving package  
Adjustable Output Voltage  
Output Inhibit Function  
Short Circuit Protection  
Solderable Copper Case  
Description  
Ordering Information  
PT 5521¨ =3.3Volts  
PT 5522¨ =2.5Volts  
PT 5523¨ =2.0Volts  
PT 5524¨ =1.8Volts  
PT 5525¨ =1.5Volts  
PT 5526¨ =1.2Volts  
PT 5527¨ =1.0Volts  
Pin-Out Information  
Pin Function  
The PT5520 Excalibur™ power modules  
are a series of high-performance Integrated  
Switching Regulators (ISRs). Rated 1.5A,  
these modules operate from input voltages as  
low as 3.1V to provide a local step-down  
power source. They are an ideal compliment  
to the industrys latest high-performance DSPs  
and microprocessors. The series includes  
output voltage options as low as 1.0VDC.  
The PT5520 series is packaged in a 5-pin  
thermally efficient copper case. The case is  
solderable, has a small footprint, and can  
accommodate both through-hole and surface  
mount pin configurations.  
1
2
3
4
5
Inhibit *  
V
in  
GND  
Vo  
Vo Adjust  
* For Inhibit pin:  
Open = output enabled  
Ground = output disabled  
PT Series Suffix  
(PT1234x)  
Case/Pin  
Configuration  
O rder  
Suffix  
Package  
Code  
Vertical  
Horizontal  
SMD  
N
A
C
(EFK)  
(EFL)  
(EFM)  
(Reference the applicable package code draw-  
ing for the dimensions and PC board layout)  
The product features external output  
voltage adjustment, an inhibit function, and  
short circuit protection. A 100µF capacitor  
is required for proper operation.  
Standard Application  
INH  
VOADJ  
1
5
PT5520  
3
+VIN  
4
+VO  
2
+
C 1  
C2  
C O M  
C O M  
C
C
= Optional 1µF ceramic  
= Required 100µF (See Notes)  
1
2
For technical support and more information, see inside back cover or visit www.ti.com  
PT5520 Series  
1.5-A 5-V/3.3-V Input Adjustable  
Integrated Switching Regulator  
Specifications (Unless otherwise stated, Ta =25°C, Vin =5V,Cout =100µF, and Io =Iomax)  
PT5520 SERIES  
Typ  
Characteristics  
Symbols  
Conditions  
Min  
Max  
Units  
Output Current  
InputVoltageRange  
Io  
Vin  
Over Vin range  
Over Io range  
0.1 (1)  
=3.3V4.5  
1.5  
5.5  
A
V
Vo  
Vo2.5V3.1  
5.5  
Set-PointVoltageTolerance  
TemperatureVariation  
Line Regulation  
Load Regulation  
TotalOutputVariation  
Vo tol  
0.5  
2
6
%Vo  
%Vo  
mV  
Regtemp  
Regline  
Regload  
Regtot  
–40°C <Ta <+85°C  
Over Vin range  
Over Io range  
10  
mV  
Includes set-point, line, load,  
3
%Vo  
–40°C Ta +85°C  
Efficiency  
η
PT5521  
PT5522  
PT5523  
PT5524  
PT5525  
PT5526  
PT5527  
89  
86  
84  
83  
81  
79  
76  
%
Vo Ripple (pk-pk)  
Vr  
20MHz bandwidth  
15  
30  
mV  
Transient Response  
ttr  
Vtr  
1A/µs load step from 50% to 100% Iomax  
Vo over/undershoot  
50  
50  
100  
µSec  
mV  
Current Limit  
Switching Frequency  
Ilim  
ƒo  
4
A
kHz  
Over Vin and Io ranges  
600 (2)  
Inhibit Control (pin1)  
InputHighVoltage  
InputLowVoltage  
Input Low Current  
(3)  
V IH  
V IL  
IIL  
Cout  
T
a
Referenced to GND (pin3)  
Pin 1 to GND  
Vin –0.5  
–0.2  
Open  
0.5  
V
–0.5  
mA  
µF  
°C  
(4)  
External Capacitance  
100  
Absolute Maximum  
Over Vin range  
Per Mil-STD-883D, Method 2002.3 , 1 msec,  
Half Sine, mounted to a fixture  
–40 (5)  
+85 (6)  
Operating Temperature Range  
Storage Temperature  
Mechanical Shock  
T
s
-40  
500  
+125  
°C  
Gs  
MechanicalVibration  
Per Mil-STD-883D, Method 2007.2,  
20-2000 Hz, Soldered in a PC board  
(7)  
15  
Gs  
grams  
Weight  
Flammability  
6.5  
Materials meet UL 94V-0  
Notes: (1) The ISR will operate down to no load with reduced specifications.  
(2) This is a typical value only. The switching frequency will vary with input voltage.  
(3) The Inhibit control (pin 1) has an internal pull-up, and if left open-circuit the module will operate when input power is applied. A small low-leakage  
(<100nA) MOSFET is recommended to control this input. Ensure an On/Off transition time of 10µs. See application notes for more information.  
(4) The PT5520 Series requires a 100µF electrolytic or tantalum output capacitor for proper operation in all applications.  
(5) For operation below 0°C, the output capacitor C2 must have stable characteristics. Use either a low ESR tantalum or Oscon® capacitor.  
(6) See SOA curves or consult factory for the appropriate derating.  
(7) The case pins on the through-hole package types (suffixes N & A) must be soldered. For more information see the applicable package outline drawing.  
For technical support and more information, see inside back cover or visit www.ti.com  
Typical Characteristics  
PT5520 Series  
1.5-A 5-V/3.3-V Input Adjustable  
Integrated Switching Regulator  
Performance Data; Vin =5.0V (See Note A)  
Performance Data; Vin =3.3V (See Note A)  
Efficiency vs Output Current  
Efficiency vs Output Current  
100  
90  
80  
70  
60  
50  
40  
100  
90  
80  
70  
60  
50  
40  
PT5521  
PT5522  
PT5523  
PT5524  
PT5525  
PT5526  
PT5527  
PT5522  
PT5523  
PT5524  
PT5525  
PT5526  
PT5527  
0
0.3  
0.6  
0.9  
1.2  
1.5  
0
0.3  
0.6  
0.9  
1.2  
1.5  
Iout (A)  
Iout (A)  
Ripple vs Output Current  
Ripple vs Output Current  
20  
15  
10  
5
20  
15  
10  
5
PT5522  
PT5523  
PT5524  
PT5521  
PT5525  
PT5526  
PT5527  
PT5522  
PT5523  
PT5524  
PT5525  
PT5526  
PT5527  
0
0
0
0.3  
0.6  
0.9  
1.2  
1.5  
0
0.3  
0.6  
0.9  
1.2  
1.5  
Iout (A)  
Iout (A)  
Power Dissipation vs Output Current  
Power Dissipation vs Output Current  
1
0.8  
0.6  
0.4  
0.2  
0
0.75  
0.6  
0.45  
0.3  
0.15  
0
PT5521  
PT5522  
PT5523  
PT5524  
PT5525  
PT5526  
PT5527  
PT5522  
PT5523  
PT5524  
PT5525  
PT5526  
PT5527  
0
0.3  
0.6  
0.9  
1.2  
1.5  
0
0.3  
0.6  
0.9  
1.2  
1.5  
Iout (A)  
Iout (A)  
Safe Operating Area; Vin =5.0V (See Note B)  
Safe Operating Area; Vin =3.3V (See Note B)  
90.0  
80.0  
70.0  
60.0  
50.0  
40.0  
30.0  
20.0  
90.0  
80.0  
70.0  
60.0  
50.0  
40.0  
30.0  
20.0  
Airflow  
200LFM  
120LFM  
60LFM  
200LFM  
120LFM  
60LFM  
Nat conv  
Nat conv  
0.0  
0.3  
0.6  
0.9  
1.2  
1.5  
0.0  
0.3  
0.6  
0.9  
1.2  
1.5  
Iout (A)  
Iout (A)  
Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the ISR.  
Note B: SOA curves represent operating conditions at which internal components are at or below manufacturer’s maximum rated operating temperatures.  
For technical support and more information, see inside back cover or visit www.ti.com  
Application Notes  
PT5500/5520 Series  
Adjusting the Output Voltage of the PT5500/20  
Series of Excalibur Step-Down ISRs  
Notes:  
The output voltage of both the PT5500 and PT5520  
series ISRs may be adjusted higher or lower than the  
factory trimmed pre-set voltage with the addition of a  
single external resistor. Table 1 accordingly gives the  
allowable adjustment range for each model for either  
series as Va (min) and Va (max).  
1. Use only a single 1% resistor in either the (R1) or R2  
location. Place the resistor as close to the ISR as possible.  
2. Never connect capacitors from Vo adj to either GND or  
Vout. Any capacitance added to the Vo adjust pin will  
affect the stability of the ISR.  
3. For each model, adjustments to the output voltage may  
place additional limits on the minimum input voltage.  
The revised minimum input voltage must comply with the  
following requirement.  
Adjust Up:  
An increase in the output voltage is obtained by  
adding a resistor R2, between pin 5 (Vo adj) and pin 3 (GND).  
Vin(min) = (Va + 0.5)V or as specified in the data sheet,  
whichever is greater.  
Adjust Down: Add a resistor (R1), between pin 5 (Vo adj) and  
pin 4 (Vout).  
Figure 1  
2
4
V in  
V o  
+VIN  
PT5500  
+VO  
GND  
Vo(adj)  
3
5
(R1)  
Adj Down  
C1  
C2  
+
1
µF  
Ceramic  
100µF  
(Optional)  
(Req'd)  
R2  
Adjust Up  
C O M  
C O M  
The values of (R1) [adjust down], and R2 [adjust up], can  
also be calculated using the following formulas. Refer to  
Figure 1 and Table 2 for both the placement and value of the  
required resistor; either (R1) or R2 as appropriate.  
Ro (Va – 0.9)  
(R1)  
=
=
– Rs  
– Rs  
kΩ  
kΩ  
Vo – Va  
0.9 Ro  
Va – Vo  
R2  
Where:  
Vo = Original output voltage  
Va = Adjusted output voltage  
Ro = The resistance value from Table 1  
Rs = The series resistance from Table 1  
Table 1  
ISR ADJUSTMENT RANGE AND FORMULA PARAMETERS  
3.0 Adc Rated  
1.5 Adc Rated  
PT5501  
PT5521  
PT5502  
PT5522  
PT5503  
PT5523  
PT5504  
PT5524  
PT5505  
PT5525  
PT5506  
PT5526  
PT5507  
PT5527  
V
o
V
a
V
a
R
o
R
s
(nom)  
(min)  
(max)  
(k)  
3.3  
2.88  
3.5  
2.5  
1.97  
2.95  
10.0  
20.0  
2.0  
1.64  
2.45  
10.0  
20.0  
1.8  
1.5  
1.5  
1.3  
1.2  
1.08  
1.65  
10.0  
20.0  
1.0  
0.97  
1.45  
10.2  
20.0  
2.25  
10.0  
20.0  
1.95  
10.0  
20.0  
10.0  
49.9  
(k)  
For technical support and more information, see inside back cover or visit www.ti.com  
Application Notes continued  
PT5500/5520 Series  
Table 2  
ISR ADJUSTMENT RESISTOR VALUES  
3.0 Adc Rated  
1.5 Adc Rated  
Vo (nom)  
PT5501  
PT5521  
3.3  
PT5502  
PT5522  
2.5  
PT5503  
PT5523  
2.0  
PT5504  
PT5524  
1.8  
PT5505  
PT5525  
1.5  
PT5506  
PT5526  
1.2  
PT5507  
PT5527  
1.0  
Va (req.d)  
0.97  
1.0  
(0.0)kΩ  
1.05  
1.1  
164.0kΩ  
72.8kΩ  
41.2kΩ  
25.9kΩ  
16.7kΩ  
10.6kΩ  
6.2kΩ  
(0.0)kΩ  
1.15  
1.2  
(30.0)kΩ  
1.25  
1.3  
160.0kΩ  
70.0kΩ  
40.0kΩ  
25.0kΩ  
16.0kΩ  
10.0kΩ  
5.7kΩ  
(0.0)kΩ  
(10.0)kΩ  
(30.0)kΩ  
(90.0)kΩ  
1.35  
1.4  
3.0kΩ  
1.45  
1.5  
0.4kΩ  
(0.0)kΩ  
(6.0)kΩ  
1.55  
1.6  
160.0kΩ  
70.0kΩ  
40.0kΩ  
25.0kΩ  
16.0kΩ  
10.0kΩ  
5.7kΩ  
(15.0)kΩ  
(30.0)kΩ  
(60.0)kΩ  
(150.0)kΩ  
2.5kΩ  
1.65  
1.7  
(1.4)kΩ  
(6.7)kΩ  
0.0kΩ  
1.75  
1.8  
(14.0)kΩ  
(25.0)kΩ  
(43.3)kΩ  
(80.0)kΩ  
(190.0)kΩ  
1.85  
1.9  
160.0kΩ  
70.0kΩ  
40.0kΩ  
25.0kΩ  
16.0kΩ  
10.0kΩ  
5.7kΩ  
2.5kΩ  
1.95  
2.0  
0.0kΩ  
(2.0)kΩ  
(5.6)kΩ  
2.05  
2.1  
160.0kΩ  
70.0kΩ  
0.0kΩ  
(10.0)kΩ  
(15.7)kΩ  
(23.3)kΩ  
(34.0)kΩ  
(50.0)kΩ  
(76.7)kΩ  
(130.0)kΩ  
(284.0)kΩ  
2.15  
2.2  
25.0kΩ  
16.0kΩ  
10.0kΩ  
5.7kΩ  
2.5kΩ  
2.25  
2.3  
0.0kΩ  
2.35  
2.4  
2.5kΩ  
2.45  
2.5  
0.0kΩ  
2.55  
2.6  
160.0kΩ  
70.0kΩ  
40.0kΩ  
25.0kΩ  
16.0kΩ  
10.0kΩ  
5.7kΩ  
2.65  
2.7  
2.75  
2.8  
2.85  
2.9  
(0.0kΩ  
(8.5)kΩ  
2.5kΩ  
2.95  
3.0  
0.0kΩ  
(20.1)kΩ  
(36.1)kΩ  
(60.1)kΩ  
(100.0)kΩ  
(180.0)kΩ  
(420.0)kΩ  
3.05  
3.1  
3.15  
3.2  
3.25  
3.3  
3.35  
3.4  
130.0kΩ  
40.1kΩ  
3.45  
3.48  
R1 = (Blue)  
10.1kΩ  
0.0kΩ  
R2 = Black  
For technical support and more information, see inside back cover or visit www.ti.com  
Application Notes  
PT5500/5520 Series  
Using the Inhibit Control on the PT5500/PT5520  
Series of Excalibur Step-Down ISRs  
For applications requiring output voltage On/Off control,  
both the PT5500 and PT5520 series of power modules  
incorporate an inhibit function. This function can be used  
for power-up sequencing or wherever there is a require-  
ment for the module to be switched off. The On/Off  
function is provided by the Inhibit (pin 1) control.  
Turn-On Time: In the circuit of Figure 1, turning Q1 on applies  
a low-voltage to the Inhibit control (pin 1) and disables the  
regulator output. Correspondingly, turning Q1 off allows the  
Inhibit control pin to be pulled high by its internal pull-up  
resistor. The ISR produces a fully regulated output voltage  
within 10-msec of the release of the Inhibit control pin. The  
actual turn-on time will vary with input voltage, output  
load, and the total amount of load capacitance. Figure 2  
shows the typical rise in both output voltage and input  
current for a PT5502 (2.5V) following the turn-off of Q1 at  
time t =0. The waveform was measured with a 5Vdc input  
voltage, and 2.5A resistive load.  
The ISR functions normally with Pin 1 open-circuit,  
providing a regulated output whenever a valid source  
2
voltage is applied to Vin, (pin 2). When a low-level  
ground signal is applied to pin 1, the regulator output  
will be disabled.  
Figure 1 shows an application schematic, which details  
the typical use of the Inhibit function. Note the discrete  
transistor (Q1). The Inhibit control has its own internal  
pull-up to +Vin potential. An open-collector or open-  
drain device is required to control this pin.  
Figure 2  
Vo (1V / Div)  
The Inhibit pin control thresholds are given in Table 1.  
Equation 1 may be used to determine the approximate  
current drawn from the input source, and by Q1 when the  
regulator is in the inhibit state.  
IIN (1A / Div)  
VINH (5V / Div)  
Table 1; Inhibit Control Requirements  
Parameter  
Enable (V  
Min  
– 0.5  
Max  
)
V
Open  
IH  
in  
–0.2V+0.5V  
-1  
0
1
2
3
4
5
6
7
8
Disable (V  
)
IL  
t (milli-secs)  
Equation 1  
Notes:  
Iinh  
= Vin ÷ 10kΩ  
20%  
1. Use an open-collector device (preferably a discrete  
transistor) for the Inhibit input. A pull-up resistor is not  
necessary. To disable the output voltage, the control pin  
should be pulled low to less than +0.5VDC.  
2. Do not control the Inhibit input with an external DC  
voltage. This will lead to erratic operation of the ISR and  
may over-stress the regulator.  
Figure 1  
5. Avoid capacitance greater than 500pF at the Inhibit  
control pin. Excessive capacitance at this pin will cause  
the ISR to produce a pulse on the output voltage bus at  
turn-on.  
+VIN  
+VO  
2
4
Vin PT5502  
INH G N D  
V o  
1
3
C1,  
(Optional)  
1µF  
+
C2  
6. Keep the On/Off transition to less than 10µs. This  
prevents erratic operation of the ISR, which could cause a  
momentary high output voltage.  
100µF  
Q1  
BSS138  
Inhibit  
COM  
COM  
For technical support and more information, see inside back cover or visit www.ti.com  
PACKAGE OPTION ADDENDUM  
www.ti.com  
28-Aug-2012  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
PT5521A  
PT5521C  
PT5522A  
PT5522C  
PT5523A  
PT5523C  
PT5523N  
PT5524A  
PT5525A  
PT5525C  
PT5526A  
PT5526C  
PT5527A  
PT5527C  
PT5527N  
NRND  
NRND  
NRND  
NRND  
NRND  
NRND  
NRND  
NRND  
NRND  
NRND  
NRND  
NRND  
SIP MODULE  
SIP MODULE  
SIP MODULE  
SIP MODULE  
SIP MODULE  
SIP MODULE  
SIP MODULE  
SIP MODULE  
SIP MODULE  
SIP MODULE  
SIP MODULE  
SIP MODULE  
EFL  
EFM  
EFL  
EFM  
EFL  
EFM  
EFK  
EFL  
EFL  
EFM  
EFL  
EFM  
EFL  
EFM  
EFK  
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
30  
30  
30  
30  
30  
30  
Pb-Free (RoHS)  
Pb-Free (RoHS)  
Pb-Free (RoHS)  
Pb-Free (RoHS)  
Pb-Free (RoHS)  
Pb-Free (RoHS)  
TBD  
Call TI  
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N / A for Pkg Type  
Level-3-215C-168HRS  
N / A for Pkg Type  
Level-3-215C-168HRS  
N / A for Pkg Type  
Level-3-215C-168HRS  
Call TI  
30  
30  
30  
30  
30  
Pb-Free (RoHS)  
Pb-Free (RoHS)  
Pb-Free (RoHS)  
Pb-Free (RoHS)  
Pb-Free (RoHS)  
TBD  
N / A for Pkg Type  
N / A for Pkg Type  
Level-3-215C-168HRS  
N / A for Pkg Type  
Level-3-215C-168HRS  
Call TI  
OBSOLETE SIP MODULE  
NRND  
NRND  
SIP MODULE  
SIP MODULE  
TBD  
Call TI  
TBD  
Call TI  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
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28-Aug-2012  
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Addendum-Page 2  
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