PT5804 [TI]
18A Output Current;
| 型号： | PT5804 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 18A Output Current |
| 文件： | 总11页 (文件大小：200K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PT5800 Series
18-A 5-V Input Adjustable
Integrated Switching Regulator
SLTS171A JANUARY 2003 - REVISED - MARCH 2003
Features
• 5V Input
• Over-Current Protection
• Over-Temperature Protection
• Small Footprint
• 18A Output Current
• DSP Compatible
• Low-Profile (8mm)
(0.736 in², Suffix ‘N’)
• >90% Efficiency
• Surface Mount Compatible
• IPC Lead Free 2
• Output Margin Control ( 5%)
• Adjustable Output Voltage
• On/Off Inhibit Function
• Pre-Bias Startup Capability
Description
Pin-Out Information
Ordering Information
Pin Function
PT5801r = 3.3 Volts
PT5802r = 2.5 Volts
PT5803r = 1.8 Volts
PT5804r = 1.5 Volts
PT5805r = 1.2 Volts
PT5806r = 1.0 Volts
The PT5800 Excalibur™ series of integrated
switching regulators (ISRs) combines outstand-
ing power density with a comprehensive list of
features. They are an ideal choice for applications
where board space is a premium and performance
cannot be compromised. These modules provide
18A of output current, yet are housed in a low-
profile, 18-pin package that is almost half the
size of the previous product generation. The
integral copper case construction requires no
heatsink, and offers the advantages of solderabil-
ity and a small footprint (0.736 in² for suffix ‘N’).
Both through-hole and surface mount pin con-
figurations are available.
The PT5800 series operates from a 5-V input
bus and provides a convenient point-of-load power
source for the industry’s latest high-performance
DSPs and microprocessors. The series includes
output voltage options as low as 1.0VDC.
Other features include external output voltage
adjustment, a 5% margin control, on/off inhibit,
short circuit protection, thermal shutdown, and a
differential remote sense.
1
2
3
Vo Adjust
Inhibit*
Margin Dn*
Margin Up*
Vin
4
5
6
Vin
7
Vin
8
Sense(–)
GND
GND
GND
GND
GND
Vout
PT Series Suffix
(PT1234x)
9
Case/Pin
Configuration
Order
Suffix
Package
10
11
12
13
14
15
16
17
18
Code
Vertical
Horizontal
SMD
N
A
C
(EPP)
(EPQ)
(EPS)
(Reference the applicable package code draw-
ing for the dimensions and PC board layout)
Vout
Vout
Vout
Sense(+)
* Denotes negative logic:
Open = Normal operation
Ground = Function active
Standard Application
Margin Dn
Margin Up
Vo Adjust
Sense(+)
1
4
3
18
VOUT
5, 6, 7
14–17
VIN
PT5800
+
+
2
9–13
8
CIN
COUT
L
O
A
D
820µF
(Required)
330µF
(Required)
Sense(–)
Inhibit
GND
Cin = Required 820µF
Cout = Required 330µF
GND
For technical support and more information, see inside back cover or visit www.ti.com
PT5800 Series
18-A 5-V Input Adjustable
Integrated Switching Regulator
SLTS171A JANUARY 2003 - REVISED - MARCH 2003
Specifications (Unless otherwise stated, Ta =25°C, Vin =5V, Cin =820µF, Cout =330µF, and Io =Iomax)
PT5800 SERIES
Characteristics
Symbols
Conditions
Min
Typ
Max
Units
Output Current
Io
Vin
Vin =5V
Over Io range
0
—
—
—
0.5
8
18
5.5
2
—
—
—
A
V
%Vo
%Vo
mV
mV
Input Voltage Range
Set-Point Voltage Tolerance
Temperature Variation
Line Regulation
Load Regulation
Total Output Variation
4.5
—
—
—
—
Vo tol
∆Regtemp
∆Regline
∆Regload
∆Regtot
–40°C <Ta < +85°C
Over Vin range
Over Io range
5
Includes set-point, line, load,
—
—
3
%Vo
–40°C ≤ Ta ≤ +85°C
Efficiency
η
Io =12A
PT5801 (3.3V)
PT5802 (2.5V)
PT5803 (1.8V)
PT5804 (1.5V)
PT5805 (1.2V)
PT5806 (1.0V)
—
—
—
—
—
—
94
92
90
88
86
84
—
—
—
—
—
—
%
Vo Ripple (pk-pk)
Vr
20MHz bandwidth
—
20
—
mVpp
Transient Response
1A/µs load step, 50 to 100% Iomax,
ttr
Recovery Time
—
—
—
—
—
50
—
—
—
—
—
µSec
mV
A
∆Vtr
Vo over/undershoot
Reset, followed by auto-recovery
100
Over-Current Threshold
Output Voltage Adjust
ITRIP
Vo adj
30
15
5
(1)
With Vo Adjust
%
With Margin Up/Dn
Switching Frequency
ƒs
Over Vin and Io ranges
250
300
350
kHz
Inhibit Control (pin 2)
Input High Voltage
Input Low Voltage
Referenced to GND (pins 9–13)
(2)
VIH
VIL
IIL
Vin –0.5
–0.2
—
—
—
—
–10
5
—
—
—
110
—
—
Open
0.8
—
—
—
V
Input Low Current
Pin 2 to GND
Pin 2 to GND
µA
mA
µF
µF
°C
°C
°C
°C
Standby Input Current
External Input Capacitance
External Output Capacitance
Operating Temperature Range
Over-Temperature Protection
Solder Reflow Temperature
Storage Temperature
Iin standby
Cin
Cout
(3)
820
(4)
330
5,000
(4)
(5)
T
Over Vin range
–40
85
a
OTP
Treflow
T
s
Measured at center of case, auto-reset
Surface temprature of module pins or case
—
—
—
–40
—
215
125
(6)
Reliability
MTBF
Per Bellcore TR-332
6
5.8
—
—
10 Hrs
50% stress, Ta =40°C, ground benign
Mechanical Shock
Mil-STD-883D, Method 2002.3
Half Sine, mounted to a fixture
—
500
—
G
(7)
(7)
Mechanical Vibration
Mil-STD-883D, Method 2007.2,
20-2000 Hz, PCB mounted
Suffix N
Suffixes A, C
—
—
20
20
—
—
G
Weight
Flammability
—
—
—
—
20
—
grams
Materials meet UL 94V-0
Notes: (1) This is a typical value. For the adjustment limits of a specific model consult the related application note on output voltage adjustment.
(2) The Inhibit control (pin 2) has an internal pull-up to Vin, and if left open-circuit the module will operate when input power is applied. A small low-
leakage (<100nA) MOSFET is recommended to control this input. See application notes for more information.
(3) An 820µF electrolytic input capacitor is required for proper operation. This capacitor must be rated for a minimumm of 0.7 Arms of ripple current.
(4) For operation below 0°C, COUT must have stable characteristics. Use either low-ESR tantalum or Oscon® type capacitors.
(5) See SOA curves or consult factory for the appropriate derating.
(6) During solder reflow of SMD package version do not elevate the module case, pins, or internal component temperatures above a peak of 215°C. For
further guidance refer to the application note, “Reflow Soldering Requirements for Plug-in Power Surface Mount Products,” (SLTA051)
(7) The case pins on the through-hole package types (suffixes N & A) must be soldered. For more information see the applicable package outline drawing.
For technical support and more information, see inside back cover or visit www.ti.com
PT5800 Series
18-A 5-V Input Adjustable
Integrated Switching Regulator
SLTS171A JANUARY 2003 - REVISED - MARCH 2003
Pin Descriptions
Vin: The positive supply voltage input for the module
with respect to the common ground (GND).
left open circuit, the output will be active whenever a
valid input source is applied.
Vout: This is the regulated output voltage from the mod-
ule with respect to the common ground (GND).
Vo Adjust: This pin is used to trim the output voltage
over a typical range of 15% of nominal. The adjust-
ment method uses an external resistor. The resistor is
connected from Vo Adjust to either the (-)Sense or (+)Sense,
in order to adjust the output either up or down, respec-
tively. Consult the related application note for the adjust
limits of a specific part.
GND: The common ground node to which the input,
output, and external control signals are referenced.
Sense(–): Provides the regulator with the ability to sense
the set-point voltage directly across the load. For opti-
mum output voltage accuracy this pin should always be
connected to GND, even for applications that demand a
relatively light load.
Margin Dn*: When this open-collector (open-drain) input
is asserted to GND, the output voltage is automatically
decreased by 5% from the nominal. This feature is used in
applications where the load circuit must be tested for
operation at the extreme values of its supply voltage
tolerance.
Sense(+): When used with Sense(–), the regulation circuitry
will compensate for voltage drop between the converter
and the load. The pin may be left open circuit, but con-
necting it to Vout will optimize load regulation.
Margin Up*: This is an open-collector (open-drain) input.
When this is asserted to GND, the output voltage is
automatically increased by 5% from the nominal.
Inhibit*: This is an open-collector (open-drain) negative
logic input, referenced to GND. Pulling this pin to
GND disables the module’s output voltage. If Inhibit* is
Typical Characteristics
Performance Data; Vin =5V (See Note A)
Efficiency vs Output Current
Power Dissipation vs Output Current
100
6
5
4
3
2
1
0
90
PT5801
80
70
60
50
PT5802
PT5803
PT5804
PT5805
PT5806
0
3
6
9
12
15
18
0
3
6
9
12
15
18
Iout (A)
Iout (A)
Safe Operating Curves; Vin =5V (See Note B)
Output Ripple vs Output Current
50
40
30
20
10
0
90
80
70
60
50
40
30
20
Airflow
PT5802
PT5801
PT5803
PT5804
PT5805
PT5806
200LFM
120LFM
60LFM
Nat conv
0
3
6
9
12
15
18
0
3
6
9
12
15
18
Iout (A)
Iout (A)
Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the ISR.
Note B: SOA curves represent operating conditions at which internal components are at or below manufacturer’s maximum rated operating temperatures.
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes
PT5800 & PT5810 Series
Operating Features and System Considerations
for the PT5800 & PT5810 Regulator Series
With the sense leads connected, the difference between
the voltage measured at Vout and GND pins, and that
measured from Sense(+) to Sense(–), is the amount of IR
drop being compensated by the regulator. This should
be limited to 0.6V. (0.3V maximum between pins 17 &
18, and also between pins 8 & 9).
The PT5800 (5-V input) and the PT5810 (3.3-V input)
series of integrated switching regulators (ISRs) provide
step-down voltage conversion for output loads of up to
18A.
Note: The remote sense feature is not designed to compensate
for the forward drop of non-linear or frequency dependent
components that may be placed in series with the converter
output. Examples include OR-ing diodes, filter inductors,
ferrite beads, and fuses. When these components are enclosed
by the remote sense connections they are effectively placed
inside the regulation control loop, which can adversely affect
the stability of the regulator.
Power up & Soft-Start Timing
Following either the application of a valid input source
voltage, or the removal of a ground signal to the Inhihit*
control pin (with input power applied), the regulator will
initiate a soft-start power up. The soft start slows the
rate at which the output voltage rises, and also introduces a
short time delay, td (approx. 2ms). Figure 1-1 shows the
power-up characteristic of a PT5801 (3.3V) with a 10-A
load.
Over-Current Protection
To protect against load faults, the regulators incorporate
output over-current protection. Applying a load that
exceeds the regulator’s over-current threshold (see data
sheet specifications) will cause the regulated output to
shut down. Following shutdown the ISR will periodically
attempt to recover by initiating a soft-start power-up.
This is often described as a “hiccup” mode of operation,
whereby the module continues in the cycle of successive
shutdown and power up until the load fault is removed.
During this period, the average current flowing into the
fault is significantly reduced. Once the fault is removed,
the converter automatically recovers and returns to nor-
mal operation.
Figure 1-1
Vo (2V/Div)
Vin (2V/Div)
td
Over-Temperature Protection
An on-board temperature sensor protects the module’s
internal circuitry against excessively high temperatures.
A rise in the internal temperature may be the result of a
drop in airflow, or a high ambient temperature. If the
internal temperature exceeds the OTP threshold (see
data sheet specifications), the regulator’s Inhibit* control
is automatically pulled low. This disables the regulator,
allowing the output voltage to drop to zero as the exter-
nal output capacitors are discharged by the load circuit.
The recovery is automatic, and begins with a soft-start
power up. It occurs when the the sensed temperature
decreases by about 10°C below the trip point.
HORIZ SCALE: 5ms/Div
Differential Remote Sense
Connecting the Sense(+) and Sense(-) pins to the load
circuit allows the regulator to compensate for limited
amounts of ‘IR’ voltage drop. This voltage drop is caused
by current flowing through the connection resistance
between the regulator and the ‘point of regulation’ some
distance away. Leaving the sense pins disconnected will
not damage the regulator or load circuitry. An internal
15Ω resistor, connected between each sense pin and its
corresponding output node, keeps the output voltage in
regulation. However, it is important to connect Sense(–)
to GND locally, as this provides a return path for the
regulator’s internal bias currents.
Note: The over-temperature protection is a last resort mecha-
nism to prevent thermal stress to the regulator. Operation at
or close to the thermal shutdown temperature is not recom-
mended and will reduce the long-term reliability of the module.
Always operate the regulator within the specified Safe Operating
Area (SOA) limits for the worst-case conditions of ambient
temperature and airflow.
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes
PT5800 & PT5810 Series
Startup of the PT5800 & PT5810 Series ISRs
with Back-Feeding Source (Pre-Bias Capability)
In complex digital systems an external voltage can
sometimes be present at the output of the regulator
during power up. For example, this voltage may be
backfed through a dual-supply logic component such as
an FPGA or ASIC. Another path might be via a clamp
diode (to a lower supply voltage) as part of a power-up
sequencing implementation.
2. To ensure that the regulator does not sink current, the
input voltage must always be greater or equal to the
output voltage throughout the power-up and power-down
sequence.
3. If an external source backfeeding the regulator’s output
is greater than the nominal regulation voltage, the output
will begin sinking current at the end of its soft-start
power-up sequence. If this current exceeds the rated
output, the module could be overstressed.
Although the PT5800 (5-V input) and PT5810 (3.3-V
input) series of regulators will sink current under steady-
state operating conditions, they will not do so during
1
2
startup as long as certain conditions are maintained .
This feature allows these regulators to start up while an
external voltage is simultaneously applied to the output.
Figure 2-1 is an application schematic that demonstrates
this capability. The waveforms in Figure 2-2 show the
behavior of the circuit as input power is applied. Note
that the plot of the regulator output current (Io) is approxi-
mately zero up to the timestamp ‘A’, even though a voltage
is initially backfed to the output via the 3.3-V input supply
Figure 2-2; Power-up Waveforms with Back-Feeding Source
Vin (1V/Div)
Vo (1V/Div)
3
and diodes D1 & D2. The regulator sources current when
it begins raising the output above the back-fed voltage to
its nominal regulation value.
Io (5A/Div)
Notes
1. Startup includes both the application of a valid input
source voltage, or the removal of a ground signal from
the Inhibit* control (pin 2) with a valid input source
applied. The output of the regulator is effectively off
(tri-state), during the period that the Inhibit* control is
held low.
HORIZ SCALE 5ms/Div
A
Figure 2-1; Schematic Demonstrating Startup into Pre-Bias Capability
(3.3VDC)
VIN
D1
D2
18
Sense(+)
VO (2.5V)
5–7
14–17
VIN
VOUT
PT5812
GND
9–13
Sense(–)
Io
+
+
8
CIN
Cout
COM
COM
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes
PT5800/5810 Series
Capacitor Recommendations for the PT5800 &
PT5810 Step-Down Regulator Series
Tantalum Capacitors (Optional Output Capacitors)
Tantalum type capacitors can be used for the output but
only the AVX TPS series, Sprague 593D/594/595 series,
or Kemet T495/T510 series. These capacitors are rec-
ommended over many other tantalum types due to their
higher rated surge, power dissipation, and ripple current
capability. As a caution the TAJ series by AVX is not
recommended. This series has considerably higher ESR,
reduced power dissipation, and lower ripple current
capability. The TAJ series is less reliable than the AVX
TPS series when determining power dissipation capa-
bility. Tantalum or Oscon® types are recommended for
applications where ambient temperatures fall below 0°C.
Input Capacitor:
The recommended input capacitance is determined by a
700-mA ripple current rating and the following minimum
capacitance requirements.
• PT5800 = 820µF minimum capacitance
• PT5810 = 1000µF minimum capacitance
Ripple current and <100mΩ equivalent series resistance
(ESR) values are the major considerations, along with
temperature, when designing with different types of
capacitors. Tantalum capacitors have a recommended
minimum voltage rating of twice the maximum DC
voltage + AC ripple. This is necessary to ensure reliabil-
ity for input voltage bus applications
Capacitor Table
Table 2-1 identifies the characteristics of capacitors from a
number of vendors with acceptable ESR and ripple current
(rms) ratings. The number of capacitors required at both
the input and output buses is identified for each capacitor
type.
Output Capacitors
The ESR of the capacitors is less than 100mΩ. Electrolytic
capacitors have marginal ripple performance at frequen-
cies greater than 400kHz, but excellent low frequency
transient response. Above the ripple frequency ceramic
capacitors are necessary. Ceramic capacitors improve the
transient response and reduce any high frequency noise
components apparent during high current excursions.
Preferred low-ESR electrolytic capacitor part numbers
are identified in Table 3-1.
This is not an extensive capacitor list. Capacitors from other
vendors are available with comparable specifications. Those listed
are for guidance. The RMS ripple current rating and ESR
(Equivalent Series Resistance at 100kHz) are critical parameters
necessary to insure both optimum regulator performance and
long capacitor life.
Table 3-1; Input/Output Capacitors
Capacitor Vendor/Series
Capacitor Characteristics
Quantity
Working
Voltage
Value (µF)
(ESR) Equivalent
Series Resistance
Ripple Current
I(rms)max
Physical
Size (mm)
Input Bus Output Bus
Vendor Part Number
@105°C
Panasonic
FC (Radial)
10V
10V
1000
560
0.068Ω
0.090Ω
1050mA
755mA
10×16
10×12.5
1
2
1
1
EEUFC1C102
EEUFC1A561
FK (SMT)
10V
35V
1000
470
0080Ω
0.060Ω
850mA
1100mA
10×10.2
12.5×13.5
1
2
1
1
EEVFK1A102P
EEVFK1V471Q
United Chemi-con
LXZ/LXV Series
16V
10V
10V
470
1000
680
0.090Ω
0.068Ω
0.015Ω
760mA
1050mA
4735mA
10×12.5
10×16
10×10.5
2
1
2
1
1
1
LXZ16VB471M10X12LL
LXZ10VB102M10X16LL
10FX680M
FX Series
Nichicon
PL/PM Series
10V
16V
10V
1000
560
330
0.065Ω
0.080Ω
0.024Ω
1040mA
920mA
3770mA
12.5×15
12.5×15
10×8
1
2
3
1
1
1
UPM1A102MHH6
UPM1C 561MHH6
PNX1A330MCR1GS
NX Series (SMT)
Sanyo Os-con:
SP
SVP (SMT)
10V
10V
470
560
0.015Ω
0.013Ω
>4500mA
>5200mA
10×10.5
11×12.7
2
2
1
1
10SP470M
10SVP560M
AVX Tantalum TPS (SMT)
10V
10V
470
470
0.045Ω
0.060Ω
1723mA
1826mA
7.3L
×5.7W
×4.1H
2
2
1
1
TPSE477M010R0045
TPSV477M010R0060
Kemet Polymer Tantalum
T520/T530Series (SMT)
10V
10V
330
330
0.040Ω
0.015Ω
1800mA
>3800mA
7.3×4.3×4
3
3
1
1
T520X337M010AS
T530X337M010AS
Sprague Tantalum
594D Series (SMT)
10V
680
0.090Ω
1660mA
7.2×6×4.1
2
1
595D687X0010R2T
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes
PT5800 & PT5810 Series
Using the Inhibit Control of the PT5800 & PT5810
Series of Step-Down ISRs
For applications requiring output voltage On/Off control,
the PT5800 & PT5810 series of ISRs incorporate an
inhibit function. This function can be used wherever there
is a requirement for the output voltage from the ISR to be
turned off. The On/Off function is provided by the Inhibit*
control (pin 2).
Turn-On Time: In the circuit of Figure 4-1, turning Q1 on
applies a low-voltage to the Inhibit* control (pin 2) and
disables the output of the regulator . If Q1 is then turned
2
off, the ISR executes a soft-start power up. Power up
consists of a short delay (approx. 2msec), followed by a
period in which the output voltage rises to its full regu-
lation voltage. The module produces a regulated output
voltage within 10msec. Figure 4-2 shows the typical rise
in both the output voltage and input current for a PT5812
(2.5V), following the turn-off of Q1. The turn off of Q1
corresponds to the rise in the waveform, Q1 Vds. The
waveforms were measured with a 3.3VDC input voltage,
and 10-A load.
The ISR functions normally with pin 2 open-circuit,
providing a regulated output whenever a valid source
voltage is applied between Vin (pins 5–7) and GND (pins
9–13). When a low-level ground signal is applied to
2
pin 2, the regulator output is turned off .
Figure 4-1 shows the typical application of the Inhibit*
function. Note the discrete transistor (Q1). The Inhibit*
control has its own internal pull-up to +Vin potential. An
open-collector or open-drain device is recommended to
Figure 4-2
1
control this input . The voltage thresholds are given in
Table 4-1.
Table 4-1; Inhibit Control Requirements
Vo (1V/Div)
Iin (5A/Div)
Parameter
Min
Typ
Max
Enable (V
)
V
– 0.5V
—
—
Open
+0.8V
—
IH
in
Disable (V
)
IL
–0.2V
—
I
–0.5 mA
IL
Q1 Vds (2V/Div)
Figure 4-1
HORIZ SCALE: 2ms/Div
Output Sense (+)
1
4
3
18
VIN
VOUT
5, 6, 7
14–17
Notes:
PT5812
1. Use an open-collector device with a breakdown voltage
of at least 10V (preferably a discrete transistor) for the
Inhibit* input. A pull-up resistor is not necessary. To
disable the output voltage the control pin should be
pulled low to less than +0.8VDC.
2
9–13
8
+
+
CIN
1,000µF
COUT
330µF
Q1
BSS138
1 =Inhibit
2. When a ground signal is applied to the Inhibit* control
(pin 2) the module output is turned off (tri-state). The
output voltage decays to zero as the load impedance
discharges the output capacitors.
Output Sense (–)
GND
GND
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes
PT5800 & PT5810 Series
Adjusting the Output Voltage of the PT5800 &
PT5810 Step-Down Series of Regulators
Using Margin Up/ Margin Down
4. The PT5812 may not be adjusted higher than the
nominal output voltage of 2.5V. There is insufficient
input voltage between Vin and Vout to accommodate
an increase in the output voltage.
The Margin Up* (pin 4) and Margin Dn* (pin 3) control
inputs allow the output voltage to be easily adjusted by
up to 5% of the nominal set-point voltage. To activate,
simply connect the appropriate control input to the Sense(–)
(pin 8), or the local starpoint ground. Either a logic level
MOSFET or a p-channel JFET is recommended for this
purpose. For further information see the related applica-
tion note on this feature.
Vo Adjust Resistor Calculations
The values of R1 [adjust up] and (R2) [adjust down] can
also be calculated using the following formulas. Again, use
Figure 5-1for the placement of the required resistor;
either R1 or (R2) as appropriate.
Using the ‘Vo Adjust’ Control
For a more permanent and precise adjustment, use the
Vo Adjust control (pin 1). The Vo Adjust control allows
adjustment in any increment by up to 10% of the set-
point. The adjustment method requires the addition of a
single external resistor. Table 5-1 gives the allowable
adjustment range for each model of the series as Va (min)
and Va (max). The value of the external resistor can either
be calculated using the formulas given below, or simply
selected from the range of values provided in Table 5-2.
Refer to Figure 5-1 for the placement of the required
resistor. Use the resistor R1 to adjust up, and the resistor
(R2) to adjust down.
Vr · Ro
R1
=
=
– 24.9
– 24.9
kΩ
kΩ
Va – Vo
Ro (Va – Vr)
Vo – Va
(R2)
Where: Vo = Original output voltage
Va = Adjusted output voltage
Vr = The reference voltage in Table 5-1
Ro = The resistance constant in Table 5-1
Adjust Up: An increase in the output voltage is obtained
by adding a resistor R1, between Vo Adjust (pin 1) and
Sense(–) (pin 8). See Figure 5-1.
Figure 5-1; Vo Adjust Resistor Placement
Sense (+) [Note 3]
Adjust Down: Add a resistor (R2), between Vo Adjust (pin 1)
and Sense(+) (pin 18). See Figure 5-1.
(R2)
Adj Down
18
Sense(+)
Notes:
VOUT
1. Use a 1% (or better) tolerance resistor in either the R1 or
(R2) location. Place the resistor as close to the ISR as
possible.
14–17
VOUT
PT5800/5810
GND
9–13
Sense(–) VO Adj
+
8
1
COUT
330µF
2. Never connect capacitors from Vo Adjust to either GND or
Vout. Any capacitance added to the Vo Adjust pin will affect
the stability of the ISR.
R1
Adjust Up
3. If the remote sense feature is not being used, the adjust
resistor (R2) can be connected to Vout, (pins 14-17) instead
of Sense (+).
Sense (–)
GND
Table 5-1
ISR OUTPUT VOLTAGE ADJUSTMENT RANGE AND FORMULA PARAMETERS
Series Pt. No.
5.0V Bus
3.3V Bus
PT5801
N/A
PT5802
PT5812
PT5803
PT5813
PT5804
PT5814
PT5805
PT5815
PT5806
PT5816
4
V
V
V
(nom)
(min)
(max)
3.3V
2.6V
3.63V
0.8V
10.2
2.5V
2.0V
1.8V
1.52V
2.1V
0.8V
10.2
1.5V
1.31V
1.82V
0.8V
9.76
1.2V
1.1V
1.52V
0.8V
10.0
1.0V
0.94V
1.32V
0.8V
o
a
a
#
2.8V
0.8V
V
r
R
(kΩ)
10.7
10.2
o
#
The PT5812 should not be adjusted higher than its nominal output voltage of 2.5V. See note 4.
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes continued
PT5800 & PT5810 Series
Table 5-2
ISR ADJUSTMENT RESISTOR VALUES
Series Pt. No.
5.0V Bus
3.3V Bus
Vo (nom)
PT5801
N/A
3.3V
PT5802
PT5812
2.5V
PT5803
PT5813
1.8V
PT5804
PT5814
1.5V
PT5805
PT5815
1.2V
PT5806
PT5816
1.0V
Va (req.d)
Va (req.d)
3.60
3.55
3.50
3.45
3.40
3.35
2.3kΩ
7.7kΩ
2.100
2.050
2.000
1.950
1.900
1.850
1.800
1.750
1.700
1.650
1.600
1.550
1.500
1.475
1.450
1.425
1.400
1.375
1.350
1.325
1.300
1.275
1.250
1.225
1.200
1.175
1.150
1.125
1.100
1.075
1.050
1.025
1.000
0.975
0.950
2.3kΩ
7.7kΩ
15.9kΩ
29.5kΩ
56.7kΩ
138.0kΩ
15.9kΩ
29.5kΩ
56.7kΩ
138.0kΩ
3.30
1.1kΩ
6.3kΩ
3.25
(475.0)kΩ
(220.0)kΩ
(135.0)kΩ
(92.4)kΩ
(66.9)kΩ
(49.9)kΩ
(37.5)kΩ
(28.6)kΩ
(21.6)kΩ
(15.9)kΩ
(11.3)kΩ
(7.4)kΩ
(169.0)kΩ
(66.9)kΩ
(32.9)kΩ
(15.9)kΩ
(5.7)kΩ
3.20
14.1kΩ
27.2kΩ
53.2kΩ
131.0kΩ
3.15
3.10
3.05
3.00
1.8kΩ
4.2kΩ
2.95
(239.0)kΩ
(102.0)kΩ
(56.4)kΩ
(33.7)kΩ
(20.0)kΩ
(10.9)kΩ
(4.4)kΩ
2.90
7.1kΩ
2.85
10.7kΩ
15.1kΩ
20.8kΩ
28.4kΩ
39.1kΩ
55.1kΩ
81.8kΩ
135.0kΩ
295.0kΩ
2.80
3.6KΩ
9.3KΩ
2.75
2.70
17.9KΩ
32.2KΩ
60.7KΩ
2.65
(4.1)kΩ
2.60
(1.3)kΩ
2.3kΩ
4.8kΩ
2.550
2.500
2.450
2.400
2.350
2.300
2.250
2.200
2.150
2.100
2.050
2.000
[Note 4] 146.0KΩ
7.7kΩ
(321.0)kΩ
(146.0)kΩ
(85.7)kΩ
(55.3)kΩ
(37.2)kΩ
(25.0)kΩ
(16.4)kΩ
(9.9)kΩ
11.4kΩ
15.9kΩ
21.7kΩ
29.5kΩ
40.4kΩ
56.7kΩ
83.9kΩ
138.0kΩ
302.0KΩ
(125.0)kΩ
(45.1)kΩ
(18.4)kΩ
(5.1)kΩ
(4.8)kΩ
(0.8)kΩ
(46.5)kΩ
(5.7)kΩ
R1 = Black R2 = (Blue)
For technical support and more information, see inside back cover or visit www.ti.com
Application Notes
PT5800 & PT5810 Series
Using the Margin Up/Down Controls on the
PT5800 & PT5810 Regulator Series
The PT5800 & PT5810 series of integrated switching
regulator modules incorporate Margin Up* (pin 4) and
Margin Dn* (pin 3) control inputs. These controls allow the
Notes:
1. The Margin Up* and Margin Dn* controls were not
intended to be activated simultaneously. If they are
their affects on the output voltage may not completely
cancel, resulting in a slight shift in the output voltage
set point.
2. When possible use the Sense(-) (pin 8) as the ground
reference. This will produce a more accurate adjustment
of the output voltage at the load circuit terminals. GND
(pins 9-13) can be used if the Sense(-) pin is connected
to GND near the regulator.
1
output voltage set point to be momentarily adjusted ,
either up or down, by a nominal 5%. This provides a
convenient method for dynamically testing the load
circuit’s power supply voltage over its operating margin
or range. Note that the 5% change is also applied to any
adjustment of the output voltage, if made, using the Vo
Adjust (pin 1).
The 5% adjustment is made by driving the appropriate
margin control input directly to the ground reference at
2
Sense(-) (pin 8) . An low-leakage open-drain device, such as
a MOSFET or a p-channel JFET is recommended for this
purpose. Adjustments of less than 5% can also be accom-
modated by adding series resistors to the control inputs
(See Figure 6-1). The value of the resistor can be selected
from Table 6-1, or calculated using the following formula.
Table 6-1; Margin Up/Down Resistor Values
PADDING RESISTOR VALUES
% Adjust
RU / RD
5
4
3
2
1
0.0kΩ
24.9kΩ
66.5kΩ
150.0kΩ
397.0kΩ
Resistor Value Calculation
To reduce the margin adjustment to something less than
5%, series padding resistors are required (See RD and
R
U in Figure 6-1). For the same amount of adjustment,
the resistor value calculated for RU and RD will be the
same. The formulas is as follows.
499
∆%
RU/RD
=
– 99.8
kΩ
Where ∆% = The desired amount of margin adjust in
percent.
Figure 6-1; Margin Up/Down Application Schematic
+Vo
0V
4
3
18
MARG
UP*
MARG
DN*
SNS(+)
+VOUT
+5V
14–17
5, 6, 7
VIN
VOUT
PT5800
INHIBIT*
2
GND
SNS(–)
9–13
8
R D
RU
+
+
Cin
Cout
L
O
A
D
Q1
MargDn
Q2
MargUp
GND
Sense(–)
0V
GND
For technical support and more information, see inside back cover or visit www.ti.com
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