PTB48511AAZ [TI]

2-OUTPUT 65W DC-DC REG PWR SUPPLY MODULE, ROHS COMPLIANT, DIP-8;


型号：	PTB48511AAZ
厂家：	TEXAS INSTRUMENTS
描述：	2-OUTPUT 65W DC-DC REG PWR SUPPLY MODULE, ROHS COMPLIANT, DIP-8 输出元件
文件：	总17页 (文件大小：572K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Not Recommended for New Designs

PTB48510

PTB48511

www.ti.com

SLTS219F –FEBRUARY 2004–REVISED MARCH 2007

DUAL COMPLEMENTARY-OUTPUT DC/DC CONVERTER FOR DSL

Check for Samples: PTB48510, PTB48511

FEATURES

•

Dual Complementary Outputs

(±5 V, ±12 V, or ±15 V)

•

Input Voltage Range: 36 V to 75 V

On/Off Enable for Sequencing

1500 V_DCIsolation

Overcurrent Protection

Overvoltage Protection (PTB48511 only)

Over Temperature Shutdown

Undervoltage Lockout

DESCRIPTION

The PTB4851x series of isolated DC/DC converter

modules produce a complementary pair of regulated

supply voltages for powering line-driver devices in

xDSL telecom applications. The modules operate

from a standard telecom (–48 V) central office (CO)

supply and can provide up to a 72 W of power in a

balanced load configuration.

Temperature Range: –40°C to 85°C

Industry Standard Outline

Fixed Frequency Operation

Synchronizes with PTB48500

Powers Line Drivers for AC-7 and Other xDSL

Chipsets

The A-suffix module (±5 V) is designed to power the

line driver devices for the AC-7 ADSL chipset. Other

voltage options powers other analog applications

requiring a complementary supply with relatively

balanced loads.o

•

Safety Approvals:

–

EN 60950

UL/cUL 60950

STAND-ALONE APPLICATION

Both the PTB48510 and PTB48511 include an

“on/off” enable control, output current limit, over-

temperature protection, and input under-voltage

lockout (UVLO). The PTB48511 adds output

overvoltage protection (OVP).

PTB4851x

The control inputs, Enable and Sync In, are

compatible with the EN Out and Sync Out signals of

the PTB48500 DC/DC converter. This allows the

power-up and switching frequency of the PTB4851x

modules to be directly controlled from a PTB48500.

Together the PTB48500 and PTB4851xA converters

meet all the system power and sequencing

requirements of the AC- ADSL chipset.

COM

Sync In

Enable

COM

V Adj

The PTB4851x uses double-sided surface mount

technology contruction. The package size is based on

the industry standard outline and does not require a

heatsink. Both through-hole and surface mount pin

configurations are available.

-V

*V @ | V

*V is the negative voltage.

UDG-07040

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Not Recommended for New Designs

PTB48510

PTB48511

SLTS219F –FEBRUARY 2004–REVISED MARCH 2007

www.ti.com

ORDERING INFORMATION

BASE DEVICE NUMBER. (PTB4851xxx)

OUTPUT VOLTAGE

(PTB4851xx)

PACKAGE OPTIONS (PT4851xx)

ORDER

VOLTAGE

PACKAGE

DESCRIPTION

PREFIX

CODE

(V)

CODE

DESCRIPTION

REFERENCE⁽¹⁾

PTB48510xxx Basic model

±5

Horizontal T/H

SMD, Standard⁽³⁾

ERK

ERL

Adds output overvoltage protection⁽²⁾

±12

±15⁽⁴⁾

PTB48511xxx

(1) Reference the applicable package reference drawing for the dimensions and PC board layout

(2) Output overvoltage protection

(3) Standard option specifies 63/37, Sn/Pb pin solder material

(4) ±15-V output is not available with the PTB48511

Environmental and General Specifications

(Unless otherwise stated, all voltages are with respect to V_I2)

VALUE

36 to 75

UNIT

V_DC

V_I

Input Voltage Range

Isolation Voltage

Capacitance

Over output load range

Input-output/input/case

Input to output

1500

Resistance

Input to output

mΩ

T_A

Operating Temperature Range

Over V_IRange

–40 to 85

115⁽¹⁾

Shutdown threshold

Hysterisis

OTP

Over-Temperature Protection

°C

T_reflow

T_s

Solder Reflow Temperature

Storage Temperature

Surface temperature of module body or pins

235⁽²⁾

–55 to 125

500

Per Mil-STD-883D, Method 2002.3 T/H

Mechanical Shock

1 ms, 1/2 Sine, mounted

SMD

250

T/H

Mil-STD-883D, Method 2007.2

20-2000 Hz

Mechanical Vibration Mil-STD-883D

SMD

Weight

grams

Flammability

Meets UL 94V-O

(1) This parameter is assured by design.

(2) During reflow of SMD package version do not elevate peak temperature of the module, pins or internal components above the stated

maximum.

Not Recommended for New Designs

PTB48510

PTB48511

www.ti.com

SLTS219F –FEBRUARY 2004–REVISED MARCH 2007

ELECTRICAL CHARACTERISTICS

(Unless otherwise stated, T_A= 25°C, V_I= 48 V, C_I= 0 μF, C_O= 0 μF, I_O1= I_O2= 3.25 A maximum)

PTB4851xA

TYP

PARAMETER

TEST CONDITIONS

MIN

MAX UNIT

(1)

P_O

Output Power

Total output power from V_O1or V_O2

I_O1, I_O2

I_O1- I_O2

Output Current

Over V_Irange, I_O1≤ 0.1 A or I_O2≤ 0.1 A

6.5⁽²⁾

1⁽³⁾

Output Load Imbalance

_O1≤ 0.1 A or I_O2≤ 0.1 A

Includes set point, line, load, I_O1≤ 0.1 A or I_O2≤ 0.1 A

–40°C ≤ T_A≤ 85°C

V_O1, V_O2

Output Voltage

4.75⁽²⁾

5.25⁽²⁾

V_O1

±1

–40°C ≤ T_A≤ 85°C, I_O1≤ 0.1 A or I_O2≤ 0.1

ΔReg_temp

Temperature Variation

%V_O

V_O2

ΔReg_line

ΔReg_load

Line Regulation

Load Regulation

Efficiency

Over V_Irange, balanced load

V_O1or V_O2

±0.1

±0.2

86%

±0.4

%V_O

Over I_O1, I_O2range, balanced load

V_r

V_ORipple (pk-pk)

20 MHz bandwidth, C_O= 10-μF tantalum capacitor

0.11 A/μs load step, 50% to 75% I_O1or I_O2maximum

V_O1or V_O2overshoot/undershoot

30⁽⁴⁾mV_pp

t_tr

μs

Transient Response

Overcurrent Threshold

Overvoltage Threshold

ΔV_tr

±1.0

7.5

%V_O

I_Otrip

V_I= 36 V, reset followed by auto-recovery

6.8

5.9

PTB48510

V_O1(trip)

(5)

Outputs latched off

V_O2(trip)

PTB48511

I_O1(pk)I_O2(pk)

Duty

12.5

10%

Short Circuit Current

Continuous overcurrent trip, I_O1= I_O2

V_O1or V_O2adjust simultaneously

V_O1(adj)

Output Voltage Adjust

Range

3.5

5.5

V_O2(adj)

f _S

Switching Frequency

Over V_Iand I_Oranges

V_Iincreasing

440

470⁽⁶⁾

500

kHz

V_Ion

V_Ioff

Undervoltage lockout

V_Idecreasing

On/Off Enable (pin 3)

High-level input voltage

Low-level input voltage

Low-level input current

Standby Input Current

Start-up Time

V_IH

V_IL

I_IL

3.6

75⁽⁷⁾

0.8

Referenced to V_I(pin 4)

Pin 3 connected

–0.2

–1

μF

I_Istandby

t_ON

C_I

I_O1≤ 0.1 A or I_O2≤ 0.1 A, V_O1or V_O2rising 0 to 0.95 (typ)

Internal Input Capacitance

External Output

Capacitance

5000⁽⁸

C_O

Capacitance from either output to COM (pin 6)

μF

)

PTB48510A

PTB48511A

2.7

2.5

Per Telcordia SR-332 50% stress,

T_A= 40°C, ground benign

MTBF

Reliability

10⁶hrs

(1) See Safe Operating Area curves or contact the factory for the appropriate derating.

(2) Under balanced load conditions, load current flowing out of V_O1is balanced to within ±0.1 A of that flowing into V_O2

(3) A load imbalance is the difference in current flowing from V_O1to V_O2. The module can operate with a higher imbalance but with reduced

specifications.

(4) Output voltage ripple is measured with a 10-μF tantalum capacitor connected from V_O1(pin 5) or V_O2(pin 8), to COM (pin 6).

(5) If the overvoltage threshold is exceeded by either regulated output the module will shut down, turning both outputs off. This is a latched

condition, which can only by reset by removing and then re-applying the module's input power.

(6) This is the free-running frequency. The module can be made to synchronize with the PTB48500 when both modules are used together

in a system.

(7) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is

diode protected and may be connected to V_I. The open-circuit voltage is 5 V maximum. If it is left open circuit the converter operates

when input power is applied.

(8) Electrolytic capacitors with very low equivalent series resistance (ESR) may induce instability when used on the output. Consult the

factory before using capacitors with organic, or polymer-aluminum type electrolytes.

Not Recommended for New Designs

PTB48510

PTB48511

SLTS219F –FEBRUARY 2004–REVISED MARCH 2007

www.ti.com

ELECTRICAL CHARACTERISTICS

(Unless otherwise stated, T_A= 25°C, V_I= 48 V, C_I= 0 μF, C_O= 0 μF, I_O1= I_O2= 3.25 A maximum)

PTB4851xB

TYP

PARAMETER

TEST CONDITIONS

MIN

MAX

72⁽¹⁾

3⁽²⁾

UNIT

P_O

Output Power

Total output power from V_O1or V_O1

I_O1or I_O2

I_O1- I_O2

Output Current

Over V_Irange, I_O1≤ 0.1 A or I_O2≤ 0.1 A ≤ 0.1 A

Output Load Imbalance

I_O1≥ 0.1 A, I_O2≥ 0.1 A

1⁽³⁾

Includes set point, line, load, I_O1≤ 0.1 A or I_O2≤ 0.1 A ≤

0.1 A

–40°C ≤ T_A≤ 85°C

V_O1or V_O2Output Voltage

11.6⁽²⁾

12 12.4⁽²⁾

±1

–40°C ≤ T_A≤ 85°C, I_O1≤ 0.1 A or I_O2≤ 0.1 V_O1or V_O2

ΔReg_temp

Temperature Variation

%V_O

ΔReg_line

ΔReg_load

Line Regulation

Load Regulation

Efficiency

Over V_Irange, balanced load

V_O1or V_O2

±0.05

±0.5

±1

%V_O

Over I_O1or I_O2range, balanced load

±0.1

89%

V_r

V_ORipple (pk-pk)

20 MHz bandwidth, C_O= 10 μF tantalum capacitor

0.1 A/μs load step, 50% to 75% I_O1or I_O2maximum

V_O1or V_O2overshoot/undershoot

80⁽⁴⁾

mV_pp

μs

t_tr

Transient Response

Overcurrent Threshold

Overvoltage Threshold

ΔV_tr

±1

%V_O

I_Otrip

V_I= 36 V, reset followed by auto-recovery

3.3

3.8

PTB48510A

V_O1(trip)

(5)

Outputs latched off

V_O2(trip)

PTB48511A

I_O1(pk)I_O2(pk)

Duty

15.8

Short Circuit Current

Continuous overcurrent trip, I_O1= I_O2

V_O1and V_O2adjust simultaneously

10%

V_O1(adj)

Output Voltage Adjust

Range

6.5

13.4

500

V_O2(adj)

f _S

Switching Frequency

Over V_Iand I_Oranges

V_Iincreasing

440

480⁽⁶⁾

kHz

V_Ion

V_Ioff

Under-Voltage Lockout

V_Idecreasing

On/Off Enable (pin 3)

High-level input voltage

Low-level input voltage

Low-level input current

Standby Input Current

Start-up Time

Referenced to V_I(pin 4)

V_IH

V_IL

I_IL

3.6

75⁽⁷⁾

0.8

–0.2

–1

μF

I_Istandby

Pin 3 open circuit

t_ON

C_I

I_O1≤ 1 A or I_O2≤ 1 A, V_O1or V_O2rising 0 to 0.95 (typ)

Internal Input Capacitance

External Output

Capacitance

3000⁽⁸

C_O

Capacitance from either output to COM (pin 6)

μF

)

PTB48510B

PTB48511B

2.8

2.5

Per Telcordia SR-332 50% stress,

T_A= 40°C, ground benign

MTBF

Reliability

10⁶Hrs

(1) See Safe Operating Area curves or contact the factory for the appropriate derating.

(2) Under balanced load conditions, load current flowing out of V_O1is balanced to within ±0.1 A of that flowing into V_O2

(3) A load imbalance is the difference in current flowing from V_O1to V_O2. The module can operate with a higher imbalance but with reduced

specifications.

(4) Output voltage ripple is measured with a 10 μF tantalum capacitor connected from V_O1(pin 5) or V_O2(pin 8), to COM (pin 6).

(5) If the overvoltage threshold is exceeded by either regulated output the module will shut down, turning both outputs off. This is a latched

condition, which can only by reset by removing and then re-applying the module's input power.

(6) This is the free-running frequency. The module can be made to synchronize with the PTB48500 when both modules are used together

in a system.

(7) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is

diode protected and may be connected to V_I. The open-circuit voltage is 5 V maximum. If it is left open circuit the converter operates

when input power is applied.

(8) Electrolytic capacitors with very low equivalent series resistance (ESR) may induce instability when used on the output. Consult the

factory before using capacitors with organic, or polymer-aluminum type electrolytes.

Not Recommended for New Designs

PTB48510

PTB48511

www.ti.com

SLTS219F –FEBRUARY 2004–REVISED MARCH 2007

ELECTRICAL CHARACTERISTICS

(Unless otherwise stated, T_A= 25°C, V_I= 48 V, C_I= 0 μF, C_O= 0 μF, I_O1= I_O2= 3.25 A maximum)

PTB4851xC

TYP

PARAMETER

TEST CONDITIONS

MIN

MAX

66⁽¹⁾

2.2⁽²⁾

1⁽³⁾

UNIT

P_O

Output Power

Total output power from V_O1or V_O2

I_O1or I_O2

I_O1- I_O2

Output Current

Over V_Irange, I_O1≤ 0.1 A or I_O2≤ 0.1 A

Output Load Imbalance

_O1≤ 0.1 A or I_O2≤ 0.1 A

Includes set point, line, load, I_O1- I_O2≤ 0.1 A,

–40°C ≤ T_A≤ 85°C

V_O1or V_O2Output Voltage

14.5⁽²⁾

15 15.5⁽²⁾

±1

–40°C ≤ T_A≤ 85°C, I_O1≤ 0.1 A or I_O2≤ 0.1 V_O1or V_O2

ΔReg_temp

Temperature Variation

%V_O

ΔReg_line

ΔReg_load

Line Regulation

Load Regulation

Efficiency

Over V_Irange, balanced load

Over I_O1or I_O2range, balanced load

I_O1= I_O2

V_O1or V_O2

±0.05

±0.5

±1

%V_O

±0.1

90%

V_r

V_ORipple (pk-pk)

20 MHz bandwidth, C_O= 10 μF tantalum capacitor

0.1 A/μs load step, 50% to 75% I_O1or I_O2maximum

V_O1or V_O2overshoot/undershoot

50 100⁽⁴⁾

mV_pp

μs

t_tr

±1

Transient Response

Over Current Threshold

Short Circuit Current

ΔV_tr

%V_O

I_Otrip

V_I= 36 V, reset followed by auto-recovery

2.45

4.5

3.85

I_O1(pk)I_O2(pk)

Duty

Continuous overcurrent trip, I_O1= I_O2

V_O1and V_O2adjust simultaneously

10%

V_O1(adj)

V_O2(adj)

Output Voltage Adjust

Range

7.2

16.7

520

f _S

Switching Frequency

Over V_Iand I_Oranges

V_Iincreasing

440

480⁽⁵⁾

kHz

V_Ion

V_Ioff

Under-Voltage Lockout

V_Idecreasing

On/Off Enable (pin 3)

High-level input voltage

Low-level input voltage

Low-level input current

Standby Input Current

Start-up Time

Referenced to –V_I(pin 4)

V_IH

V_IL

I_IL

3.6

75⁽⁶⁾

0.8

–0.2

–1

μF

I_Istandby

Pin 3 open circuit

t_ON

C_I

I_O1≤ 1 A or I_O2≤ 1 A, V_O1or V_O2or rising 0 to 0.95 (typ)

Internal Input Capacitance

External Output

Capacitance

3000⁽⁷

C_O

Capacitance from either output to COM (pin 6)

μF

)

Per Telcordia SR-332 50% stress,

T_A= 40°C, ground benign

MTBF

Reliability

2.8

10⁶hrs

(1) See Safe Operating Area curves or contact the factory for the appropriate derating.

(2) Under balanced load conditions, load current flowing out of V_O1is balanced to within ±0.1 A of that flowing into V_O2

(3) A load imbalance is the difference in current flowing from V_O1to V_O2. The module can operate with a higher imbalance but with reduced

specifications.

(4) Output voltage ripple is measured with a 10-μF tantalum capacitor connected from V_O1(pin 5) or V_O2(pin 8), to COM (pin 6).

(5) This is the free-running frequency. The module can be made to synchronize with the PTB48500 when both modules are used together

in a system.

(6) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is

diode protected and may be connected to V_I. The open-circuit voltage is 5 V maximum. If it is left open circuit the converter operates

when input power is applied.

(7) Electrolytic capacitors with very low equivalent series resistance (ESR) may induce instability when used on the output. Consult the

factory before using capacitors with organic, or polymer-aluminum type electrolytes.

Not Recommended for New Designs

PTB48510

PTB48511

SLTS219F –FEBRUARY 2004–REVISED MARCH 2007

www.ti.com

DEVICE INFORMATION

TERMINAL FUNCTIONS

TERMINAL

DESCRIPTION

NAME

NO.

The positive input supply for the module with respect to V_I(or ground return). When powering the module from

a –48 V telecom central office supply, this input is connected to the primary system ground.

(1)

+V_I

This pin is used when the PTB4851x and PTB4850x DC/DC converter modules are used together. Connecting

this pin to the Sync Out of the PTB4850x module allows the PTB4851x to be synchronized to the same switch

conversion frequency as the PTB4850x.

Sync In

Enable

This is an open-collector (open-drain) negative logic input that enables the module output. This pin is

referenced to –V_I. A logic 0 at this pin enables the module's outputs, and a high impedance disables the

outputs. If this feature is not used the pin should be connected to –V_I.

(2)

Note: Connecting this input directly to the EN Out pin of the PTB4850x enables the output voltages from both

converters (PTB4850x and PTB4851x) to power up in sequence.

The negative input supply for the module, and the 0 VDC reference for the Enable, and Sync In signals. When

the module is powered from a +48-V supply, this input is connected to the 48-V Return.

-V_I

The positive output supply voltage, which is referenced to the COM node. The voltage at V_O1has the same

V_O1

magnitude, but is the complement to that at V_O2

The negative output supply voltage, which is referenced to the COM node. The voltage at V_O2has the same

magnitude, but is the complement to that at V_O1

V_O2

The secondary return reference for the module's regulated output voltages. This node is dc isolated from the

input supply pins.

COM

V_OAdj

Using a single resistor, this pin allows the magnitude of both V_O1and V_O2to be adjusted together, either higher

or lower than their preset value. If not used, this pin should be left open circuit.

(1) Shaded functions indicate signals that are referenced to -V_I

(2) Denotes negative logic: Open = Output Off, –V_I= Normal operation.

Not Recommended for New Designs

PTB48510

PTB48511

www.ti.com

SLTS219F –FEBRUARY 2004–REVISED MARCH 2007

TYPICAL CHARACTERISTICS

(1) (2)

PTB4851xA CHARACTERISTIC DATA at V_I= 48 V

Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the

converter.

EFFICIENCY

POWER DISSIPATION

LOAD CURRENT

CROSS REGULATION

300

200

100

D V with I = 1 A

100

-100

-200

-300

- Load Current - A

(I = I ) - Load Current - A

(1)

Figure 3.

Figure 1.

Figure 2.

CROSS REGULATION

SAFE OPERATING AREA

300

200

D V with I = 1 A

400 LFM

100

200 LFM

100 LFM

-100

-200

-300

Natural

Convection

V = 48 V

- Load Current - A

(I = I ) - Load Current - A

(1) (2)

Figure 4.

Figure 5.

(1) Under a balanced load, current flowing out of V_O1is equal to that flowing into V_O2

(2) SOA curves represent the conditions at which internal components are at or below the manufacturer's maximum operating

temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper.

Not Recommended for New Designs

PTB48510

PTB48511

SLTS219F –FEBRUARY 2004–REVISED MARCH 2007

www.ti.com

TYPICAL CHARACTERISTICS (Continued)

(1) (2)

PTB4851xB CHARACTERISTIC DATA at V_I= 48 V

Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the

converter.

EFFICIENCY

POWER DISSIPATION

LOAD CURRENT

CROSS REGULATION

400

200

100

D V with I = 1 A

O1 O1

-200

-400

0.5

1.0

1.5

2.0

- Load Current - A

2.5

3.0

0.5

1.0

1.5

2.0

(I = I ) - Load Current - A

2.5

3.0

0.5

1.0

1.5

2.0

(I = I ) - Load Current - A

2.5

3.0

(1)

Figure 8.

Figure 6.

Figure 7.

CROSS REGULATION

SAFE OPERATING AREA

400

D V with I = 1 A

200

400 LFM

200 LFM

100 LFM

-200

-400

Natural

Convection

V = 48 V

0.5

1.0

1.5

2.0

- Load Current - A

2.5

3.0

0.5

1.0

1.5

2.0

(I = I ) - Load Current - A

2.5

3.0

(1) (2)

Figure 9.

Figure 10.

(1) Under a balanced load, current flowing out of V_O1is equal to that flowing into V_O2

(2) SOA curves represent the conditions at which internal components are at or below the manufacturer's maximum operating

temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper.

Not Recommended for New Designs

PTB48510

PTB48511

www.ti.com

SLTS219F –FEBRUARY 2004–REVISED MARCH 2007

TYPICAL CHARACTERISTICS (Continued)

(1) (2)

PTB4851xC CHARACTERISTIC DATA at V_I= 48 V

Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the

converter.

EFFICIENCY

POWER DISSIPATION

LOAD CURRENT

CROSS REGULATION

300

200

100

D V with I = 1 A

100

-100

-200

-300

0.3

0.6

0.9

1.2

1.5

(I = I ) - Load Current - A

1.8

2.1

0.3

0.6

0.9

1.2

1.5

- Load Current - A

1.8

2.1

0.3

0.6

0.9

1.2

1.5

(I = I ) - Load Current - A

1.8

2.1

(1)

Figure 13.

Figure 11.

Figure 12.

CROSS REGULATION

SAFE OPERATING AREA

300

D V with I = 1 A

200

100

400 LFM

200 LFM

100 LFM

Natural

Convection

-100

-200

-300

V = 48 V

0.3

0.6

0.9

1.2

1.5

- Load Current - A

1.8

2.1

0.5

1.0

1.5

2.0

(I = I ) - Load Current - A

2.5

3.0

(1) (2)

Figure 14.

Figure 15.

(1) Under a balanced load, current flowing out of V_O1is equal to that flowing into V_O2

(2) SOA curves represent the conditions at which internal components are at or below the manufacturer's maximum operating

temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper.

Not Recommended for New Designs

PTB48510

PTB48511

SLTS219F –FEBRUARY 2004–REVISED MARCH 2007

www.ti.com

APPLICATION INFORMATION

ADJUSTING THE OUTPUT VOLTAGE OF THE PTB4851x SERIES OF DC/DC CONVERTERS

The PTB48510 and PTB48511 DC/DC converters produce a balanced pair of complimentary output voltages.

They are identified V_O1and V_O2, respectively. The magnitude of both output voltages can be adjusted together as

a pair, higher or lower, by up to ±10% of their nominal. The adjustment method uses a single external resistor.¹

The value of the resistor determines the adjustment magnitude, and its placement determines whether the

magnitude is increased or decreased. The resistor values can be calculated using the appropriate formula (see

below). The formula constants are given in Table 1. The placement of each resistor is as follows.

Adjust Up: To increase the magnitude of both output voltages, place a resistor R₁between V_{O 1}Adj (pin 7) and

the V_O2(pin 8) voltage rail; see Figure 16.

Adjust Down: To decrease the magnitude of both output voltages, add a resistor (R₂), between V_OAdj (pin 7)

and the V_O1(pin 5) voltage rail; see Figure 17.

PTB48510

Adjust Down

COM

V Adj

COM

Adjust Up

UDG-07041

UDG-07042

Figure 16. Adjust Up Resistor Placement

ADJUST RESISTOR CALCULATION

Figure 17. Adjust Down Resistor Placement

The value of the adjust resistor is calculated using one of the following equations. Use the equation for R₁to

adjust up, or (R₂) to adjust down.

V R

[Adjust Up] +

₂ǒ_{V *}_VoǓ ^{* R kW}

(1)

(2)

_oǒ_{2 V *}_VrǓ

₂ǒ_Vo_*_VaǓ

ǒ_R2Ǔ _{[Adjust Down] +}

* R kW

Where:

V_O= Magitude of the original V_O1or V_O2

V_a= Magnitude of the adjusted voltage

V_r= The reference voltage from Table 1

R_O= The resistance value in Table 1

R_S= The series resistance from Table 1

Not Recommended for New Designs

PTB48510

PTB48511

www.ti.com

SLTS219F –FEBRUARY 2004–REVISED MARCH 2007

Table 1. Adjustment Range and Formula Parameters

PARAMETERS

PTB4851xA

PTB4851xB

PTB48510C

V_O(nom) (V)

V_a(min) (V)

V_a(max) (V)

V_{r (V)}

3.5

6.5

7.2

5.5

13.4

16.7

2.495

7.5

2.495

18.2

2.495

22.1

R_n(kΩ)

R_s(kΩ)

9.09

16.9

NOTES:

1. A 0.05 W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100

ppm/°C or better. Place the resistor in either the R₁or (R₂) location, as close to the converter as possible.

2. Never connect capacitors to the Vo Adj pin. Capacitance added to this pin can affect the stability of the

regulated output.

3. The overvoltage protection (PTB48511x) is nominally set to 25% above the original output voltage set-

point. Increasing the magnitude of the output voltages reduces the margin between the output voltage and

the overvoltage (OV) protection threshold. This could make the module more sensitive to OV faults, as a

result of random noise and load transients.

Note: An OV fault is a latched condition that shuts down the converter's outputs. The fault can be cleared by

cycling the Enable pin, or by momentarily removing input power to the module.

CONFIGURING THE PTB4850x and PTB4851x DC/DC CONVERTERS FOR DSL APPLICATIONS

When operated as a pair, the PTB4850x and PTB4851x converters are specifically designed to provide all the

required supply voltages for powering xDSL chipsets. The PTB4850x produces two logic voltages. They include

a 3.3-V source for logic and I/O, and a low-voltage for powering a digital signal processor core. The PTB4851x

produces a balanced pair of complementary supply voltages that is required for the xDSL transceiver ICs. When

used together in these types of applications, the PTB4850x and PTB4851x may be configured for power-up

sequencing, and also synchronized to a common switch conversion frequency. Figure 19 shows the required

cross-connects between the two converters to enable these two features.

SWITCHING FREQUENCY SYNCHRONIZATION

Unsynchronized, the difference in switch frequency introduces a beat frequency into the input and output AC

ripple components from the converters. The beat frequency can vary considerably with any slight variation in

either converter’s switch frequency. This results in a variable and undefined frequency spectrum for the ripple

waveforms, which would normally require separate filters at the input of each converter. When the switch

frequency of the converters are synchronized, the ripple components are constrained to the fundamental and

higher. This simplifies the design of the output filters, and allows a common filter to be specified for the treatment

of input ripple.

POWER-UP SEQUENCING

The desired power-up sequence for the AC7 supply voltages requires that the two logic-level voltages from the

PTB4850x converter rise to regulation prior to the two complementary voltages that power the transceiver ICs.

This sequence cannot be assured if the PTB4850x and PTB4851x are allowed to power up independently,

especially if the 48-V input voltage rises relatively slowly. To ensure the desired power-up sequence, the EN Out

pin of the PTB4850x is directly connected to the activelow Enable input of the PTB4851x (see Figure 19). This

allows the PTB4850x to momentarily hold off the outputs from the PTB4851x until the logic-level voltages have

risen first. Figure 19 shows the power-up waveforms of all four supply voltages from the schematic of Figure 19.

Not Recommended for New Designs

PTB48510

PTB48511

SLTS219F –FEBRUARY 2004–REVISED MARCH 2007

www.ti.com

CCIO

(1 V/div)

CORE

(1 V/div)

TCVR

(5 V/div)

TCVR

(5 V/div)

T - Time - 10 ms/div

Figure 18. Power-Up Sequencing Waveforms

V Adj

PTB48500A

-48 V

RTN

CCIO

Input

Filter

CORE

Enable

POR

-48 V

-V

COM

EN Out Sync Out

Sync In

V Adj

PTB48510A

TCVR

Enable

COM

-V

TCVR

UDG-07043

Figure 19. Example of PTB4850x and PTB4851x Modules Configured for DSL Applications

PACKAGE OPTION ADDENDUM

www.ti.com

26-Aug-2013

PACKAGING INFORMATION

Orderable Device

PTB48510AAH

PTB48510BAH

PTB48510BAS

PTB48510BAZ

PTB48510CAH

PTB48510CAZ

PTB48511AAH

PTB48511AAS

PTB48511BAH

PTB48511BAZ

Status Package Type Package Pins Package

Eco Plan Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

-40 to 85

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

NRND

Through-

Hole Module

ERK

Pb-Free

(RoHS)

N / A for Pkg Type

NRND

Through-

Hole Module

ERK

ERL

ERK

ERL

ERK

ERL

ERK

ERL

Pb-Free

(RoHS)

N / A for Pkg Type

Surface

Mount Module

TBD

SNPB

SNAGCU

Level-1-235C-UNLIM/

Level-3-260C-168HRS

NRND

Surface

Mount Module

Pb-Free

(RoHS)

Level-3-260C-168 HR

N / A for Pkg Type

Level-3-260C-168 HR

N / A for Pkg Type

Call TI

NRND

Through-

Hole Module

Pb-Free

(RoHS)

NRND

Surface

Mount Module

Pb-Free

(RoHS)

SNAGCU

NRND

Through-

Hole Module

Pb-Free

(RoHS)

OBSOLETE

NRND

Surface

Mount Module

TBD

Call TI

Through-

Hole Module

Pb-Free

(RoHS)

N / A for Pkg Type

Level-3-260C-168 HR

NRND

Surface

Pb-Free

(RoHS)

SNAGCU

Mount Module

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

26-Aug-2013

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

IMPORTANT NOTICE

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changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest

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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms

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PTB48511AAZ [TI]

相关型号：

PTB48511B

PTB48511BAH

PTB48511BAZ

PTB48520W

PTB48520WAH

PTB48520WAS

PTB48520WAZ

PTB48540

PTB48540AAS

PTB48540AAZ

PTB48540BAS

PTB48540CAD