PTH08T250WAS [TI]
50-A, 4.5-V to 14-V INPUT, NON-ISOLATED, WIDE-OUTPUT, ADJUSTABLE POWER MODULE WITH TurboTrans⑩; 50 -A , 4.5 V至14 V输入,非隔离,宽输出,具有TurboTrans⑩调节电源模块型号: | PTH08T250WAS |
厂家: | TEXAS INSTRUMENTS |
描述: | 50-A, 4.5-V to 14-V INPUT, NON-ISOLATED, WIDE-OUTPUT, ADJUSTABLE POWER MODULE WITH TurboTrans⑩ |
文件: | 总38页 (文件大小:1384K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PTH08T250W
www.ti.com
SLTS278B–JUNE 2007–REVISED AUGUST 2007
50-A, 4.5-V to 14-V INPUT, NON-ISOLATED,
WIDE-OUTPUT, ADJUSTABLE POWER MODULE WITH TurboTrans™
1
FEATURES
•
•
•
Multi-Phase, Switch-Mode Topology
TurboTrans™ Technology
2
•
Up to 50-A Output Current
•
•
•
•
•
4.5-V to 14-V Input Voltage
Designed to meet Ultra-Fast Transient
Requirements up to 300 A/μs
Wide-Output Voltage Adjust (0.7 V to 3.6 V)
±1.5% Total Output Voltage Variation
Efficiencies up to 96%
•
•
SmartSync Technology
Parallel Operation
Output Overcurrent Protection
(Nonlatching, Auto-Reset)
APPLICATIONS
•
•
•
Complex Multi-Voltage Systems
Servers
Workstations
•
•
Operating Temperature: –40°C to 85°C
Safety Agency Approvals: (Pending)
–
UL/IEC/CSA-C22.2 60950-1
•
•
•
•
•
Prebias Startup
On/Off Inhibit
Differential Output Voltage Remote Sense
Adjustable Undervoltage Lockout
Auto-Track™ Sequencing
DESCRIPTION
The PTH08T250W is a high-performance 50-A rated, non-isolated power module. This module represents the
2nd generation of the popular PTH series power modules with a reduced footprint and improved features.
Operating from an input voltage range of 4.5 V to 14 V, the PTH08T250W requires a single resistor to set the
output voltage to any value over the range, 0.7 V to 3.6 V. The wide input voltage range makes the
PTH08T250W particularly suitable for advanced computing and server applications that utilize a loosely
regulated 8-V to 12-V intermediate distribution bus. Additionally, the wide input voltage range increases design
flexibility by supporting operation with tightly regulated 5-V, 8-V, or 12-V intermediate bus architectures.
The module incorporates a comprehensive list of features. Output overcurrent and over-temperature shutdown
protects against most load faults. A differential remote sense ensures tight load regulation. An adjustable
under-voltage lockout allows the turn-on voltage threshold to be customized. Auto-Track™ sequencing is a
popular feature that greatly simplifies the simultaneous power-up and power-down of multiple modules in a
power system. Additionally, the capability to current share between multiple PTH08T250W modules allows for
load currents greater than 50A on a single rail.
The PTH08T250W includes new patent pending technologies, TurboTrans™ and SmartSync. The TurboTrans
feature optimizes the transient response of the regulator while simultaneously reducing the quantity of external
output capacitors required to meet a target voltage deviation specification. Additionally, for a target output
capacitor bank, TurboTrans can be used to significantly improve the regulators transient response by reducing
the peak voltage deviation. SmartSync allows for switching frequency synchronization of multiple modules, thus
simplifying EMI noise suppression tasks and reducing input capacitor RMS current requirements.
The module uses double-sided surface mount construction to provide a low profile and compact footprint.
Package options include both through-hole and surface mount configurations that are lead (Pb) - free and RoHS
compatible.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
TurboTrans, Auto-Track, TMS320 are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated
PTH08T250W
www.ti.com
SLTS278B–JUNE 2007–REVISED AUGUST 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
STANDARD APPLICATION
Auto-Track
R
TT
1%
0.05 W
(Optional)
20
2
3
5
19
V
I
Track
Share Comp CLKIO TT
6
7
V
V
V
V
I
I
I
I
+Sense
+Sense 17
V
O
14
15
10
11
V
V
O
O
PTH08T250W
Inhibit
+
C
O
660 mF
(Required)
21 Inhibit/UVLO
22 SmartSync
Config
-Sense 16
L
O
A
D
GND
12
AGND
V Adj
+
O
1
8
9
13
4
18
C
I
1000 mF
(Required)
-Sense
GND
R
SET
1%, 0.05 W
(Required)
GND
UDG-07002
A. When operating at an input voltage greater than 8V the minimum required input capacitance may be reduced to
560μF.
2
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ORDERING INFORMATION
For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see
the TI website at www.ti.com.
DATASHEET TABLE OF CONTENTS
DATASHEET SECTION
ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS TABLE (PTH08T250W)
TERMINAL FUNCTIONS
PAGE NUMBER
3
4
6
TYPICAL CHARACTERISTICS (VI = 12V)
TYPICAL CHARACTERISTICS (VI = 5V)
ADJUSTING THE OUTPUT VOLTAGE
INPUT & OUTPUT CAPACITOR RECOMMENDATIONS
TURBOTRANS™ INFORMATION
SOFT-START POWER-UP
7
8
9
11
15
19
19
20
20
20
21
23
26
27
30
30
32
REMOTE SENSE
OUTPUT INHIBIT
OVERCURRENT PROTECTION
OVER-TEMPERATURE PROTECTION
SYCHRONIZATION (SMARTSYNC)
AUTO-TRACK SEQUENCING
UNDERVOLTAGE LOCKOUT (UVLO)
CURRENT SHARING
CURRENT SHARING LAYOUT
PREBIAS START-UP
TAPE & REEL AND TRAY DRAWINGS
ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS
(Voltages are with respect to GND)
UNIT
Vtrack Track pin voltage
–0.3 to VI + 0.3
–40 to 85
V
TA
Operating temperature range Over VI range
AH suffix
AD suffix
AS suffix
AZ suffix
Surface temperature of module body or pins for
5 seconds maximum.
Twave Wave soldering temperature
Treflow Solder reflow temperature
260
°C
235(1)
260(1)
–55 to 125(2)
500
Surface temperature of module body or pins
Tstg
Storage temperature
Mechanical shock
Per Mil-STD-883D, Method 2002.3 1 msec, 1/2 AH and AD suffix
sine, mounted
AS and AZ suffix
125
G
Mechanical vibration
Weight
Mil-STD-883D, Method 2007.2 20-2000 Hz
20
16.7
grams
Flammability
Meets UL94V-O
(1) During reflow of surface mount package version do not elevate peak temperature of the module, pins or internal components above the
stated maximum.
(2) The shipping tray or tape and reel cannot be used to bake parts at temperatures higher than 65C.
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ELECTRICAL CHARACTERISTICS
PTH08T250W
TA = 25°C, VI = 12 V, VO = 3.3 V, CI = 1000 µF, CO = 660 µF, and IO = IO max (unless otherwise stated)
PARAMETER
TEST CONDITIONS
PTH08T250W
UNIT
MIN
TYP
MAX
48
25°C, natural convection
60°C, 200 LFM
0
0
IO
Output current
Over VO range
A
V
50
(1)
0.7 ≤ VO < 1.2
1.2 ≤ VO ≤ 3.6
4.5
4.5
0.7
14
VI
Input voltage range
Over IO range
Over IO range
14
VOADJ
Output voltage adjust range
Set-point voltage tolerance
Temperature variation
Line regulaltion
3.6
V
(2)
±0.5
±0.3
±5
±1
%Vo
%Vo
mV
–40°C < TA < 85°C
Over VI range
VO
Load regulation
Over IO range
±5
mV
(2)
Total output variation
Includes set-point, line, load, –40°C ≤ TA ≤ 85°C
RSET = 1.62 kΩ, VO = 3.3 V
±1.5
%Vo
94%
93%
91%
90%
88%
86%
RSET = 5.23 kΩ, VO = 2.5 V
RSET = 12.7 kΩ, VO = 1.8 V
η
Efficiency
IO = 30 A
RSET = 19.6 kΩ, VO = 1.5 V
RSET = 35.7 kΩ, VO = 1.2 V
RSET = 63.4 kΩ, VO = 1.0 V
RSET = open, VO = 0.7 V
83%
(1)
VO Ripple (peak-to-peak)
Overcurrent threshold
20-MHz bandwidth
10
mVPP
A
ILIM
ttr
Reset, followed by auto-recovery
100
100
160
100
Recovery time
VO over/undershoot
Recovery time
µs
w/o TurboTrans
CO= 660 μF, TypeC
ΔVtr
ttrTT
mV
µs
2.5 A/µs load step
50 to 100% IOmax
Transient response
w/ TurboTrans
CO= 3300 μF, TypeC
RTT = short
mV
ΔVtrTT
VO over/undershoot
45
IIL
Track input current (pin 20)
Pin to GND
–130(3)
1
µA
dVtrack/dt Track slew rate capability
CO ≤ CO (max)
V/ms
VI increasing, RUVLO = OPEN
VI decreasing, RUVLO = OPEN
Hysteresis, RUVLO ≤ 127 kΩ
4.3
4.2
1.0
4.45
Adjustable Under-voltage lockout
UVLOADJ
(pin 21)
4.0
V
Input high voltage (VIH
)
Open(4)
0.6
V
Inhibit control (pin 21)
Input low voltage (VIL)
-0.2
Input low current (IIL ), Pin 21 to GND
-125
µA
mA
kHz
kHz
V
Iin
Input standby current
Switching frequency
Inhibit (pin 21) to GND, Track (pin 20) open
35
(5)
f s
Over VI and IO ranges, SmartSync (pin 22) to GND
Synchronization frequency applied to pin 22
SYNC High-Level Input Voltage
600
(5)
(5)
fSYNC
VSYNCH
VSYNCL
tSYNC
240
400
3.9
5.5
0.8
Synchronization (SYNC)
control (pin 22)
SYNC Low-Level Input Voltage
V
SYNC Minimum Pulse Width
200
nSec
(1) For output voltages less than 1.2 V, the output ripple may increase (up to 2×) when operating at input voltages greater than (VO × 12).
Adjusting the switching frequency using the SmartSync feature may increase or decrease this ratio. Please review the SmartSync
section of the Application Information for further guidance.
(2) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with 100 ppm/C or better temperature stability.
(3) A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 20. The
open-circuit voltage is less than 8 Vdc
.
(4) Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when input power is applied. A small,
low-leakage (<100 nA) MOSFET is recommended for control. For additional information, see the related application section.
(5) The PTH08T250W is a two-phase power module. Each phase switches at 300kHz typical, 180° out of phase from one another. The
over-all switching frequency is 600 kHz typical. SmartSync controls the frequency of an individual phase.
4
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ELECTRICAL CHARACTERISTICS
PTH08T250W
(continued)
TA = 25°C, VI = 12 V, VO = 3.3 V, CI = 1000 µF, CO = 660 µF, and IO = IO max (unless otherwise stated)
PARAMETER
TEST CONDITIONS
PTH08T250W
UNIT
MIN
TYP
MAX
(6)
(7)
Nonceramic 1000
Ceramic
CI
External input capacitance
µF
µF
22
(8)
Capacitance Value
Nonceramic
Ceramic
660
8000
w/o TurboTrans
w/ TurboTrans
1000
Equivalent series resistance (non-ceramic)
Capacitance Value
3
mΩ
µF
CO
External output capacitance
see table
(7) (9)
(9)
Capacitance × ESR product (CO × ESR)
1000
2.79
10000
µF×mΩ
106 Hr
Per Telcordia SR-332, 50% stress,
TA = 40°C, ground benign
MTBF
Reliability
(6) A 1000 µF electrolytic input capacitor is required for proper operation. When operating at an input voltage greater than 8V the minimum
required input capacitance may be reduced to 560μF. The input capacitor must be rated for a minimum of 600 mA rms of ripple current.
(7) 660 µF of external output capacitance is required for basic operation. Adding additional capacitance at the load further improves
transient response. See the Capacitor Application Information section and the TuboTrans Technology section for more guidance.
(8) This is the calculated maximum when not using TurboTrans™ technology. This value includes both ceramic and non-ceramic
capacitors. The minimum ESR requirement often results in a lower value of output capacitance. See the Capacitor Application
Information section for more guidance.
(9) When using TurboTrans™ technology, a minimum value of output capacitance is required for proper operation. Additionally, low ESR
capacitors are required for proper operation. See the TurboTrans Technology section for further guidance.
22
1
21
20
19
18
17
16
15
14
2
3
Texas
Instruments
4
5
PTH08T250W
6
7
8
9
10 11
12 13
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Table 1. TERMINAL FUNCTIONS
TERMINAL
DESCRIPTION
NAME
VI
NO.
6,7,14,15 The positive input voltage power node to the module, which is referenced to common GND.
VO
10,11
The regulated positive power output with respect to GND.
This is the common ground connection for the VI and VO power connections. It is also the 0 Vdc reference for
the control inputs.
GND
8,9,12,13
The Inhibit pin is an open-collector/drain, negative logic input that is referenced to GND. Applying a low level
ground signal to this input disables the module’s output and turns off the output voltage. When the Inhibit
control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left
open-circuit, the module produces an output whenever a valid input source is applied.
Inhibit(1) and
UVLO
21
18
This pin is also used for input undervoltage lockout (UVLO) programming. Connecting a resistor from this pin
to GND (pin 13) allows the ON threshold of the UVLO to be adjusted higher than the default value. For more
information, see the Application Information section.
A 0.05 W 1% resistor must be directly connected between this pin and pin4 (AGND) to set the output voltage
to a value higher than 0.7V. The temperature stability of the resistor should be 100 ppm/°C (or better). The
setpoint range for the output voltage is from 0.7V to 3.6V. If left open circuit, the output voltage defaults to its
lowest value. For further information, on output voltage adjustment see the related application note.
Vo Adjust
The specification table gives the preferred resistor values for a number of standard output voltages.
The sense input allows the regulation circuit to compensate for voltage drop between the module and the
load. The +Sense pin should always be connected to VO, either at the load for optimal voltage accuracy, or at
the module (pin 11).
+ Sense
– Sense
17
16
The sense input allows the regulation circuit to compensate for voltage drop between the module and the
load. The –Sense pin should always be connected to GND, either at the load for optimal voltage accuracy, or
at the module (pin 13).
This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes
active typically 25 ms after a valid input voltage has been applied, and allows direct control of the output
voltage from 0 V up to the nominal set-point voltage. Within this range the module's output voltage follows the
voltage at the Track pin on a volt-for-volt basis. When the control voltage is raised above this range, the
module regulates at its set-point voltage. The feature allows the output voltage to rise simultaneously with
other modules powered from the same input bus. If unused, this input should be connected to VI.
Track
20
19
NOTE: Due to the undervoltage lockout feature, the output of the module cannot follow its own input voltage
during power up. For more information, see the related application note.
This input pin adjusts the transient response of the regulator. To activate the TurboTrans™ feature, a 1%,
50mW resistor, must be connected between this pin and pin 17 (+Sense) very close to the module. For a
given value of output capacitance, a reduction in peak output voltage deviation is achieved by utililizing this
feature. If unused, this pin must be left open-circuit. The resistance requirement can be selected from the
TurboTrans resistor table in the Application Information section. External capacitance must never be
connected to this pin unless the TurboTrans resistor value is a short, 0Ω.
TurboTrans™
This input pin sychronizes the switching frequency of the module to an external clock frequency. The
SmartSync feature can be used to sychronize the switching frequency of multiple modules, aiding EMI noise
suppression efforts. The external synchronization frequency must be present before a valid input voltage is
present, or before the release of inhibit control. If unused, this pin MUST be connected to GND. For more
information, please review the Application Information section.
SmartSync
CONFIG
22
1
When two modules are connected together to share load current one must be configured as the MASTER and
the other as the SLAVE. This pin is used to configure the module as either MASTER or SLAVE. To configure
the module as the MASTER, connect this pin to GND. To configure the module as the SLAVE, connect this
pin to VI (pin 6). When not sharing current, this pin should be connected to GND.
This pin is used when connecting two modules together to share load current. When two modules are sharing
current the Share pin of both modules must be connected together. When not sharing current, this pin MUST
be left open (floating).
Share
Comp
AGND
CLKIO
2
3
4
5
This pin is used when connecting two modules together to share load current. When two modules are sharing
current the Comp pin of both modules must be connected together. When not sharing current, this pin MUST
be left open (floating).
This pin is the internal analog ground of the module. This pin provides the return path for the VOAdjust resistor
(RSET). When two modules are sharing current the AGND pin of both modules must be connected together.
Also, when two modules are connected, RSET must be connected only on the MASTER module.
This pin is used when connecting two modules together to share load current. When two modules are sharing
current the CLKIO pin of both modules must be connected together. When not sharing current, this pin MUST
be left open (floating).
(1) Denotes negative logic: Open = Normal operation, Ground = Function active
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TYPICAL CHARACTERISTICS(1)(2)
CHARACTERISTIC DATA ( VI = 12 V)
EFFICIENCY
vs
LOAD CURRENT
OUTPUT RIPPLE
vs
LOAD CURRENT
POWER DISSIPATION
vs
LOAD CURRENT
100
95
90
85
80
75
70
65
60
55
50
14
12
10
8
12
3.3
V
(V)
V
OUT
(V)
OUT
1.8
3.3
2.5
1.8
1.5
1.2
1.0
3.3
2.5
1.8
1.2
0.7
10
8
2.5
2.5
2.5
(V)
1.8
3.3
3.3
1.5
6
1.2
V
1.0
OUT
1.8
1.2
3.3
2.5
1.8
1.5
1.2
1.0
0.7
1.2
0.7
6
1.0
4
2
4
0.7
1.5
2
0
0
10
20
30
40
50
0
10
20
30
40
50
0
10
20
30
40
50
I
- Output Current - A
I
- Output Current - A
O
I
- Output Current - A
O
O
Figure 1.
Figure 2.
Figure 3.
AMBIENT TEMPERATURE
vs
AMBIENT TEMPERATURE
vs
LOAD CURRENT
LOAD CURRENT
90
80
90
80
70
70
400 LFM
200 LFM
400 LFM
200 LFM
60
50
40
60
50
40
V
= 1.2 V
O
V
= 3.3 V
O
100 LFM
100 LFM
Airflow
Airflow
400 LFM
400 LFM
200 LFM
100 LFM
Nat conv
200 LFM
100 LFM
Nat conv
Natural
Convection
30
30
20
Natural
Convection
20
0
10
20
30
40
50
0
10
20
30
40
50
I
- Output Current - A
I
- Output Current - A
O
O
Figure 4.
Figure 5.
(1) The electrical characteristic data has been developed from actual products tested at 25C. This data is considered typical for the
converter. Applies to Figure 1, Figure 2, and Figure 3.
(2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper
and the direction of airflow from pin 10 to pin 22. For surface mount packages (AS and AZ suffix), multiple vias must be utilized. Please
refer to the mechanical specification for more information. Applies to Figure 4 and Figure 5.
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TYPICAL CHARACTERISTICS(1)(2)
CHARACTERISTIC DATA ( VI = 5 V)
EFFICIENCY
vs
LOAD CURRENT
OUTPUT RIPPLE
vs
LOAD CURRENT
POWER DISSIPATION
vs
LOAD CURRENT
100
3.3
10
9
12
10
V
(V)
V (V)
OUT
95
90
85
80
OUT
3.3
2.5
2.5
3.3
3.3
2.5
1.8
1.2
0.7
3.3
2.5
1.8
1.2
0.7
8
1.8
8
6
4
7
2.5
(V)
1.8
1.5
0.7
1.2
1.0
75
70
65
60
55
50
6
0.7
V
1.2
OUT
5
3.3
2.5
1.8
1.5
1.2
1.0
0.7
1.2
4
0.7
1.8
2
0
3
2
0
10
20
30
40
50
0
10
20
30
40
50
0
10
20
30
40
50
I
- Output Current - A
I
- Output Current - A
I - Output Current - A
O
O
O
Figure 6.
Figure 7.
Figure 8.
AMBIENT TEMPERATURE
vs
AMBIENT TEMPERATURE
vs
LOAD CURRENT
LOAD CURRENT
90
80
80
70
70
400 LFM
200 LFM
400 LFM
200 LFM
60
50
40
60
50
40
V
= 3.3 V
O
V
= 1.2 V
O
100 LFM
100 LFM
Airflow
400 LFM
Airflow
400 LFM
200 LFM
100 LFM
Nat conv
200 LFM
100 LFM
Nat conv
30
Natural
Convection
Natural
Convection
30
20
0
20
10
20
30
40
50
0
10
20
30
40
50
I
- Output Current - A
O
I
- Output Current - A
O
Figure 9.
Figure 10.
(1) The electrical characteristic data has been developed from actual products tested at 25C. This data is considered typical for the
converter. Applies to Figure 6, Figure 7, and Figure 8.
(2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper
and the direction of airflow from pin 10 to pin 22. For surface mount packages (AS and AZ suffix), multiple vias must be utilized. Please
refer to the mechanical specification for more information. Applies to Figure 9 and Figure 10.
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APPLICATION INFORMATION
ADJUSTING THE OUTPUT VOLTAGE
The Vo Adjust control sets the output voltage of the PTH08T250W. The adjustment range of the PTH08T250W is
0.7 V to 3.6 V. The adjustment method requires the addition of a single external resistor, RSET, that must be
connected directly between pins Vo Adjust (pin 18) and AGND (pin 4). Table 2 gives the standard value of the
external resistor for a number of standard voltages, along with the actual output voltage that this resistance value
provides.
For other output voltages, the value of the required resistor can either be calculated using the following formula,
or simply selected from the range of values given in Table 3. Figure 11 shows the placement of the required
resistor.
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÷
ø
0.7
R
= 30.1(kW)´
- 6.49 (kW)
SET
V - 0.7
O
(1)
Table 2. Standard Values of RSET for Standard Output Voltages
VO (Standard) (V)
RSET (Standard Value) (kΩ)
VO (Actual) (V)
3.298
3.3
2.5
2.0
1.8
1.5
1.2
1.62
5.23
9.76
12.7
19.6
35.7
63.4
Open
2.498
1.997
1.798
1.508
1.199
(1)
1.0
1.001
(1)
0.7
0.700
(1) The maximum input voltage is duty cycle limited to (VO × 12) or 14 volts, whichever is less. The
maximum allowable input voltage is a function of switching frequency, and may increase or decrease
when the SmartSync feature is utilized. Please review the SmartSync section of the Application
Information for further guidance.
+Sense 17
+Sense
10
11
V
V
O
PTH08T250W
V
O
O
-Sense 16
Adj
V
GND GND GND GND
12 13
AGND
O
+
8
9
4
18
C
O
R
SET
1%
0.05 W
-Sense
GND
UDG-07049
(1) RSET: Use a 0.05 W resistor with a tolerance of 1% and temperature stability of 100 ppm/°C (or better). Connect the
resistor directly between pins 18 and 4, as close to the regulator as possible, using dedicated PCB traces.
(2) Never connect capacitors from VO Adjust to either + Sense, GND, or VO. Any capacitance added to the VO Adjust pin
affects the stability of the regulator.
Figure 11. VO Adjust Resistor Placement
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Table 3. Output Voltage Set-Point Resistor Values
VO Required (V)
RSET (kΩ)
Open
412
VO Required (V)
2.10
RSET (kΩ)
8.66
7.50
6.65
5.90
5.23
4.64
4.02
3.57
3.09
2.67
2.26
1.96
1.62
1.30
1.02
0.768
(1)
0.70
(1)
0.75
2.20
(1)
0.80
205
2.30
(1)
0.85
133
2.40
(1)
0.90
97.6
78.7
63.4
46.4
35.7
28.7
23.7
19.6
16.9
14.7
12.7
11.0
9.76
2.50
(1)
0.95
2.60
(1)
1.00
2.70
(1)
1.10
2.80
1.20
1.30
1.40
1.50
1.60
1.70
1.80
1.90
2.00
2.90
3.00
3.10
3.20
3.30
3.40
3.50
3.60
(1) For output voltages less than 1.2 V, the output ripple may increase (up to 2×) when operating at input
voltages greater than (VO × 12). Adjusting the switching frequency using the SmartSync feature may
increase or decrease this ratio. Please review the SmartSync section of the Application Information for
further guidance.
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CAPACITOR RECOMMENDATIONS FOR THE PTH08T250W POWER MODULE
Capacitor Technologies
Electrolytic Capacitors
When using electrolytic capacitors, high quality, computer-grade electrolytic capacitors are recommended.
Aluminum electrolytic capacitors provide adequate decoupling over the frequency range, 2 kHz to 150 kHz,
and are suitable when ambient temperatures are above -20°C. For operation below -20°C, tantalum,
ceramic, or OS-CON type capacitors are required.
Ceramic Capacitors
Above 150 kHz the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic
capacitors have very low ESR and a resonant frequency higher than the bandwidth of the regulator. They
can be used to reduce the reflected ripple current at the input as well as improve the transient response of
the output.
Tantalum, Polymer-Tantalum Capacitors
Tantalum type capacitors may only used on the output bus, and are recommended for applications where the
ambient operating temperature is less than 0°C. The AVX TPS series and Kemet capacitor series are
suggested over many other tantalum types due to their lower ESR, higher rated surge, power dissipation,
and ripple current capability. Tantalum capacitors that have no stated ESR or surge current rating are not
recommended for power applications.
Input Capacitor (Required)
The PTH08T250W requires a minimum input capacitance of 1000μF. The ripple current rating of the input
capacitor must be at least 600mArms. An optional 22μF X5R/X7R ceramic capacitor is recommended to reduce
RMS ripple current.
Input Capacitor Information
The size and value of the input capacitor is determined by the converter’s transient performance capability. This
minimum value assumes that the converter is supplied with a responsive, low inductance input source. This
source should have ample capacitive decoupling, and be distributed to the converter via PCB power and ground
planes.
Ceramic capacitors should be located as close as possible to the module's input pins, within 0.5 inch (1,3 cm).
Adding ceramic capacitance is necessary to reduce the high-frequency ripple voltage at the module's input. This
reduces the magnitude of the ripple current through the electroytic capacitor, as well as the amount of ripple
current reflected back to the input source. Additional ceramic capacitors can be added to further reduce the RMS
ripple current requirement for the electrolytic capacitor.
The main considerations when selecting input capacitors are the RMS ripple current rating, temperature stability,
and less than 100 mΩ of equivalent series resistance (ESR).
Regular tantalum capacitors are not recommended for the input bus. These capacitors require a recommended
minimum voltage rating of 2 × (maximum dc voltage + ac ripple). This is standard practice to ensure reliability. No
tantalum capacitors were found with a sufficient voltage rating to meet this requirement.
When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these
applications, OS-CON, poly-aluminum, and polymer-tantalum types should be considered.
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Output Capacitor (Required)
The PTH08T250W requires a minimum output capacitance of 660μF of polymer-aluminum, tantulum, or
polymer-tantalum type.
The required capacitance above the minimum is determined by actual transient deviation requirements. See the
TurboTrans Technology application section within this document for specific capacitance selection.
Output Capacitor Information
When selecting output capacitors, the main considerations are capacitor type, temperature stability, and ESR.
When using the TurboTrans feature, the capacitance × ESR product should also be considered (see the
following section).
Ceramic output capacitors added for high-frequency bypassing should be located as close as possible to the
load to be effective. Ceramic capacitor values below 10μF should not be included when calculating the total
output capacitance value.
When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these
applications, OS-CON, poly-aluminum, and polymer-tantalum types should be considered.
TurboTrans Output Capacitance
TurboTrans allows the designer to optimize the output capacitance according to the system transient design
requirement. High quality, ultra-low ESR capacitors are required to maximize TurboTrans effectiveness. When
using TurboTrans, the capacitor's capacitance (μF) × ESR (mΩ) product determines its capacitor type; Type A,
B, or C. These three types are defined as follows:
Type A = (100 ≤ capacitance × ESR ≤ 1000) (e.g. ceramic)
Type B = (1000 < capacitance × ESR ≤ 5000) (e.g. polymer-tantalum)
Type C = (5000 < capacitance × ESR ≤ 10,000) (e.g. OS-CON)
When using more than one type of output capacitor, select the capacitor type that makes up the majority of your
total output capacitance. When calculating the C×ESR product, use the maximum ESR value from the capacitor
manufacturer's datasheet.
Working Examples:
A capacitor with a capacitance of 330μF and an ESR of 5mΩ, has a C×ESR product of 1650μFxmΩ (330μF ×
5mΩ). This is a Type B capacitor. A capacitor with a capacitance of 1000μF and an ESR of 8mΩ, has a C×ESR
product of 8000μFxmΩ (1000μF × 8mΩ). This is a Type C capacitor.
See the TurboTrans Technology application section within this document for specific capacitance selection.
Table 4 includes a preferred list of capacitors by type and vendor. See the Output Bus / TurboTrans column.
Non-TurboTrans Output Capacitance
If the TurboTrans feature is not used, minimum ESR and maximum capacitor limits must be followed. System
stability may be effected and increased output capacitance may be required without TurboTrans.
When using the PTH08T250W, observe the minimum ESR of the entire output capacitor bank. The minimum
ESR limit of the output capacitor bank is 7mΩ. A list of preferred low-ESR type capacitors, are identified in
Table 4.
When using the PTH08T250W without the TurboTrans feature, the maximum amount of capacitance is tbdμF of
ceramic type. Large amounts of capacitance may reduce system stability.
Utilizing the TurboTrans feature improves system stability, improves transient response, and reduces the
amount of output capacitance required to meet system transient design requirements.
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Designing for Fast Load Transients
The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of
2.5A/µs. The typical voltage deviation for this load transient is given in the Electrical Characteristics table using
the minimum required value of output capacitance. As the di/dt of a transient is increased, the response of a
converter’s regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent
limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability.
If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with
additional low ESR ceramic capacitor decoupling. Generally, with load steps greater than 100A/μs, adding
multiple 10μF ceramic capacitors plus 10×1μF, and numerous high frequency ceramics (≤0.1μF) is all that is
required to soften the transient higher frequency edges. The PCB location of these capacitors in relation to the
load is critical. DSP, FPGA and ASIC vendors identify types, location and amount of capacitance required for
optimum performance. Low impedance buses, unbroken PCB copper planes, and components located as close
as possible to the high frequency devices are essential for optimizing transient performance.
Capacitor Table
Table 4 identifies the characteristics of acceptable capacitors from a number of vendors. The recommended
number of capacitors required at both the input and output buses is identified for each capacitor.
This is not an extensive capacitor list. Capacitors from other vendors are available with comparable
specifications. Those listed are for guidance. The RMS ripple current rating and ESR (at 100 kHz) are critical
parameters necessary to ensure both optimum regulator performance and long capacitor life.
Table 4. Input/Output Capacitors(1)
Capacitor Characteristics
Quantity
Output Bus
Max
Max.
Ripple
Capacitor Vendor,
Type Series (Style)
Working
Voltage
(V)
ESR at
Value
(µF)
Current
at 85°C
(Irms)
(mA)
Physical
Size (mm)
Input
Bus
No
100
kHz
(Ω)
Vendor Part No.
TurboTrans
Turbo
Trans
(Cap Type)(2)
Panasonic
25
25
25
25
1000
1800
2200
1000
0.043
0.029
0.028
0.060
1690
2205
2490
1100
16 × 15
16 × 20
1
1
1
1
≥ 2(3)
≥ 1(3)
≥ 1(3)
≥ 2(5)
N/R(4)
N/R(4)
N/R(4)
N/R(4)
EEUFC1E102S
FC (Radial)
EEUFC1E182
EEVFC1E222N
EEVFK1V102Q
FC (SMD)
18 × 21,5
12,5×13,5
FK (SMD)
United Chemi-Con
PTB Poly-Tant (SMD)
LXZ, Aluminum (Radial)
PS, Poly-Alum (Radial)
PXA, Poly-Alum (SMD)
PS, Poly-Alum (Radial)
PXA, Poly-Alum (Radial)
6.3
25
330
680
330
330
680
680
0.025
0.068
0.014
0.014
0.010
0.010
2600
1050
5060
5050
5500
5500
7,3x4,3x 2,8 N/R(6) 2 - 4(3)
(C) ≥ 2(2)
N/R(4)
(B) ≥ 2(2)
(B) ≥ 2(2)
(C) ≥ 1(2)
(C) ≥ 1(2)
4PTB337MD6TER
LXZ25VB681M10X20LL
16PS330MJ12
10 × 16
10 × 12,5
10 × 12,2
10 × 12,5
10 × 12,2
1
2
1 - 3(3)
2 - 3
2 - 3
1 - 2
1 - 2
16
16
2
PXA16VC331MJ12TP
6PS680MJ12
6.3
6.3
N/R(6)
N/R(6)
PXA6.3VC681MJ12TP
(1) Capacitor Supplier Verification
Please verify availability of capacitors identified in this table. Capacitor suppliers may recommend alternative part numbers because of
limited availability or obsolete products. In some instances, the capacitor product life cycle may be in decline and have short-term
consideration for obsolescence.
RoHS, Lead-free and Material Details
See the capacitor suppliers regarding material composition, RoHS status, lead-free status, and manufacturing process requirements.
Component designators or part number deviations can occur when material composition or soldering requirements are updated.
(2) Required capacitors with TurboTrans. See the TransTrans Application information for Capacitor Selection
Capacitor Type Groups by ESR (Equivalent Series Resistance) :
a. Type A = (100 < capacitance × ESR ≤ 1000)
b. Type B = (1,000 < capacitance × ESR ≤ 5,000)
c. Type C = (5,000 < capacitance × ESR ≤ 10,000)
(3) Total bulk nonceramic capacitors on the output bus with ESR of ≥ 15mΩ to ≤ 30mΩ requires an additional ≥ 200 μF of ceramic
capacitor.
(4) Aluminum Electrolytic capacitor not recommended for the TurboTrans due to higher ESR × capacitance products. Aluminum and higher
ESR capacitors can be used in conjunction with lower ESR capacitance.
(5) Output bulk capacitor's maximum ESR is ≥ 30 mΩ. Additional ceramic capacitance of ≥ 200 μF is required.
(6) N/R – Not recommended. The voltage rating does not meet the minimum operating limits.
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Table 4. Input/Output Capacitors (continued)
Capacitor Characteristics
Quantity
Output Bus
Max
Ripple
Current
at 85°C
(Irms)
(mA)
Max.
ESR at
100
kHz
(Ω)
Capacitor Vendor,
Type Series (Style)
Working
Voltage
(V)
Value
(µF)
Physical
Size (mm)
Input
Bus
No
Vendor Part No.
TurboTrans
Turbo
Trans
(Cap Type)(2)
Nichicon, Aluminum
HD (Radial)
25
25
35
2.0
560
680
560
390
0.060
0.038
0.048
0.005
1060
1430
1360
4000
12,5 × 15
10 × 16
16 × 15
1
1
1
≥ 2(7)
≥ 2(7)
≥ 2(7)
N/R(9)
N/R(8)
N/R(8)
N/R(8)
UPM1E561MHH6
UHD1C681MHR
UPM1V561MHH6
EEFSE0J391R (VO ≤ 1.6V)(11)
PM (Radial)
Panasonic, Poly-Alum
Sanyo
7,3×4,3×4,2 N/R(9)
(B) ≥ 2(10)
TPE, Poscap (SMD)
TPE Poscap(SMD)
TPD Poscap (SMD)
SA, OS-CON (Radial)
SP OS-CON ( Radial)
SEPC, OS-CON (Radial)
SVPA, OS-CON (SMD)
AVX Tantalum, Series 3
TPM Multianode
4
680
470
1000
1000
470
330
820
680
470
1000
470
330
680
0.015
0.007
0.005
0.015
0.015
0.016
0.012
0.035
0.018
0.035
0.040
0.015
0.005
3900
4400
6100
9700
4500
4700
4700
2400
3800
2405
2000
3800
7300
7,3 × 4,3
7,3 × 4,3
7,3 × 4,3
16 × 26
N/R(9)
N/R(9)
N/R(9)
1
1 - 3
1 - 2
1
(C) ≥ 1(10)
(B) ≥ 2(10)
(B) ≥ 1(10)
N/R(8)
(C) ≥ 2(10)
(B) ≥ 2(10)
(C) ≥ 1(10)(7) 6SVPC820M
N/R(8)
(C) ≥ 2(10)(7) TPME687M006#0018
N/R(8)
N/R(8)
4TPE680MF (VO ≤ 2.8V)(11)
2R5TPE470M7 (VO ≤ 1.8V)(11)
2R5TPD1000M5 (VO ≤1.8V)(11)
16SA1000M
2.5
2.5
16
10
16
6.3
6.3
6.3
4
1 - 3
1 - 3
2 - 3
10 × 11,5
10 × 12,7
8 × 11,9
7,3×4,3×4,1 N/R(9) 2 - 7(7)
7,3×4,3×4,1 N/R(9) 2 - 3(7)
N/R(9)
10SP470M
2
16SVP330M
N/R(9) 1 - 2(7)
TPSE477M010R0045
TPS Series III (SMD)
Kemet, Poly-Tantalum
T520 (SMD)
7,3 × 5,7
7,3×4,3×4
7,3×4,3×4
7,3×4,3×4
N/R(9) 2 - 7(7)
N/R(9) 2 - 7(7)
N/R(9)
N/R(9)
TPSV108K004R0035 (VO≤2.2V)(11)
6.3
6.3
4
T520X337M010AS
T530X337M010AS
2 - 3
1
(B) ≥ 2(10)
(B) ≥ 1(10)
T530 (SMD)
T530X687M004ASE005
(VO≤3.5V)(11)
T530 (SMD)
2.5
1000
0.005
7300
7,3×4,3×4
N/R(9)
1
(B) ≥ 1(10)
T530X108M2R5ASE005 (VO≤2.0V)(11)
Vishay-Sprague
594D, Tantalum (SMD)
94SA, Os-con (Radial)
94SVP Os-Con (SMD)
Kemet, Ceramic X5R
(SMD)
6.3
16
1000
1000
330
10
0.030
0.015
0.017
0.002
0.002
0.002
2890
9740
4500
–
7,2×5,7×4,1 N/R(9)
1 - 6
1 - 3
N/R(8)
N/R(8)
(C) ≥ 1(10)
(A)(10)
(A)(10)
(A)(10)
(A)(10)
(A)(10)
(A)(10)
(A)(10)
(A)(10)
(A)(10)
(A)(10)
594D108X06R3R2TR2T
94SA108X0016HBP
94SVP827X06R3F12
C1210C106M4PAC
C1210C476K9PAC
GRM32ER60J107M
GRM32ER60J476M
GRM32ER61E226K
GRM32DR61C106K
C3225X5R0J107MT
C3225X5R0J476MT
C3225X5R1C106MT0
C3225X5R1C226MT
16 × 25
10 × 12,7
3225
1
16
2
1
2 - 3
16
≥ 1(12)
≥ 1(12)
≥ 1(12)
≥ 1(12)
≥ 1(12)
≥ 1(12)
≥ 1(12)
≥ 1(12)
≥ 1(12)
≥ 1(12)
6.3
6.3
6.3
25
47
N/R(9)
N/R(9)
N/R(9)
1
Murata, Ceramic X5R
(SMD)
100
47
–
3225
22
16
10
1
TDK, Ceramic X5R
(SMD)
6.3
6.3
16
100
47
0.002
–
3225
N/R(9)
N/R(9)
1
10
16
22
1
(7) Total bulk nonceramic capacitors on the output bus with ESR of ≥ 15mΩ to ≤ 30mΩ requires an additional ≥ 200 μF of ceramic
capacitor.
(8) Aluminum Electrolytic capacitor not recommended for the TurboTrans due to higher ESR × capacitance products. Aluminum and higher
ESR capacitors can be used in conjunction with lower ESR capacitance.
(9) N/R – Not recommended. The voltage rating does not meet the minimum operating limits.
(10) Required capacitors with TurboTrans. See the TransTrans Application information for Capacitor Selection
Capacitor Type Groups by ESR (Equivalent Series Resistance) :
a. Type A = (100 < capacitance × ESR ≤ 1000)
b. Type B = (1,000 < capacitance × ESR ≤ 5,000)
c. Type C = (5,000 < capacitance × ESR ≤ 10,000)
(11) The voltage rating of this capacitor only allows it to be used for output voltage that is equal to or less than 80% of the working voltage.
(12) Maximum ceramic capacitance on the output bus is ≤ tbd μF. Any combination of the ceramic capacitor values is limited to tbd μF for
non-TurboTrans applications. The total capacitance is limited to tbd μF which includes all ceramic and non-ceramic types.
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TurboTrans™ Technology
TurboTrans technology is a feature introduced in the T2 generation of the PTH/PTV family of power modules.
TurboTrans optimizes the transient response of the regulator with added external capacitance using a single
external resistor. Benefits of this technology include reduced output capacitance, minimized output voltage
deviation following a load transient, and enhanced stability when using ultra-low ESR output capacitors. The
amount of output capacitance required to meet a target output voltage deviation is reduced with TurboTrans
activated. Likewise, for a given amount of output capacitance, with TurboTrans engaged, the amplitude of the
voltage deviation following a load transient is reduced. Applications requiring tight transient voltage tolerances
and minimized capacitor footprint area benefits greatly from this technology.
TurboTrans™ Selection
Utilizing TurboTrans requires connecting a resistor, RTT, between the +Sense pin (pin17) and the TurboTrans pin
(pin19). The value of the resistor directly corresponds to the amount of output capacitance required. All T2
products require a minimum value of output capacitance whether or not TurboTrans is utilized. For the
PTH08T250W, the minimum required capacitance is 1000μF. When using TurboTrans, capacitors with a
capacitance × ESR product below 10,000 μF×mΩ are required. (Multiply the capacitance (in μF) by the ESR (in
mΩ) to determine the capacitance × ESR product.) See the Capacitor Selection section of the datasheet for a
variety of capacitors that meet this criteria.
Figure 12 thru Figure 15 show the amount of output capacitance required to meet a desired transient voltage
deviation with and without TurboTrans for several capacitor types; TypeB (e.g. polymer-tantalum) and TypeC
(e.g. OS-CON). To calculate the proper value of RTT, first determine your required transient voltage deviation
limits and magnitude of your transient load step. Next, determine what type of output capacitors to be used. (If
more than one type of output capacitor is used, select the capacitor type that makes up the majority of your total
output capacitance.) Knowing this information, use the chart in Figure 12 thru Figure 15 that corresponds to the
capacitor type selected. To use the chart, begin by dividing the maximum voltage deviation limit (in mV) by the
magnitude of your load step (in Amps). This gives a mV/A value. Find this value on the Y-axis of the appropriate
chart. Read across the graph to the 'With TurboTrans' plot. From this point, read down to the X-axis which lists
the minimum required capacitance, CO, to meet that transient voltage deviation. The required RTT resistor value
can then be calculated using the equation or selected from the TurboTrans table. The TurboTrans tables include
both the required output capacitance and the corresponding RTT values to meet several values of transient
voltage deviation for 25%(12.5A), 50%(25A), and 75%(37.5A) output load steps.
The chart can also be used to determine the achievable transient voltage deviation for a given amount of output
capacitance. Selecting the amount of output capacitance along the X-axis, reading up to the 'With TurboTrans'
curve, and then over to the Y-axis, gives the transient voltage deviation limit for that value of output capacitance.
The required RTT resistor value can be calculated using the equation or selected from the TurboTrans table.
As an example, let's look at a 12-V application requiring a 60 mV deviation during an 15A load transient. A
majority of 470μF, 10mΩ ouput capacitors are used. Use the 12 V, Type B capacitor chart, Figure 12. Dividing
60mV by 15A gives 4mV/A transient voltage deviation per amp of transient load step. Select 4mV/A on the
Y-axis and read across to the 'With TurboTrans' plot. Following this point down to the X-axis gives us a minimum
required output capacitance of approximately 1500μF. The required RTT resistor value for 1500μF can then be
calculated or selected from Table 5. The required RTT resistor is approximately 17.4kΩ.
To see the benefit of TurboTrans, follow the 4mV/A marking across to the 'Without TurboTrans' plot. Following
that point down shows that you would need a minimum of 7500μF of output capacitance to meet the same
transient deviation limit. This is the benefit of TurboTrans.
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PTH08T250W Type B Capacitors
12-V INPUT
5-V INPUT
8
7
8
7
6
Without TurboTrans
Without TurboTrans
6
5
5
4
4
3
3
2
2
With TurboTrans
With TurboTrans
1
1
C - Capacitance - mF
C - Capacitance - mF
Figure 12. Capacitor Type B,
1000 < C(μF)×ESR(mΩ) ≤ 5000 (e.g. Polymer-Tantalum)
Figure 13. Capacitor Type B,
1000 < C(μF)×ESR(mΩ) ≤ 5000 (e.g. Polymer-Tantalum)
Table 5. Type B TurboTrans CO Values and Required RTT Selection Table
Transient Voltage Deviation (mV)
12 Volt Input
5 Volt Input
25% load step
(12.5 A)
50% load step
(25 A)
75% load step
(37.5 A)
CO
Minimum
RTT
Required
CO
Minimum
RTT
Required
Required Output
Capacitance (μF)
TurboTrans
Resistor (kΩ)
Required Output
Capacitance (μF)
TurboTrans
Resistor (kΩ)
100
85
75
60
50
40
30
25
200
170
150
120
100
70
300
255
225
180
150
105
90
660
660
open
open
143
660
750
open
226
800
870
93.1
34.8
18.7
8.45
1.87
short
1050
1300
1750
2500
3100
46.4
24.9
11.3
3.48
0.649
1150
1450
1950
2800
4000
60
50
75
RTT Resistor Selection
The TurboTrans resistor value, RTT can be determined from the TurboTrans programming Equation 2.
1- C 3300
(
O
)
R
= 40´
(kW)
TT
5´ C 3300 -1
)
O
(
(2)
Where CO is the total output capacitance in μF. CO values greater than or equal to 3300 μF require RTT to be a
short, 0Ω. (Equation 2 results in a negative value for RTT when CO > 3300 μF.)
To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The value
of RTT must be calculated using the minimum required output capacitance determined from Figure 12 and
Figure 13.
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PTH08T250W Type C Capacitors
12-V INPUT
5-V INPUT
8
7
6
8
7
6
Without TurboTrans
Without TurboTrans
5
4
5
4
3
3
2
2
With TurboTrans
With TurboTrans
1
1
C - Capacitance - mF
C - Capacitance - mF
Figure 14. Capacitor Type C,
5000 < C(μF)×ESR(mΩ) ≤ 10,000(e.g. OS-CON)
Figure 15. Capacitor Type C,
5000 < C(μF)×ESR(mΩ) ≤ 10,000(e.g. OS-CON)
Table 6. Type C TurboTrans CO Values and Required RTT Selection Table
Transient Voltage Deviation (mV)
12 Volt Input
5 Volt Input
25% load
step
(12.5 A)
50% load
step
(25 A)
75% load
step
(37.5 A)
CO
RTT
Required
TurboTrans
Resistor (kΩ)
CO
RTT
Required
TurboTrans
Resistor (kΩ)
Minimum Required
Output
Capacitance (μF)
Minimum Required
Output
Capacitance (μF)
85
75
60
50
40
30
25
20
170
150
120
100
80
255
225
180
150
120
90
660
720
open
340
660
800
open
143
46.4
22.6
10.5
2.61
short
-
950
64.9
30.9
14.3
5.23
1.87
short
1050
1350
1800
2650
3850
-
1200
1600
2250
2800
6000
60
50
75
40
60
RTT Resistor Selection
The TurboTrans resistor value, RTT can be determined from the TurboTrans programming Equation 3.
1- C 3300
(
O
)
R
= 40´
(kW)
TT
5´ C 3300 -1
)
O
(
(3)
Where CO is the total output capacitance in μF. CO values greater than or equal to 3300 μF require RTT to be a
short, 0Ω. (Equation results in negative value for RTT when CO 3300 μF).
3
a
>
To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The value
of RTT must be calculated using the minimum required output capacitance determined from Figure 14 and
Figure 15.
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TurboTrans
RTT
7.87 kW
AutoTrack
TurboTrans
+Sense
VO
+Sense
VI
VI
VO
PTH08T250W
Inhibit/UVLO
+
-Sense
VOAdj
L
O
A
D
CO
2000 mF
Type B
+
SmartSync Config GND AGND
CI
CI2
1000 mF
(Required)
22 mF
RSET
-Sense
GND
GND
UDG-07101
Figure 16. Typical TurboTrans™ Application
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Soft-Start Power Up
The Auto-Track feature allows the power-up of multiple PTH/PTV modules to be directly controlled from the
Track pin. However in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track
pin should be directly connected to the input voltage, VI (see Figure 17).
V
I
(2 V/div)
20
Track
V
I
6
7
V
V
V
V
I
I
I
I
PTH08T250W
14
15
+
C
I
GND GND GND GND
12 13
V
O
8
9
(500 mV/div)
GND
I
I
(5 A/div)
UDG-07102
t − Time − 10 ms/div
Figure 17. Defeating the Auto-Track Function
Figure 18. Power-Up Waveform
When the Track pin is connected to the input voltage the Auto-Track function is permanently disengaged. This
allows the module to power up entirely under the control of its internal soft-start circuitry. When power up is
under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate.
From the moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically
10 ms–15 ms) before allowing the output voltage to rise.
The output then progressively rises to the module’s setpoint voltage. Figure 18 shows the soft-start power-up
characteristic of the PTH08T250W operating from a 5-V input bus and configured for a 1.2-V output. The
waveforms were measured with a 25-A constant current load and the Auto-Track feature disabled. The initial rise
in input current when the input voltage first starts to rise is the charge current drawn by the input capacitors.
Power-up is complete within 30 ms.
Differential Output Voltage Remote Sense
Differential remote sense improves the load regulation performance of the module by allowing it to compensate
for any IR voltage drop between its output and the load in either the positive or return path. An IR drop is caused
by the output current flowing through the small amount of pin and trace resistance. With the sense pins
connected, the difference between the voltage measured directly between the VO and GND pins, and that
measured at the Sense pins, is the amount of IR drop being compensated by the regulator. This should be
limited to a maximum of 0.3V.
If the remote sense feature is not used at the load, connect +Sense (pin 17) to VO (pin11) and connect –Sense
(pin 16) to the module GND (pin 13).
The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency
dependent components that may be placed in series with the converter output. Examples include OR-ing
diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense
connection they are effectively placed inside the regulation control loop, which can adversely affect the
stability of the regulator.
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On/Off Inhibit
For applications requiring output voltage on/off control, the PTH08T250W incorporates an Inhibit control pin. The
inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be turned
off. The power modules function normally when the Inhibit pin is left open-circuit, providing a regulated output
whenever a valid source voltage is connected to VI with respect to GND.
Figure 19 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit input
has its own internal pull-up. An external pull-up resistor should never be used with the inhibit pin. The input is not
compatible with TTL logic devices. An open-collector (or open-drain) discrete transistor is recommended for
control.
Turning Q1 on applies a low voltage to the Inhibit control pin and disables the output of the module. If Q1 is then
turned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within 20
ms. Figure 20 shows the typical rise in both the output voltage and input current, following the turn-off of Q1. The
turn off of Q1 corresponds to the rise in the waveform, VINH. The waveforms were measured with a 25-A constant
current load.
V
I
V
O
6
7
V
V
V
V
(500 mV/div)
I
I
I
I
I
I
14
15
PTH08T250W
(5 A/div)
+
C
I
21 Inhibit/UVLO
GND GND GND GND
12 13
1=Inhibit
GND
8
9
Q1
BSS 138
V
INH
UDG-07104
(2 V/div)
t − Time − 20 ms/div
Figure 20. Power-Up Response from Inhibit Control
Figure 19. On/Off Inhibit Control Circuit
Overcurrent Protection
For protection against load faults, all modules incorporate output overcurrent protection. Applying a load that
exceeds the regulator's overcurrent threshold causes the regulated output to shut down. Following shutdown, the
module periodically attempts to recover by initiating a soft-start power-up. This is described as a hiccup mode of
operation, whereby the module continues in a cycle of successive shutdown and power up until the load fault is
removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is
removed, the module automatically recovers and returns to normal operation.
Overtemperature Protection (OTP)
A thermal shutdown mechanism protects the module’s internal circuitry against excessively high temperatures. A
rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. If the
internal temperature exceeds the OTP threshold, the module’s Inhibit control is internally pulled low. This turns
the output off. The output voltage drops as the external output capacitors are discharged by the load circuit. The
recovery is automatic, and begins with a soft-start power up. It occurs when the sensed temperature decreases
by about 10°C below the trip point.
The overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator.
Operation at or close to the thermal shutdown temperature is not recommended and reduces the long-term
reliability of the module. Always operate the regulator within the specified safe operating area (SOA) limits for
the worst-case conditions of ambient temperature and airflow.
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Smart Sync
Smart Sync is a feature that allows multiple power modules to be synchronized to a common frequency. When
not used, this pin must be connect to GND. Driving the Smart Sync pins with an external oscillator set to the
desired frequency, synchronizes all connected modules to the selected frequency. The synchronization
frequency can be higher or lower than the nominal switching frequency of the modules within the range of
240 kHz to 400 kHz.
Synchronizing modules powered from the same bus eliminates beat frequencies reflected back to the input
supply, and also reduces EMI filtering requirements. Eliminating the low beat frequencies (usually<10kHz) allows
the EMI filter to be designed to attenuate only the synchronization frequency. Power modules can also be
synchronized out of phase to minimize ripple current and reduce input capacitance requirements.
The PTH08T250W requires that the external synchronization frequency be present before a valid input voltage is
present or before release of the inhibit control. Figure 21 shows a standard circuit with two modules syncronized
180° out of phase using a D flip-flop.
0°
Track
Sync
TurboTrans
+Sense
V = 5 V
I
V
V
O1
I
PTH08T250W
V
O
SN74LVC2G74
+
-Sense
+
V
CC
C
I1
GND AGND
V Adj
O
C
O1
CLK
CLK
D
PRE
Q
f
= 2 x f
MOD
CLK
R
SET1
GND
180°
GND
Q
Track
Sync
TurboTrans
+Sense
V
O2
V
I
PTH08T240W
V
O
+
-Sense
V Adj
C
I2
GND
+
O
C
O2
R
SET2
GND
UDG-07105
Figure 21. Typical Smart Sync Schematic
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Operating the PTH08T250W with a low duty cycle may increase the output voltage ripple. When operating at the
nominal switching frequency, input voltages greater than (VO × 12) may cause the output voltage ripple to
increase (up to 2×).
When using Smart Sync, the minimum duty cycle varies as a function of output voltage and switching frequency.
Synchronizing to a higher frequency causes greater restrictions on the duty cycle range. For a given switching
frequency, Figure 22 shows the operating region where the output voltage ripple meets the electrical
specifications. Operation above a given curve may cause the output voltage ripple to increase (up to 2×). For
example, a module operating at 400 kHz and an output voltage of 1.2 V, the maximum input voltage that meets
the output voltage ripple specification is 11 V. Exceeding 11 V may cause in an increase in output voltage ripple.
As shown in Figure 22, operating below 6V allows operation down to the minimum output voltage over the entire
synchronization frequency range without affecting the output voltage ripple. See the Electrical Characteristics
table for the synchronization frequency range limits.
The maximum output current that a single module can deliver may also be affected by the sychronization
frequency. See Figure 23 below for load current derating when sychronizing at frequencies greater than 330 kHz.
First consult the temperature derating graphs in the Typical Characteristics section to determine the maximum
output current based on operating conditions. Any derating due to the SmartSync frequency is in addition to the
temperature derating.
RECOMMENDED INPUT VOLTAGE
vs
FREQUENCY AND OUTPUT VOLTAGE
MAXIMUM LOAD CURRENT
vs
SMARTSYNC FREQUENCY
15
14
13
12
11
10
100
98
96
94
92
90
400
350
88
86
9
8
300
f
(kHz)
SW
240
240
300
350
400
84
82
80
7
6
5
240 260 280 300 320 340 360 380 400
0.7 0.9
1.1 1.3
V
1.5 1.7
- Output Voltage - V
1.9 2.1 2.3 2.5
f
- SmartSync Frequency - kHz
SS
O
Figure 22.
Figure 23.
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Auto-Track™ Function
The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track
was designed to simplify the amount of circuitry required to make the output voltage from each module power up
and power down in sequence. The sequencing of two or more supply voltages during power up is a common
requirement for complex mixed-signal applications that use dual-voltage VLSI ICs such as the TMS320™ DSP
family, microprocessors, and ASICs.
How Auto-Track™ Works
(1)
Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin
.
This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage is
raised above the set-point voltage, the module output remains at its set-point (2). As an example, if the Track pin
of a 2.5-V regulator is at 1 V, the regulated output is 1 V. If the voltage at the Track pin rises to 3 V, the regulated
output does not go higher than 2.5 V.
When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a
volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow
a common signal during power up and power down. The control signal can be an externally generated master
ramp waveform, or the output voltage from another power supply circuit (3). For convenience, the Track input
incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable rising
waveform at power up.
Typical Auto-Track Application
The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track
compliant modules. Connecting the Track inputs of two or more modules forces their track input to follow the
same collective RC-ramp waveform, and allows their power-up sequence to be coordinated from a common
Track control signal. This can be an open-collector (or open-drain) device, such as a power-up reset voltage
supervisor IC. See U3 in Figure 24.
To coordinate a power-up sequence, the Track control must first be pulled to ground potential. This should be
done at or before input power is applied to the modules. The ground signal should be maintained for at least
20 ms after input power has been applied. This brief period gives the modules time to complete their internal
soft-start initialization (4), enabling them to produce an output voltage. A low-cost supply voltage supervisor IC,
with a built-in time delay, is an ideal component for automatically controlling the Track inputs at power up.
Figure 24 shows how the TL7712A supply voltage supervisor IC (U3) can be used to coordinate the sequenced
power up of PTH08T250W modules. The output of the TL7712A supervisor becomes active above an input
voltage of 3.6 V, enabling it to assert a ground signal to the common track control well before the input voltage
has reached the module's undervoltage lockout threshold. The ground signal is maintained until approximately 28
ms after the input voltage has risen above U3's voltage threshold, which is 4.3 V. The 28-ms time period is
controlled by the capacitor CT. The value of 2.2 µF provides sufficient time delay for the modules to complete
their internal soft-start initialization. The output voltage of each module remains at zero until the track control
voltage is allowed to rise. When U3 removes the ground signal, the track control voltage automatically rises. This
causes the output voltage of each module to rise simultaneously with the other modules, until each reaches its
respective set-point voltage.
Figure 25 shows the output voltage waveforms after input voltage is applied to the circuit. The waveforms, VO1
and VO2, represent the output voltages from the two power modules, U1 (3.3 V) and U2 (1.8 V), respectively.
VTRK, VO1, and VO2 are shown rising together to produce the desired simultaneous power-up characteristic.
The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltage
threshold, the ground signal is re-applied to the common track control. This pulls the track inputs to zero volts,
forcing the output of each module to follow, as shown in Figure 26. Power down is normally complete before the
input voltage has fallen below the modules' undervoltage lockout. This is an important constraint. Once the
modules recognize that an input voltage is no longer present, their outputs can no longer follow the voltage
applied at their track input. During a power-down sequence, the fall in the output voltage from the modules is
limited by the Auto-Track slew rate capability.
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Notes on Use of Auto-Track™
1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module
regulates at its adjusted set-point voltage.
2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp
speeds of up to 1 V/ms.
3. The absolute maximum voltage that may be applied to the Track pin is the input voltage VI.
4. The module cannot follow a voltage at its track control input until it has completed its soft-start initialization.
This takes about 20 ms from the time that a valid voltage has been applied to its input. During this period, it
is recommended that the Track pin be held at ground potential.
5. The Auto-Track function is disabled by connecting the Track pin to the input voltage (VI). When Auto-Track is
disabled, the output voltage rises according to its softstart rate after input power has been applied.
6. The Auto-Track pin should never be used to regulate the module's output voltage for long-term, steady-state
operation.
R
V
TT1
I
12 V
AutoTrack
TurboTrans
+Sense
V
V
I
I
V
O
V
U1
PTH08T210W
O1
8
3.3 V
V
O
V
CC
+
+
C
7
2
SENSE
I1
-Sense
C
O1
RESET
5
RESIN
V Adj
O
GND GND GND GND
U3
TL7712A
R
RESET
R
SET1
10 kW
1
3
REF
CT
RESET
GND
6
GND
4
C
C
T
REF
R
TT2
0.1 mF
2.2 mF
AutoTrack
TurboTrans
+Sense
V
V
V
V
I
I
I
I
V
O
V
U2
PTH08T250W
O2
1.8 V
V
O
+
+
-Sense
C
O2
C
I2
V Adj
O
GND GND GND GND AGND
R
SET2
GND
UDG-07106
Figure 24. Sequenced Power Up and Power Down Using Auto-Track
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V
(1 V/div)
TRK
V
(1 V/div)
TRK
V
1 (1 V/div)
O
V 1 (1 V/div)
O
V
2 (1 V/div)
O
V
2 (1 V/div)
O
t − Time − 20 ms/div
t − Time − 400 ms/div
Figure 25. Simultaneous Power Up
With Auto-Track Control
Figure 26. Simultaneous Power Down
With Auto-Track Control
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ADJUSTING THE UNDERVOLTAGE LOCKOUT (UVLO)
The PTH08T250W power modules incorporate an input undervoltage lockout (UVLO). The UVLO feature
prevents the operation of the module until there is sufficient input voltage to produce a valid output voltage. This
enables the module to provide a clean, monotonic powerup for the load circuit, and also limits the magnitude of
current drawn from the regulator’s input source during the power-up sequence.
The UVLO characteristic is defined by the ON threshold (VTHD) voltage. Below the ON threshold, the Inhibit
control is overridden, and the module does not produce an output. The hysteresis voltage, which is the difference
between the ON and OFF threshold voltages, is set at 500 mV. The hysteresis prevents start-up oscillations,
which can occur if the input voltage droops slightly when the module begins drawing current from the input
source.
The UVLO feature of the PTH08T250W module allows for limited adjustment of the ON threshold voltage. The
adjustment is made via the Inhbit/UVLO Prog control pin (pin 11) using a single resistor (see Figure 27). When
pin 11 is left open circuit, the ON threshold voltage is internally set to its default value, which is 4.3 volts. The ON
threshold might need to be raised if the module is powered from a tightly regulated 12-V bus. Adjusting the
threshold prevents the module from operating if the input bus fails to completely rise to its specified regulation
voltage.
Equation 4 determines the value of RUVLO required to adjust VTHD to a new value. The default value is 4.3 V, and
it may only be adjusted to a higher value.
230
R
=
(kW)
UVLO
V - 4.6
I
(4)
Table 7 lists the standard resistor values for RUVLO for different values of the on-threshold (VTHD) voltage.
Table 7. Standard RUVLO values for Various VTHD values
VTHD (V)
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
10.0
10.5
11.0
RUVLO (kΩ)
255
165
121
95.3
78.7
68.1
59.0
52.3
46.4
42.2
39.2
35.7
V
I
6
7
V
V
V
V
I
I
I
I
14
15
PTH08T250W
+
C
I
21 Inhibit/UVLO
GND GND GND GND
12 13
8
9
R
UVLO
GND
UDG-07103
Figure 27. Undervoltage Lockout Adjustment Resistor Placement
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CURRENT SHARING
The PTH08T250W module is capable of being configured in parallel with another PTH08T250W module to share
load current. To parallel the two modules, it is necessary to configure one module as the Master and one module
as the Slave. To configure a module as the Master, connect the CONFIG pin (pin 1) to GND. The CONFIG pin of
the Slave must be connected to VI. In order to share current, pins 2 thru 5 of both the Master and Slave must be
connected between the two modules. See Figure 33 for the recommended layout of pins 2 thru 5. The module
that is configured as the MASTER is used to control all of the functions of the two modules including Inhibit
ON/OFF control, AutoTrack sequencing, TurboTrans, SmartSync, +/- Remote Sense, and Output Voltage Adjust.
See the current sharing diagram in Figure 28 for connections. The MASTER and the SLAVE must be powered
from the same input voltage supply.
See Figure 28 and Table 8 for a diagram and connection description of each pin when two PTH08T250W
modules are being used in a MASTER/SLAVE configuration.
CURRENT SHARING DIAGRAM
R
TT
20
19
V
I
Track
TT
+Sense
6
7
V
V
V
V
I
I
I
I
+Sense 17
V
O
10
11
V
V
O
14
15
PTH08T250W
(Master)
O
+
-Sense 16
C
21 INH/UVLO
22 SmartSync
I1
L
O
A
D
1000 mF
V Adj
O
GND GND GND GND Config Share Comp CLKIO AGND
12 13 1 2 3 5 4
8
9
18
+
R
SET
C
O1
-Sense
GND
1%
0.05 W
660 mF
GND
20
Track
1
2
3
5
4
19
6
7
Config Share Comp CLKIO AGND
TT
V
V
V
V
I
I
I
I
+Sense 17
14
15
10
11
V
V
O
PTH08T250W
(Slave)
O
21 INH/UVLO
22 SmartSync
C
I2
+
-Sense 16
1000 mF
C
O2
660 mF
+
V Adj
GND GND GND GND
12 13
O
8
9
18
UDG-07050
Figure 28. Typical Current Sharing Diagram
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Table 8. Required Connections for Current Sharing(1)
TERMINAL
MASTER
SLAVE
NAME
VI
NO.
6,7,14,15 Connect to the Input Bus.
10,11 Connect to the Output Bus.
8,9,12,13 Connect to Common Power GND.
Connect to the Input Bus.
VO
Connect to the Output Bus.
GND
Connect to Common Power GND.
Inhibit and
UVLO
Use for Inhibit control & UVLO adjustments. If
unused leave open-circuit.
21
18
17
No Connection. Leave open-circuit.
No Connection. Leave open-circuit.
No Connection. Leave open-circuit.
Use to set the output voltage. Connect RSET
resistor between this pin and AGND (pin 4).
Vo Adjust
+Sense
Connect to the output voltage either at the load or
at the module (pin 11).
Connect to the output GND either at the load or at
the module (pin 13).
–Sense
16
20
19
No Connection. Leave open-circuit.
No Connection. Leave open-circuit.
No Connection. Leave open-circuit.
Track
Connect to Track control or to VI (pin 15).
Connect TurboTrans resistor, RTT, between this pin
and +Sense (pin 17).
TurboTrans™
Connect to an external clock. If unused connect to
GND.
SmartSync
22
Connect to Common Power GND.
(2)
CONFIG
Share
1
2
3
4
5
Connect to GND.
Connect to the Input Bus.
Connect to pin 2 of Master.
Connect to pin 3 of Master.
Connect to pin 4 of Master.
Connect to pin 5 of Master.
(2)
Connect to pin 2 of Slave.
(2)
Comp
Connect to pin 3 of Slave.
(3)
AGND
CLKIO
Connect to pin 4 of Slave.
(2)
Connect to pin 5 of Slave.
(1) For more details on the pin descriptions, please refer to the 'Terminal Functions' described in Table 1
(2) See Layer A in Figure 33 for recommended layout
(3) See Layer B in Figure 33 for recommended layout
Current Sharing and TurboTrans™
When using TurboTrans while paralleling two modules, the TurboTrans resistor, RTT, must be connected from the
TurboTrans pin (pin 19) of the Master module to the +Sense pin (pin 17) of the Master module. When paralleling
modules the procedure to calculate the proper value of output capacitance and RTT is similar to that explained in
the TurboTrans Selection section, however the values must be calculated for a single module. Therefore, the
total output current load step must be halved before determining the required output capacitance and the RTT
value as explained in the TurboTrans Selection section. The value of output capacitance calculated is the
minimum required output capacitance per module and the value of RTT must be calculated using this value of
output capacitance. The TurboTrans pin of the Slave module must be left open.
As an example, let's look at a 12-V application requiring a 60 mV deviation during an 30 A load transient. A
majority of 470 μF, 10 mΩ output capacitors are used. Use the 12 V, Type B capacitor chart, Figure 12. First,
halving the load transient gives 15 A. Dividing 60 mV by 15 A gives 4 mV/A transient voltage deviation per amp
of transient load step. Select 4 mV/A on the Y-axis and read across to the 'With TurboTrans' plot. Following this
point down to the X-axis gives us a minimum required output capacitance of approximately 1500 μF. This is the
minimum required output capacitance per module. Hence, the total minimum output capacitance would be
2x1500 μF = 3000 μF. The required RTT resistor value for 1500 μF can then be calculated or selected from
Table 5. The required RTT resistor is approximately 17.4 kΩ.
Current Sharing Thermal Derating Curves
The temperature derating curves in Figure 29 through Figure 32 represent the conditions at which internal
components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to two
PTH08T250W modules soldered directly to a 100 mm x 200 mm double-sided PCB with 2 oz. copper and the
direction of airflow from pins 10 to pins 22. For surface mount packages (AS and AZ suffix), multiple vias must
be utilized. Please refer to the mechanical specification for more information.
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AMBIENT TEMPERATURE
vs
AMBIENT TEMPERATURE
vs
OUTPUT CURRENT
OUTPUT CURRENT
90
80
90
80
70
70
400 LFM
400 LFM
200 LFM
60
50
40
60
50
40
V = 12 V
V = 12 V
I
I
V
= 3.3 V
V = 1.2 V
O
200 LFM
100 LFM
O
Airflow
400 LFM
Airflow
400 LFM
100 LFM
200 LFM
100 LFM
Nat conv
200 LFM
100 LFM
Nat conv
Natural
Convection
30
30
20
Natural
Convection
20
0
20
40
60
80
100
0
20
40
60
80
100
I
- Output Current - A
I
- Output Current - A
O
O
Figure 29.
Figure 30.
AMBIENT TEMPERATURE
vs
AMBIENT TEMPERATURE
vs
OUTPUT CURRENT
OUTPUT CURRENT
90
80
90
80
70
70
400 LFM
400 LFM
200 LFM
60
50
40
60
50
40
V = 5 V
V = 5 V
I
200 LFM
I
V
= 3.3 V
V = 1.2 V
O
O
100 LFM
Airflow
400 LFM
Airflow
400 LFM
100 LFM
200 LFM
100 LFM
Nat conv
200 LFM
100 LFM
Nat conv
Natural
30
30
20
Convection
Natural
Convection
20
0
20
40
60
80
100
0
20
40
60
80
100
I
- Output Current - A
I
- Output Current - A
O
O
Figure 31.
Figure 32.
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Current Sharing Layout
In current sharing applications the VI pins of both modules must be connected to the same input bus. The VO
pins of both modules are connected together to power the load. The GND pins of both modules are connected
via the GND plane. Four other inter-connection pins are connected between the modules. Figure 33 shows the
required layout of the inter-connection pins for two modules configured to share current. Notice that the Share
(pin 2) connection is routed between the Comp (pin 3) and CLKIO (pin 5) connections. AGND (pin 4) should be
connected as a thicker trace on an adjacent layer, running parallel to pins 2, 3 and 5. AGND must not be
connected to the GND plane.
1
1
LAYER A
MASTER
SLAVE
AGND
1
1
LAYER B
MASTER
SLAVE
UDG-07107
Figure 33. Recommended Layout of Inter-Connection Pins Between Two Current Sharing Modules
Prebias Startup Capability
A prebias startup condition occurs as a result of an external voltage being present at the output of a power
module prior to its output becoming active. This often occurs in complex digital systems when current from
another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another
path might be via clamp diodes as part of a dual-supply power-up sequencing arrangement. A prebias can cause
problems with power modules that incorporate synchronous rectifiers. This is because under most operating
conditions, these types of modules can sink as well as source output current.
The PTH family of power modules incorporate synchronous rectifiers, but does not sink current during startup(1),
or whenever the Inhibit pin is held low. However, to ensure satisfactory operation of this function, certain
conditions must be maintained(2). Figure 35 shows an application demonstrating the prebias startup capability.
The startup waveforms are shown in Figure 34. Note that the output current (IO) is negligible until the output
voltage rises above the voltage backfed through the intrinsic diodes.
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The prebias start-up feature is not compatible with Auto-Track. When the module is under Auto-Track control, it
sinks current if the output voltage is below that of a back-feeding source. To ensure a pre-bias hold-off one of
two approaches must be followed when input power is applied to the module. The Auto-Track function must
either be disabled(3), or the module’s output held off (for at least 50 ms) using the Inhibit pin. Either approach
ensures that the Track pin voltage is above the set-point voltage at start up.
1. Startup includes the short delay (approximately 10 ms) prior to the output voltage rising, followed by the rise
of the output voltage under the module’s internal soft-start control. Startup is complete when the output
voltage has risen to either the set-point voltage or the voltage at the Track pin, whichever is lowest.
2. To ensure that the regulator does not sink current when power is first applied (even with a ground signal
applied to the Inhibit control pin), the input voltage must always be greater than the output voltage throughout
the power-up and power-down sequence.
3. The Auto-Track function can be disabled at power up by immediately applying a voltage to the module’s
Track pin that is greater than its set-point voltage. This can be easily accomplished by connecting the Track
pin to VI.
VIN (1 V/div)
VO (1 V/div)
IO (2 A/div)
t - Time - 4 ms/div
Figure 34. Prebias Startup Waveforms
3.3 V
Track
+Sense
V
VI = 5 V
Vo = 2.5 V
Io
V
PTH08T220W
I
O
Inhibit GND Vadj
-Sense
VCCIO
VCORE
+
CO
+
+
R
CI
SET
2.37 kW
ASIC
Figure 35. Application Circuit Demonstrating Prebias Startup
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Tape & Reel and Tray Drawings
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PACKAGE OPTION ADDENDUM
www.ti.com
24-Sep-2007
PACKAGING INFORMATION
Orderable Device
PTH08T250WAD
PTH08T250WAS
PTH08T250WAST
PTH08T250WAZ
PTH08T250WAZT
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
DIP MOD
ULE
ECT
22
22
22
22
22
25
TBD
TBD
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
DIP MOD
ULE
ECU
ECU
BCU
BCU
25
DIP MOD
ULE
200
25
DIP MOD
ULE
DIP MOD
ULE
200
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
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information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
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Applications
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