REG101NA-2.8/3KG4 [TI]
DMOS 100mA Low-Dropout Regulator; DMOS 100mA时的低压差稳压器型号: | REG101NA-2.8/3KG4 |
厂家: | TEXAS INSTRUMENTS |
描述: | DMOS 100mA Low-Dropout Regulator |
文件: | 总18页 (文件大小:401K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
REG101
REG101
SBVS026D – JULY 2001 – REVISED SEPTEMBER 2005
DMOS
100mA Low-Dropout Regulator
DESCRIPTION
FEATURES
The REG101 is a family of low-noise, low-dropout linear
regulators with low ground pin current. Its new DMOS
topology provides significant improvement over previous
designs, including low dropout voltage (only 60mV typ at
full load), and better transient performance. In addition, no
output capacitor is required for stability, unlike conventional
low-dropout regulators that are difficult to compensate and
require expensive low ESR capacitors greater than 1µF.
● NEW DMOS TOPOLOGY:
Ultra Low Dropout Voltage:
60mV typ at 100mA
Output capacitor NOT required for stability
● FAST TRANSIENT RESPONSE
●
VERY LOW NOISE: 23µVrms
● HIGH ACCURACY: ±1.5% max
● HIGH EFFICIENCY:
Typical ground pin current is only 500µA (at IOUT = 100mA)
and drops to 10nA when not in enabled mode. Unlike regula-
tors with PNP pass devices, quiescent current remains rela-
tively constant over load variation and under dropout condi-
tions.
IGND = 500µA at IOUT = 100mA
Not Enabled: IGND = 10nA
● 2.5V, 2.8V, 2.85V, 3.0V, 3.3V, 5.0V, AND
The REG101 has very low output noise (typically 23µVrms
for VOUT = 3.3V with CNR = 0.01µF), making it ideal for use
in portable communications equipment. Accuracy is main-
tained over temperature, line, and load variations. Key
parameters are tested over the specified temperature range
(–40°C to +85°C).
ADJUSTABLE OUTPUT VERSIONS
● OTHER OUTPUT VOLTAGES AVAILABLE
UPON REQUEST
● FOLDBACK CURRENT LIMIT
● THERMAL PROTECTION
The REG101 is well protected—internal circuitry provides a
current limit that protects the load from damage. Thermal
protection circuitry keeps the chip from being damaged by
excessive temperature. The REG101 is available in the
SOT23-5 and the SO-8 packages.
● SMALL SURFACE-MOUNT PACKAGES:
SOT23-5 and SO-8
APPLICATIONS
● PORTABLE COMMUNICATION DEVICES
● BATTERY-POWERED EQUIPMENT
● PERSONAL DIGITAL ASSISTANTS
● MODEMS
● BAR-CODE SCANNERS
● BACKUP POWER SUPPLIES
Enable
Enable
VOUT
VIN
VOUT
VIN
REG101
(Fixed Voltage
Versions)
+
R1
Adj
R2
+
+
+
0.1µF
(1)
(1)
COUT
REG101-A
COUT
0.1µF
NR
Gnd
Gnd
NR = Noise Reduction
NOTE: (1) Optional.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 2000-2005, Texas Instruments Incorporated
www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
Supply Input Voltage, VIN .......................................................–0.3V to 12V
Enable Input Voltage, VEN ....................................................... –0.3V to VIN
Feedback Voltage, VFB ........................................................ –0.3V to 6.0V
NR Pin Voltage, VNR .............................................................–0.3V to 6.0V
Output Short-Circuit Duration ...................................................... Indefinite
Operating Temperature Range (TJ) ................................ –55°C to +125°C
Storage Temperature Range (TA) ................................... –65°C to +150°C
Lead Temperature (soldering, 3s, SOT23-5, and SO-8) ..................... +240°C
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
PACKAGE/ORDERING INFORMATION(1)
(2)
PRODUCT
VOUT
REG101xx-yyyy/zzz
XX is package designator.
YYYY is typical output voltage (5 = 5.0V, 2.85 = 2.85V, A = Adjustable).
ZZZ is package quantity.
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.
(2) Output voltages from 2.5V to 5.1V in 50mV increments are available; minimum order quantities apply. Contact factory for details and availability.
PIN CONFIGURATIONS
Top View
SO-8
SOT23-5
(2)
(2)
(3)
(3)
VOUT
VOUT
1
2
3
4
8
7
6
5
VIN
VIN
GND
1
2
3
5
4
VOUT
VIN
NR/Adjust(1)
GND
NC
Enable
NR/Adjust(1)
Enable
(N Package)
(U Package)
NOTE: (1) For REG101A-A: voltage setting resistor pin. All other models: noise reduction capacitor pin.
(2) Both pin 1 and pin 2 must be connected.
(3) Both pin 7 and pin 8 must be connected.
REG101
SBVS026D
2
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TJ = –40°C to +85°C.
At TJ = +25°C, VIN = VOUT + 1V (VOUT = 2.5V for REG101-A), VENABLE = 1.8V, IOUT = 2mA, CNR = 0.01µF, and COUT = 0.1µF(1), unless otherwise noted.
REG101NA
REG101UA
PARAMETER
CONDITION
MIN
TYP
MAX
UNITS
OUTPUT VOLTAGE
Output Voltage
VOUT
REG101-2.5
REG101-2.8
2.5
2.8
2.85
3.0
3.3
5
V
V
REG101-2.85
V
REG101-3.0
V
REG101-3.3
V
REG101-5
V
V
REG101-A
2.5
5.5
Reference Voltage
Adjust Pin Current
Accuracy
VREF
IADJ
1.267
0.2
V
1
µA
%
±0.5
±1.5
±2.2
Over Temperature
vs Temperature
Includes Line and Load
Over Temperature
%
dVOUT/dT
VDROP
Vn
50
ppm/°C
%
IOUT = 2mA to 100mA, VIN = (VOUT + 0.4V) to 10V
±0.8
±2.0
±2.7
VIN = (VOUT + 0.6V) to 10V
%
DC DROPOUT VOLTAGE(2)
For all models
IOUT = 2mA
4
10
mV
mV
mV
IOUT = 100mA
60
100
130
Over Temperature
IOUT = 100mA
VOLTAGE NOISE
f = 10Hz to 100kHz
CNR = 0, COUT = 0
Without CNR
23µVrms/V • VOUT
7µVrms/V • VOUT
µVrms
µVrms
With CNR (all fixed voltage models)
CNR = 0.01µF, COUT = 10µF
OUTPUT CURRENT
Current Limit(3)
ICL
ISC
130
170
60
220
mA
mA
mA
Over Temperature
Short-Circuit Current
110
240
RIPPLE REJECTION
f = 120Hz
IOUT = 100mA
65
dB
ENABLE CONTROL
V
ENABLE High (output enabled)
VENABLE Low (output disabled)
ENABLE High (output enabled)
VENABLE
IENABLE
1.8
VIN
0.5
V
V
–0.2
I
VENABLE = 1.8V to VIN, VIN = 1.8V to 6.5(4)
VENABLE = 0V to 0.5V
1
2
100
100
nA
nA
µs
ms
IENABLE Low (output disabled)
Output Disable Time
COUT = 1.0µF, RLOAD = 33Ω
200
1.5
Output Enable Time
COUT = 1.0µF, RLOAD = 33Ω
THERMAL SHUTDOWN
Junction Temperature
Shutdown
160
140
°C
°C
Reset from Shutdown
GROUND PIN CURRENT
Ground Pin Current
IGND
IOUT = 2mA
400
500
0.01
500
650
0.2
µA
µA
µA
I
OUT = 100mA
Enable Pin Low
VENABLE ≤ 0.5V
INPUT VOLTAGE
VIN
Operating Input Voltage Range(5)
Specified Input Voltage Range
Over Temperature
1.8
10
10
10
V
V
V
V
IN > 1.8V
VOUT + 0.4
VOUT + 0.6
VIN > 1.8V
TEMPERATURE RANGE
Specified Range
TJ
TJ
TA
–40
–55
–65
+85
+125
+150
°C
°C
°C
Operating Range
Storage Range
Thermal Resistance
SOT23-5 Surface Mount
SO-8 Surface Mount
θJA
θJA
Junction-to-Ambient
Junction-to-Ambient
200
150
°C/W
°C/W
NOTES: (1) The REG101 does not require a minimum output capacitor for stability. However, transient response can be improved with proper capacitor selection.
(2) Dropout voltage is defined as the input voltage minus the output voltage that produces a 2% change in the output voltage from the value at VIN = VOUT + 1V at fixed
load.
(3) Current limit is the output current that produces a 10% change in output voltage from VIN = VOUT + 1V and IOUT = 2mA.
(4) For VENABLE > 6.5V, see typical characteristic “IENABLE vs VENABLE”.
(5) The REG101 no longer regulates when VIN < VOUT + VDROP (MAX). In drop-out, the impedance from VIN to VOUT is typically less than 1Ω at TJ = +25°C.
REG101
SBVS026D
3
TYPICAL CHARACTERISTICS
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
OUTPUT VOLTAGE CHANGE vs IOUT
(VIN = VOUT + 1V, Output Voltage % Change
Referred to IOUT = 50mA at +25°C)
0.80
LOAD REGULATION vs TEMPERATURE
(VIN = VOUT + 1V)
0.0%
–0.1%
–0.2%
–0.3%
–0.4%
0.60
0.40
10mA < IOUT < 100mA
+25°C
0.20
+125°C
0.00
–0.20
–0.40
–55°C
–0.60
2mA < IOUT < 1000mA
–0.80
–50
–25
0
25
50
75
100
125
125
125
0
10 20
30 40
50
60
70 80
90 100
Temperature (°C)
IOUT (mA)
LINE REGULATION
(Referred to VIN = VOUT + 1V at IOUT = 50mA)
LINE REGULATION vs TEMPERATURE
IOUT = 100mA
20
15
0.10
0.08
0.06
10
IOUT = 2mA
0.04
5
0.02
IOUT = 50mA
(VOUT + 1V) < VIN < 10V
0
0.00
–0.02
–0.04
–0.06
–0.08
–0.10
–5
–10
–15
–20
IOUT = 100mA
(VOUT + 0.4V) < VIN < 10V
0
1
2
3
4
5
6
7
8
–50
–25
0
25
50
75
100
VIN – VOUT (V)
Temperature (°C)
DC DROPOUT VOLTAGE vs TEMPERATURE
IOUT = 100mA
DC DROPOUT VOLTAGE vs IOUT
100
80
60
40
20
0
100
80
60
40
20
0
+125°C
+25°C
–55°C
–50
–25
0
25
50
75
100
0
10
20
30
40
50
60
70
80
90 100
Temperature (°C)
IOUT (mA)
REG101
SBVS026D
4
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
OUTPUT VOLTAGE ACCURACY HISTOGRAM
18
OUTPUT VOLTAGE DRIFT HISTOGRAM
30
25
20
15
10
5
16
14
12
10
8
6
4
2
0
0
Error (%)
VOUT Drift (ppm/°C)
OUTPUT VOLTAGE vs TEMPERATURE
(Output Voltage % Change Referred
to IOUT = 50mA at +25°C)
GROUND PIN CURRENT, NOT ENABLED
vs TEMPERATURE
1µ
100n
10n
0.50
VENABLE = 0.5V
0.40
0.30
VIN = VOUT + 1V
IOUT = 2mA
0.20
0.10
0.00
IOUT = 50mA
–0.10
–0.20
1n
–0.30
IOUT = 100mA
–0.40
–0.50
100p
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
GROUND PIN CURRENT vs IOUT
GROUND PIN CURRENT vs TEMPERATURE
VOUT = 5V
600
600
575
550
525
500
475
450
425
400
IOUT = 100mA
VOUT = 5.0V
500
400
300
200
100
0
VOUT = 3.3V
VOUT = 3.3V
VOUT = 2.5V
VOUT = 2.5V
VIN = VOUT + 1V
VIN = VOUT + 1V
–50 –25
0
10
20 30 40
50
IOUT (mA)
60 70
80
90 100
0
25
50
75
100
125
Temperature (°C)
REG101
SBVS026D
5
TTYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
RIPPLE REJECTION vs FREQUENCY
RIPPLE REJECTION vs (VIN – VOUT
REG101-3.3
)
80
70
60
50
40
30
20
10
0
30
25
20
15
10
5
IOUT = 2mA
IOUT = 2mA
OUT = 10µF
C
IOUT = 100mA
COUT = 10µF
IOUT = 100mA
Frequency = 100kHz
OUT = 10µF
OUT = 100mA
COUT = 0µF
C
I
0
10
100
1k
10k
100k
1M
10M
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
VIN - VOUT (V)
1
Frequency (Hz)
RMS NOISE VOLTAGE vs COUT
REG101-5.0
RMS NOISE VOLTAGE vs CNR
60
50
40
30
20
10
0
110
100
90
80
70
60
50
40
30
20
REG101-5.0
REG101-3.3
REG101-2.5
REG101-3.3
REG101-2.5
CNR = 0µF
10Hz < BW < 100kHz
CNR = 0.01µF
10Hz < BW < 100kHz
0.1
1
10
1
10
100
1k
10k
COUT (µF)
CNR (pF)
NOISE SPECTRAL DENSITY
NOISE SPECTRAL DENSITY
10
1
10
1
IOUT = 100mA
NR = 0µF
IOUT = 100mA
NR = 0.01µF
C
C
COUT = 1µF
COUT = 1µF
COUT = 0µF
0.1
0.01
0.1
0.01
COUT = 0µF
C
OUT = 10µF
COUT = 10µF
10k 100k
10
100
1k
10k
100k
10
100
1k
Frequency (Hz)
Frequency (Hz)
REG101
SBVS026D
6
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
CURRENT LIMIT vs TEMPERATURE
FOLDBACK CURRENT LIMIT
3.5
180
160
140
120
100
80
3.0
ICL
REG101-3.3
2.5
VIN = VOUT + 1V
2.0
ICL
1.5
1.0
ISC
ISC
60
0.5
40
0
–50
–25
0
25
50
75
100
125
0
20
40
60
80 100 120 140 160 180
Temperature (°C)
Output Current (mA)
LINE TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
REG101-3.3
OUT = 100mA
REG101-3.3
IN = 4.3V
I
V
COUT = 0
COUT = 0µF
VOUT
VOUT
COUT = 10µF
VOUT
COUT = 10µF
VOUT
IOUT
100mA
10mA
5.3V
4.3V
VIN
50µs/div
10µs/div
TURN-ON
TURN-OFF
COUT = 0µF
RLOAD = 1600Ω
COUT = 10µF
RLOAD = 33Ω
COUT = 0µF
RLOAD = 33Ω
VOUT
VOUT
COUT = 1.0µF
RLOAD = 33Ω
COUT = 10µF
RLOAD = 33Ω
COUT = 0µF
RLOAD = 1600Ω
VENABLE
VENABLE
REG101-3.3
REG101-3.3
V
IN = VOUT + 1V
CNR = 0.01µF
C
NR = 0.01µF
250µs/div
200µs/div
REG101
SBVS026D
7
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
IENABLE vs VENABLE
POWER UP/POWER DOWN
10µ
VOUT = 3.0V
RLOAD = 30Ω
1µ
100n
T = +25°C
T = +125°C
VIN
VOUT
10n
T = –55°C
1n
6
7
8
9
10
1s/div
VENABLE (V)
RMS NOISE VOLTAGE vs CADJ
ADJUST PIN CURRENT vs TEMPERATURE
80
70
60
50
40
30
20
0.350
0.300
0.250
0.200
0.150
0.100
0.050
0.000
REG101–A
VOUT = 3.3V
COUT = 0.1µF
10Hz < frequency < 100kHz
10
100
1k
10k
100k
–50
–25
0
25
50
75
100
125
CADJ (pF)
Temperature (°C)
LOAD TRANSIENT-ADJUSTABLE VERSION
COUT = 0
LINE TRANSIENT-ADJUSTABLE VERSION
COUT = 0
VOUT
200mV/div
200mV/div
VOUT
50mV/div
50mV/div
COUT = 10µF
VOUT
COUT = 10µF
VOUT
REG101–A
REG101–A
VIN = 4.3V
VOUT = 3.3V
IOUT = 100mA
CFB = 0.01µF
VOUT = 3.3V
100mA
10mA
5.3V
4.3V
VIN
IOUT
REG101
SBVS026D
8
the input supply voltage. This is recommended to improve
ripple rejection by reducing input voltage ripple.
BASIC OPERATION
The REG101 series of LDO (Low Drop-Out) linear regula-
tors offers a wide selection of fixed output voltage versions
and an adjustable output version. The REG101 belongs to a
family of new generation LDO regulators that utilize a
DMOS pass transistor to achieve ultra-low dropout perfor-
mance and freedom from output capacitor constraints. Ground
pin current remains under 650µA over all line, load, and
temperature conditions. All versions have thermal and over-
current protection, including foldback current limit.
Figure 1 shows the basic circuit connections for the fixed
voltage models. Figure 2 gives the connections for the
adjustable output version (REG101A) and example resistor
values for some commonly used output voltages. Values for
other voltages can be calculated from the equation shown in
Figure 2.
INTERNAL CURRENT LIMIT
The REG101 internal current limit has a typical value of
170mA. A foldback feature limits the short-circuit current to
a typical short-circuit value of 60mA. This helps to protect
the regulator from damage under all load conditions. A
characteristic of VOUT versus IOUT is given in Figure 3 and
in the Typical Characteristics section.
The REG101 does not require an output capacitor for regu-
lator stability and is stable over most output currents and
with almost any value and type of output capacitor up to
10µF or more. For applications where the regulator output
current drops below several milliamps, stability can be
enhanced by: adding a 1kΩ to 2kΩ load resistor; using
capacitance values less than 10µF; or keeping the effective
series resistance greater than 0.05Ω including the capacitor’s
ESR and parasitic resistance in printed circuit board traces,
solder joints, and sockets.
FOLDBACK CURRENT LIMIT
3.5
Although an input capacitor is not required, it is good analog
3.0
REG101-3.3
design practice to connect a 0.1µF low ESR capacitor across
2.5
2.0
ICL
1.5
Enable
1.0
ICL
REG101
Gnd NR
VIN
VOUT
In
Out
0.5
0
COUT
0.1µF
CNR
0.01µF
0
20
40
60
80 100 120 140 160 180
Output Current (mA)
Optional
FIGURE 3. Foldback Current Limit of the REG101-3.3 at
25°C.
FIGURE 1. Fixed Voltage Nominal Circuit for REG101.
Enable
3
EXAMPLE RESISTOR VALUES
5
VOUT
VOUT (V)
R1 (W)(1)
R2 (Ω)(1)
1
VIN
CFB
0.01µF
REG101
R1
COUT
2.5
11.3k
1.13k
11.5k
1.15k
IADJ
4
0.1µF
Load
Adj
R2
3.0
3.3
5.0
15.8k
1.58k
11.5k
1.15k
2
Gnd
18.7k
1.87k
11.5k
1.15k
34.0k
3.40k
11.5k
1.15k
Optional
NOTE: (1) Resistors are standard 1% values.
Pin numbers for SOT23 package.
VOUT = (1 + R1/R2) • 1.267V
To reduce current through divider, increase resistor
values (see table at right).
As the impedance of the resistor divider increases,
I
ADJ (~200nA) may introduce an error.
CFB improves noise and transient response.
FIGURE 2. Adjustable Voltage Circuit for REG101A.
REG101
SBVS026D
9
ENABLE
RMS NOISE VOLTAGE vs CNR
The Enable pin is active HIGH and compatible with stan-
dard TTL-CMOS levels. Inputs below 0.5V (max) turn the
regulator off and all circuitry is disabled. Under this condi-
tion, ground pin current drops to approximately 10nA. When
a pull-up resistor is used, and operation down to VIN = 1.8V
is required, use values < 50kΩ.
110
100
90
80
70
60
50
40
30
20
REG101-5.0
REG101-2.5
REG101-3.3
OUTPUT NOISE
A precision band-gap reference is used for the internal
reference voltage, VREF. This reference is the dominant
noise source within the REG101 and it generates approxi-
mately 29µVrms in the 10Hz to 100kHz bandwidth at the
reference output. The regulator control loop gains up the
reference noise, so that the noise voltage of the regulator is
approximately given by:
CNR = 0µF
10Hz < BW < 100kHz
1
10
100
1k
10k
CNR (pF)
FIGURE 5. Output Noise versus Noise Reduction Capacitor.
R1 + R2
R2
VOUT
VREF
VN = 29µVrms
= 29µVrms•
achieved with very low (< 0.22µF) or very high (> 2.2µF)
values of COUT. See “RMS Noise Voltage vs COUT” in the
Typical Characteristics section.
Since the value of VREF is 1.267V, this relationship reduces to:
µVrms
The REG101 utilizes an internal charge pump to develop an
internal supply voltage sufficient to drive the gate of the
DMOS pass element above VIN. The charge-pump switch-
ing noise (nominal switching frequency = 2MHz) is not
measurable at the output of the regulator over most values of
VN = 23
• VOUT
V
Connecting a capacitor, CNR, from the Noise Reduction (NR)
pin to ground, as shown in Figure 4, forms a low-pass filter for
the voltage reference. For CNR = 10nF, the total noise in the
10Hz to 100kHz bandwidth is reduced by approximately a
factor of 2.8 for VO = 3.3V. This noise reduction effect is
shown in Figure 5 and as “RMS Noise Voltage vs CNR” in the
Typical Characteristics section.
COUT and IOUT
.
The REG101 adjustable version does not have the noise-
reduction pin available, however, the adjust pin is the sum-
ming junction of the error amplifier. A capacitor, CFB,
connected from the output to the adjust pin will reduce both
the output noise and the peak error from a load transient. See
the typical characteristics for output noise performance.
Noise can be further reduced by carefully choosing an
output capacitor, COUT. Best overall noise performance is
VIN
NR
Low Noise
Charge Pump
(fixed output
versions only)
CNR
(optional)
VREF
(1.26V)
DMOS
Pass
Transistor
VOUT
Over Current
Over Temp
Protection
R1
R2
Enable
Adj
(Adjustable
Versions)
REG101
NOTE: R1 and R2 are internal
on fixed output versions.
FIGURE 4. Block Diagram.
10
REG101
SBVS026D
DROP-OUT VOLTAGE
TRANSIENT RESPONSE
The REG101 uses an N-channel DMOS as the “pass”
element. When the input voltage is within a few tens of
millivolts of the output voltage, the DMOS device behaves
like a resistor. Therefore, for low values of VIN to VOUT, the
regulator’s input-to-output resistance is the RdsON of the
DMOS pass element (typically 600mΩ). For static (DC)
loads, the REG101 will typically maintain regulation down
to VIN to VOUT voltage drop of 60mV at full rated output
current. In Figure 6, the bottom line (DC dropout) shows the
minimum VIN to VOUT voltage drop required to prevent
drop-out under DC load conditions.
The REG101 response to transient line and load conditions
improves at lower output voltages. The addition of a capaci-
tor (nominal value 0.47µF) from the output pin to ground
may improve the transient response. In the adjustable ver-
sion, the addition of a capacitor, CFB (nominal value 10nF),
from the output to the adjust pin will also improve the
transient response.
THERMAL PROTECTION
The REG101 has thermal shutdown circuitry that protects
the regulator from damage. The thermal protection circuitry
disables the output when the junction temperature reaches
approximately 160°C, allowing the device to cool. When the
junction temperature cools to approximately 140°C, the
output circuitry is again enabled. Depending on various
conditions, the thermal protection circuit may cycle on and
off. This limits the dissipation of the regulator, but may have
an undesirable effect on the load.
For large step changes in load current, the REG101 requires
a larger voltage drop across it to avoid degraded transient
response. The boundary of this “transient drop-out” region is
shown as the top line in Figure 6. Values of VIN to VOUT
voltage drop above this line insure normal transient re-
sponse.
In the transient dropout region between “DC” and “Tran-
sient”, transient response recovery time increases. The time
required to recover from a load transient is a function of both
the magnitude and rate of the step change in load current and
the available “headroom” VIN to VOUT voltage drop. Under
worst-case conditions (full-scale load change with VIN to
VOUT voltage drop close to DC dropout levels), the REG101
can take several hundred microseconds to re-enter the speci-
fied window of regulation.
Any tendency to activate the thermal protection circuit
indicates excessive power dissipation or an inadequate heat
sink. For reliable operation, junction temperature should be
limited to 125°C, maximum. To estimate the margin of
safety in a complete design (including heat sink), increase
the ambient temperature until the thermal protection is
triggered. Use worst-case loads and signal conditions. For
good reliability, thermal protection should trigger more than
35°C above the maximum expected ambient condition of
your application. This produces a worst-case junction tem-
perature of 125°C at the highest expected ambient tempera-
ture and worst-case load.
140
120
The internal protection circuitry of the REG101 has been
designed to protect against overload conditions. It was not
intended to replace proper heat sinking. Continuously run-
ning the REG101 into thermal shutdown will degrade reli-
ability.
Full Scale IOUT
Transient
100
80
60
40
DC
20
0
0
25
50
75
100
125
150
IOUT (mA)
FIGURE 6. Transient and DC Dropout.
REG101
SBVS026D
11
POWER DISSIPATION
Power dissipation can be minimized by using the lowest
possible input voltage necessary to assure the required
output voltage.
The REG101 is available in two different package configu-
rations. The ability to remove heat from the die is different
for each package type and, therefore, presents different
considerations in the printed circuit board (PCB) layout. The
PCB area around the device that is free of other components
moves the heat from the device to the ambient air. While it
is difficult to impossible to quantify all of the variables in a
thermal design of this type, performance data for several
configurations are shown in Figure 7.
REGULATOR MOUNTING
Solder pad footprint recommendations for the various
REG101 devices are presented in the Application Bulletin
AB-132, “Solder Pad Recommendations for Surface-Mount
Devices” (SBFA015), available from the Texas Instruments
web site (www.ti.com).
Power dissipation depends on input voltage, load condition,
and duty cycle. Power dissipation is equal to the product of
the average output current times the voltage across the
output element, VIN to VOUT voltage drop.
P = V – VOUT • I
(
)
D
IN
OUT(AVG)
1.2
1.0
0.8
0.6
0.4
0.3
0
CONDITIONS
SOT23-5
SO-8
PACKAGE
θ
JA
SOT23-5
SO-8
200°C/W
150°C/W
0
25
50
75
100
125
Ambient Temperature (°C)
FIGURE 7. Maximum Power Dissipation versus Ambient Temperature for the Various Packages.
REG101
SBVS026D
12
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
PACKAGING INFORMATION
Orderable Device
REG101NA-2.5/250
REG101NA-2.5/250G4
REG101NA-2.5/3K
REG101NA-2.5/3KG4
REG101NA-2.8/250
REG101NA-2.8/250G4
REG101NA-2.8/3K
REG101NA-2.8/3KG4
REG101NA-2.85/250
REG101NA-2.85/3K
REG101NA-2.85/3KG4
REG101NA-3.3/250
REG101NA-3.3/250G4
REG101NA-3.3/3K
REG101NA-3.3/3KG4
REG101NA-3/250
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
DBV
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
REG101NA-3/250G4
REG101NA-3/3K
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
REG101NA-3/3KG4
REG101NA-5/250
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
REG101NA-5/250G4
REG101NA-5/3K
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
REG101NA-5/3KG4
REG101NA-A/250
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
REG101NA-A/250G4
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
Orderable Device
REG101NA-A/3K
REG101NA-A/3KG4
REG101NA2.85/250G4
REG101UA-2.5
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
5
5
5
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
DBV
DBV
D
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
REG101UA-2.5/2K5
REG101UA-2.5/2K5G4
REG101UA-2.5G4
REG101UA-2.8
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
REG101UA-2.8/2K5
REG101UA-2.8/2K5G4
REG101UA-2.85
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
REG101UA-2.85/2K5
REG101UA-2.85G4
REG101UA-2.8G4
REG101UA-3
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
REG101UA-3.3
D
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
REG101UA-3.3/2K5
REG101UA-3.3/2K5G4
REG101UA-3/2K5
REG101UA-3G4
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
REG101UA-5
D
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
REG101UA-5/2K5
REG101UA-5/2K5G4
REG101UA-5G4
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
D
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
REG101UA-A
D
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
REG101UA-A/2K5
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
Orderable Device
REG101UA-A/2K5G4
REG101UA-AG4
Status (1)
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
8
8
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SOIC
SOIC
D
D
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
REG101UA2.85/2K5G4
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
IMPORTANT NOTICE
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