RM54ACT257VFA [TI]
ACT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, CDFP16, CERAMIC, DFP-16;
| 型号： | RM54ACT257VFA |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | ACT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, CDFP16, CERAMIC, DFP-16 CD 输出元件 |
| 文件： | 总10页 (文件大小：165K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
July 1998
54AC257 • 54ACT257
Quad 2-Input Multiplexer with TRI-STATE® Outputs
General Description
Features
n ICC and IOZ reduced by 50%
n Multiplexer expansion by tying outputs together
n Noninverting TRI-STATE outputs
n Outputs source/sink 24 mA
The ’AC/’ACT257 is
a quad 2-input multiplexer with
TRI-STATE outputs. Four bits of data from two sources can
be selected using a Common Data Select input. The four
outputs present the selected data in true (noninverted) form.
The outputs may be switched to a high impedance state by
placing a logic HIGH on the common Output Enable (OE) in-
put, allowing the outputs to interface directly with
bus-oriented systems.
n ’ACT257 has TTL-compatible inputs
n Standard Military Drawing (SMD)
— ’AC257: 5962-88703
— ’ACT257: 5962-89689
Logic Symbols
IEEE/IEC
DS100286-1
DS100286-2
Pin Names
Description
S
Common Data Select Input
TRI-STATE Output Enable Input
Data Inputs from Source 0
Data Inputs from Source 1
TRI-STATE Multiplexer Outputs
OE
I
I
0a–I0d
1a–I1d
Za–Zd
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
™
FACT is a trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100286
www.national.com
Connection Diagrams
Functional Description
The ’AC/’ACT257 is quad 2-input multiplexer with
TRI-STATE outputs. It selects four bits of data from two
sources under control of a Common Data Select input. When
the Select input is LOW, the I0x inputs are selected and when
Select is HIGH, the I1x inputs are selected. The data on the
selected inputs appears at the outputs in true (noninverted)
form. The device is the logic implementation of a 4-pole,
2-position switch where the position of the switch is deter-
mined by the logic levels supplied to the Select input. The
logic equations for the outputs are shown below:
Pin Assignment for
DIP and Flatpak
=
Za OE • (11a • S + I0a • S)
=
Zb OE • (11b • S + I0b • S)
=
Zc OE • (11c • S + I0c • S)
=
Zd OE • (11d • S + I0d • S)
DS100286-3
When the Output Enable (OE) is HIGH, the outputs are
forced to a high impedance state. If the outputs are tied to-
gether, all but one device must be in the high impedance
state to avoid high currents that would exceed the maximum
ratings. Designers should ensure the Output Enable signals
to TRI-STATE devices whose outputs are tied together are
designed so there is no overlap.
Pin Assignment for LCC
Truth Table
Output
Select
Data
Outputs
Enable
Input
Inputs
OE
H
L
S
X
H
H
L
I0
X
X
X
L
I1
X
L
Z
Z
L
DS100286-4
L
H
X
X
H
L
L
L
L
H
H
=
=
=
=
H
L
X
Z
HIGH Voltage Level
LOW Voltage Level
Immaterial
High Impedance
Logic Diagram
DS100286-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.national.com
2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Recommended Operating
Conditions
Supply Voltage (VCC
)
’AC
2.0V to 6.0V
4.5V to 5.5V
0V to VCC
Supply Voltage (VCC
)
−0.5V to +7.0V
’ACT
DC Input Diode Current (IIK
)
Input Voltage (VI)
=
VI −0.5V
−20 mA
+20 mA
Output Voltage (VO
)
0V to VCC
=
VI VCC +0.5V
Operating Temperature (TA)
54AC/ACT
DC Input Voltage (VI)
−0.5V to VCC +0.5V
−55˚C to +125˚C
125 mV/ns
DC Output Diode Current (IOK
)
Minimum Input Edge Rate (∆V/∆t)
’AC Devices
=
VO −0.5V
−20 mA
+20 mA
=
VO VCC +0.5V
% to 70% of V
VIN from 30
CC
DC Output Voltage (VO
)
−0.5V to VCC +0.5V
@
VCC 3.3V, 4.5V, 5.5V
DC Output Source or Sink Current
(IO
Minimum Input Edge Rate (∆V/∆t)
’ACT Devices
±
±
)
50 mA
DC VCC or Ground Current
Per Output Pin (ICC or IGND
VIN from 0.8V to 2.0V
)
50 mA
@
VCC 4.5V, 5.5V
125 mV/ns
Storage Temperature (TSTG
Junction Temperature (TJ)
CDIP
)
−65˚C to +150˚C
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
175˚C
™
mend operation of FACT circuits outside databook specifications.
DC Characteristics for ’AC Family Devices
54AC
=
Symbol
Parameter
VCC
(V)
TA
Units
Conditions
−55˚C to +125˚C
Guaranteed
Limits
2.1
=
VIH
Minimum High
Level Input
Voltage
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
VOUT 0.1V
3.15
3.85
0.9
V
V
V
or VCC − 0.1V
=
VIL
Maximum Low
Level Input
Voltage
VOUT 0.1V
1.35
1.65
2.9
or VCC − 0.1V
=
VOH
Minimum High
Level Output
Voltage
IOUT −50 µA
4.4
5.4
(Note 2)
=
VIN VIL or VIH
3.0
4.5
5.5
3.0
4.5
5.5
2.4
3.7
4.7
0.1
0.1
0.1
−12 mA
V
V
IOH
−24 mA
−24 mA
=
IOUT 50 µA
VOL
Maximum Low
Level Output
Voltage
(Note 2)
=
VIN VIL or VIH
3.0
4.5
5.5
5.5
0.50
0.50
0.50
12 mA
V
IOL
24 mA
24 mA
=
VI VCC, GND
±
IIN
Maximum Input
Leakage Current
1.0
µA
3
www.national.com
DC Characteristics for ’AC Family Devices (Continued)
54AC
=
Symbol
Parameter
VCC
(V)
TA
Units
Conditions
−55˚C to +125˚C
Guaranteed
Limits
=
IOZ
Maximum
VI (OE) VIL, VIH
=
±
TRI-STATE
5.5
10.0
µA
VI VCC, GND
=
VO VCC, GND
Leakage Current
=
VOLD 1.65V Max
IOLD
IOHD
ICC
(Note 3) Minimum
Dynamic Output
Current
5.5
5.5
5.5
50
mA
mA
µA
=
VOHD 3.85V Min
−50
=
Maximum Quiescent
Supply Current
80.0
VIN VCC
or GND
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
@
@
Note 4:
Note 5:
I
I
and I
CC
3.0V are guaranteed to be less than or equal to the respective limit 5.5V V .
IN
CC
@
@
for 54AC 25˚C is identical to 74AC 25˚C.
CC
DC Characteristics for ’ACT Family Devices
54ACT
=
Symbol
Parameter
VCC
(V)
TA
Units
Conditions
−55˚C to +125˚C
Guaranteed
Limits
=
VIH
Minimum High
Level Input
Voltage
4.5
5.5
4.5
5.5
2.0
VOUT 0.1V
V
2.0
0.8
0.8
or VCC − 0.1V
=
VIL
Maximum Low
Level Input
Voltage
VOUT 0.1V
V
V
or VCC − 0.1V
=
VOH
Minimum High
Level Output
Voltage
4.5
5.5
4.4
5.4
IOUT −50 µA
(Note 6)
=
VIN VIL or VIH
IOH −24 mA
−24 mA
4.5
5.5
4.5
5.5
3.70
4.70
0.1
V
V
=
VOL
Maximum Low
Level Output
Voltage
IOUT 50 µA
0.1
(Note 6)
=
VIN VIL or VIH
IOL 24 mA
24 mA
4.5
5.5
5.5
0.50
0.50
V
=
±
IIN
Maximum Input
Leakage Current
Maximum TRI-STATE
Leakage Current
Maximum
1.0
µA
µA
mA
VI VCC, GND
=
±
IOZ
5.5
5.5
10.0
1.6
50
VI VIL, VIH
=
VO VCC, GND
=
VI VCC − 2.1V
ICCT
I
CC/Input
=
VOLD 1.65V Max
IOLD
IOHD
(Note 7) Minimum
Dynamic Output
Current
5.5
5.5
mA
mA
=
VOHD 3.85V Min
−50
www.national.com
4
DC Characteristics for ’ACT Family Devices (Continued)
54ACT
=
Symbol
Parameter
VCC
(V)
TA
Units
Conditions
−55˚C to +125˚C
Guaranteed
Limits
=
ICC
Maximum Quiescent
Supply Current
5.5
80.0
µA
VIN VCC
or GND
Note 6: All outputs loaded; thresholds on input associated with output under test.
Note 7: Maximum test duration 2.0 ms, one output loaded at a time.
@ @
I for 54ACT 25˚C is identical to 74ACT 25˚C.
CC
Note 8:
AC Electrical Characteristics
54AC
=
Symbol
Parameter
VCC
(V)
TA −55˚C
Units
to +125˚C
=
(Note 9)
3.3
CL 50 pF
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation Delay
In to Zn
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
11.0
ns
ns
ns
ns
ns
ns
ns
ns
5.0
8.0
11.0
8.5
Propagation Delay
In to Zn
3.3
5.0
Propagation Delay
S to Zn
3.3
14.5
11.0
14.5
11.0
13.0
10.0
11.0
9.5
5.0
Propagation Delay
S to Zn
3.3
5.0
Output Enable Time
3.3
5.0
Output Enable Time
Output Disable Time
Output Disable Time
3.3
5.0
3.3
13.0
11.0
10.5
9.5
5.0
3.3
5.0
±
Note 9: Voltage Range 3.3 is 3.0V 0.3V
±
Voltage Range 5.0 is 5.0V 0.5V
AC Electrical Characteristics
54ACT
=
Symbol
Parameter
VCC
(V)
TA −55˚C
Units
to +125˚C
=
CL 50 pF
(Note 10)
5.0
tPLH
tPHL
tPLH
tPHL
tPZH
Propagation Delay
In to Zn
1.0
1.0
1.0
1.0
1.0
8.0
9.5
ns
ns
ns
ns
ns
Propagation Delay
In to Zn
5.0
5.0
5.0
5.0
Propagation Delay
S to Zn
11.0
11.5
9.5
Propagation Delay
S to Zn
Output Enable Time
5
www.national.com
AC Electrical Characteristics (Continued)
54ACT
=
Symbol
Parameter
VCC
(V)
TA −55˚C
Units
to +125˚C
=
CL 50 pF
(Note 10)
5.0
tPZL
tPHZ
tPLZ
Output Enable Time
Output Disable Time
Output Disable Time
1.0
1.0
1.0
9.5
10.5
9.5
ns
ns
ns
5.0
5.0
±
Note 10: Voltage Range 5.0 is 5.0V 0.5V
Capacitance
Symbol
Parameter
Input Capacitance
Power Dissipation
Capacitance
Typ
4.5
Units
Conditions
=
VCC OPEN
CIN
pF
pF
=
VCC 5.0V
CPD
50.0
www.national.com
6
Physical Dimensions inches (millimeters) unless otherwise noted
20 Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
16 Lead Ceramic Flatpak (F)
NS Package Number W16A
7
www.national.com
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VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI-
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1. Life support devices or systems are devices or sys-
tems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whose fail-
ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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Tel: 1-800-272-9959
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54ACT257 Product Folder
Quad 2-Input Multiplexer with TRI-STATE Outputs
General
Description
Package
& Models
Samples
& Pricing
Features
Datasheet
Datasheet
Title
Size in Kbytes Date
Receive via Email
Download
View Online
54AC257 54ACT257 Quad 2-Input
Multiplexer with TRI-STATE
Outputs
View Online Download Receive via Email
6-Aug-98
120 Kbytes
54ACT257 Mil-Aero Datasheet
MN54ACT257-X
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View Online Download Receive via Email
14 Kbytes
21 Kbytes
54ACT257 Mil-Aero Datasheet
MV54ACT257-X
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Package Availability, Models, Samples & Pricing
Budgetary
Pricing
Samples &
Electronic
Orders
Std
Pack
Size
Package
Type Pins MSL
Models
Package
Marking
Part Number
Status
SPICE IBIS
Qty $US each
[logo]¢Z¢S¢4¢A
54ACT257
LMQB /Q¢M$E
5962-
rail
of
50
5962-89689012A
(54ACT257LMQB)
Full
production
LCC
MSL
20
N/A
N/A
50+ $8.0000
89689012A
[logo]¢Z¢S¢4¢A
54ACT257
LMQB-RH
R89689012A
Q¢M$E
5962R89689012A
(54ACT257LMQB-
RH)
rail
of
50
Full
production
LCC
MSL
MSL
MSL
20
16
16
N/A
N/A
N/A
N/A
N/A
N/A
50+ $82.0000
50+ $4.3200
50+ $76.0000
[logo]¢Z¢S¢4¢A$E
54ACT257DMQB
/Q¢M
rail
of
25
5962-8968901EA
(54ACT257DMQB)
Full
production
CERDIP
CERDIP
Buy Now
5962-8968901EA
[logo]¢Z¢S¢4¢A$E
54ACT257DMQB-
RH
5962R8968901EA
(54ACT257DMQB-
RH)
rail
of
25
Full
production
Q¢M
5962R8968901EA
[logo]¢Z¢S¢4¢A$E
54ACT257FMQB
Q¢M 5962-
rail
of
19
5962-8968901FA
(54ACT257FMQB)
Full
production
CERPACK
CERPACK
MSL
MSL
16
16
N/A
N/A
N/A
N/A
50+ $8.0000
50+ $76.0000
8968901FA
[logo]¢Z¢S¢4¢A$E
54ACT257FMQB
-RH /Q¢M 5962
R8968901FA
5962R8968901FA
(54ACT257FMQB-
RH)
rail
of
19
Full
production
[logo]¢Z¢S¢4¢A
54ACT257E
RQMLV $E
5962R
8968901V2A
rail
5962R8968901V2A
(54ACT257ERQMLV)
Full
production
LCC
MSL
MSL
MSL
20
16
16
N/A
N/A
N/A
N/A
N/A
50+ $138.0000 of
50
rail [logo]¢Z¢S¢4¢A$E
54ACT257JRQMLV
25 5962R8968901VEA
5962R8968901VEA
(54ACT257JRQMLV)
Full
production
CERDIP
CERPACK
50+ $138.0000 of
[logo]¢Z¢S¢4¢A$E
rail
of
RM54ACT257
VFA
RM54ACT257VFA
Preliminary N/A
N/A
¢R
WAFER#
[logo]¢Z¢S¢4¢A$E
54ACT257W
rail
50+ $138.0000 of
19
5962R8968901VFA
(54ACT257WRQMLV)
Full
N/A
CERPACK
MSL
16
N/A
production
RQMLV 5962
R8968901VFA
General Description
The 'AC/'ACT257 is a quad 2-input multiplexer with TRI-STATE outputs. Four bits of data from two sources
can be selected using a Common Data Select input. The four outputs present the selected data in true
(noninverted) form. The outputs may be switched to a high impedance state by placing a logic HIGH on the
common Output Enable (OE#) input, allowing the outputs to interface directly with bus-oriented systems.
Features
●
ICC and IOZ reduced by 50%
●
●
●
●
●
Multiplexer expansion by tying outputs together
Noninverting TRI-STATE outputs
Outputs source/sink 24 mA
'ACT257 has TTL-compatible inputs
Standard Military Drawing (SMD)
❍
'AC257: 5962-88703
'ACT257: 5962-89689
❍
[Information as of 5-Aug-2002]
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