SM72482MAX-4/NOPB [TI]
Dual 5A Compound Gate Driver;
| 型号： | SM72482MAX-4/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Dual 5A Compound Gate Driver 栅 |
| 文件： | 总15页 (文件大小：731K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SM72482
www.ti.com
SNVS696C –JANUARY 2011–REVISED APRIL 2013
Dual 5A Compound Gate Driver
Check for Samples: SM72482
1
FEATURES
DESCRIPTION
The SM72482 Dual Gate Driver replaces industry
standard gate drivers with improved peak output
current and efficiency. Each “compound” output driver
stage includes MOS and bipolar transistors operating
in parallel that together sink more than 5A peak from
2
•
•
Renewable Energy Grade
Independently Drives Two N-Channel
MOSFETs
•
Compound CMOS and Bipolar Outputs Reduce
Output Current Variation
capacitive
loads.
Combining
the
unique
characteristics of MOS and bipolar devices reduces
drive current variation with voltage and temperature.
Under-voltage lockout protection is also provided.
The drivers can be operated in parallel with inputs
and outputs connected to double the drive current
capability. This device is available in the SOIC
package.
•
•
5A Sink, 3A Source Current Capability
Two Channels Can be Connected in Parallel to
Double the Drive Current
•
•
•
Independent Inputs (TTL Compatible)
Fast Propagation Times (25 ns Typical)
Fast Rise and Fall Times (14 ns Rise, 12 ns
Fall With 2 nF Load)
Connection Diagram
•
•
•
•
•
Available in Dual Noninverting, Dual Inverting,
and Combination Configurations
1
8
NC
NC
Supply Rail Under-Voltage Lockout Protection
(UVLO)
SM72482 UVLO Configured to Drive PFET
Through OUT_A and NFET Through OUT_B
2
3
4
7
6
5
IN_A
VEE
OUT A
VCC
Pin Compatible With Industry Standard Gate
Drivers
Packages
–
–
SOIC
Thermally Enhanced VSSOP
IN_B
OUT_B
APPLICATIONS
•
•
•
Synchronous Rectifier Gate Drivers
Switch-mode Power Supply Gate Driver
Solenoid and Motor Drivers
Figure 1. 8-Lead SOIC or VSSOP
See D or DGN Package
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011–2013, Texas Instruments Incorporated
SM72482
SNVS696C –JANUARY 2011–REVISED APRIL 2013
www.ti.com
PIN DESCRIPTIONS
Pin
1
Name
NC
Description
Application Information
No Connect
‘A’ side control input
2
IN_A
VEE
TTL compatible thresholds.
3
Ground reference for both inputs and
outputs
Connect to power ground.
4
5
IN_B
‘B’ side control input
TTL compatible thresholds.
OUT_B
Output for the ‘B’ side driver.
Voltage swing of this output is from VCC to VEE. The output stage is
capable of sourcing 3A and sinking 5A.
6
7
VCC
Positive output supply
Locally decouple to VEE.
OUT_A.
Output for the ‘A’ side driver.
Voltage swing of this output is from VCC to VEE. The output stage is
capable of sourcing 3A and sinking 5A.
8
NC
No Connect
Table 1. Configuration Table
Part Number
“A” Output Configuration
Non-Inverting (Low in UVLO)
Inverting (High in UVLO)
“B” Output Configuration
Non-Inverting (Low in UVLO)
Non-Inverting (Low in UVLO)
Package
VSSOP
SOIC
SM72482MY-1
SM72482MA-4
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)
VCC to VEE
−0.3V to 15V
−0.3V to 15V
−55°C to +150°C
+150°C
IN to VEE
Storage Temperature Range, (TSTG
)
Maximum Junction Temperature, (TJ(max))
Operating Junction Temperature
ESD Rating
+125°C
2kV
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For ensured specifications and test conditions, see the Electrical Characteristics.
Electrical Characteristics
TJ = −40°C to +125°C, VCC = 12V, VEE = 0V, No Load on OUT_A or OUT_B, unless otherwise specified.
Symbol
Parameter
Conditions
Min
3.5
2.3
Typ
Max
14
Units
VCC Operating Range
V
CC−VEE
CC−VEE
V
V
VCCR
VCCH
VCC Under Voltage Lockout (rising)
V
2.9
230
1
3.5
VCC Under Voltage Lockout
Hysteresis
mV
ICC
VCC Supply Current (ICC
)
IN_A = IN_B = 0V (SM72482MY-1)
2
2
mA
IN_A = VCC, IN_B = 0V
(SM72482MA-4)
1
CONTROL INPUTS
VIH
Logic High
2.2
V
V
VIL
Logic Low
0.8
2.2
2.0
VthH
VthL
HYS
High Threshold
Low Threshold
Input Hysteresis
1.3
0.8
1.75
1.35
400
V
V
mV
2
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: SM72482
SM72482
www.ti.com
SNVS696C –JANUARY 2011–REVISED APRIL 2013
Electrical Characteristics (continued)
TJ = −40°C to +125°C, VCC = 12V, VEE = 0V, No Load on OUT_A or OUT_B, unless otherwise specified.
Symbol
Parameter
Input Current Low
Input Current High
Conditions
IN_A=IN_B=VCC
Min
−1
10
10
-1
Typ
0.1
18
Max
1
Units
IIL
IIH
IN_A=IN_B=VCC(SM72482MY-1)
IN_B=VCC (SM72482MA-4)
IN_A=VCC (SM72482MA-4)
25
25
1
µA
18
0.1
OUTPUT DRIVERS
ROH
Output Resistance High
IOUT = −10 mA(1)
IOUT = + 10 mA(1)
30
50
Ω
Ω
ROL
Output Resistance Low
Peak Source Current
1.4
2.5
ISource
OUTA/OUTB = VCC/2,
200 ns Pulsed Current
3
5
A
A
ISink
Peak Sink Current
OUTA/OUTB = VCC/2,
200 ns Pulsed Current
SWITCHING CHARACTERISTICS
td1
td2
tr
Propagation Delay Time Low to
High, IN rising (IN to OUT)
CLOAD = 2 nF, see Figure 2 and
Figure 3
25
25
14
12
40
40
25
25
ns
ns
ns
ns
Propagation Delay Time High to
Low, IN falling (IN to OUT)
CLOAD = 2 nF, see Figure 2 and
Figure 3
Rise Time
CLOAD = 2 nF, see Figure 2 and
Figure 3
tf
Fall Time
CLOAD = 2 nF, see Figure 2 and
Figure 3
LATCHUP PROTECTION
AEC - Q100, Method 004
THERMAL RESISTANCE
θJA Junction to Ambient,
TJ = 150°C
500
mA
SOIC Package
VSSOP Package
SOIC Package
VSSOP Package
170
60
°C/W
°C/W
0 LFPM Air Flow
θJC
Junction to Case
70
4.7
(1) The output resistance specification applies to the MOS device only. The total output current capability is the sum of the MOS and
Bipolar devices.
TIMING WAVEFORMS
50%
50%
50%
50%
INPUT
INPUT
t
D1
t
D2
t
D1
t
D2
OUTPUT
90%
90%
OUTPUT
10%
10%
t
f
t
r
t
t
r
f
Figure 2. Inverting
Figure 3. Non-Inverting
Copyright © 2011–2013, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links: SM72482
SM72482
SNVS696C –JANUARY 2011–REVISED APRIL 2013
www.ti.com
Typical Performance Characteristics
Supply Current vs Frequency
Supply Current vs Capacitive Load
1000
100
10
100
10
1
T
= 25°C
= 12V
A
V
= 15V
V
CC
CC
f = 500kHz
V
= 10V
CC
f = 100kHz
V
CC
= 5V
1
T
A
= 25°C
f = 10kHz
C
L
= 2200pF
0.1
0.1
10k
1k
1
10
100
1000
100
CAPACITIVE LOAD (pF)
FREQUENCY (kHz)
Figure 4.
Figure 5.
Rise and Fall Time vs Supply Voltage
Rise and Fall Time vs Temperature
20
18
16
20
18
16
14
12
10
T
= 25°C
A
V
= 12V
CC
C
= 2200pF
L
C
= 2200pF
L
t
r
t
r
14
t
f
t
f
12
10
4
5
6
7
8
9
10 11 12 13 14 15 16
-75 -50 -25
0
25 50
100 125 150 175
75
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
Figure 6.
Figure 7.
Rise and Fall Time vs Capacitive Load
Delay Time vs Supply Voltage
32.5
30
50
40
30
20
10
0
T
= 25°C
= 12V
T
= 25°C
A
A
V
C
= 2200pF
CC
L
27.5
25
t
D2
t
r
t
f
22.5
20
t
D1
17.5
100
1k
10k
4
6
8
10
12
14
16
CAPACITIVE LOAD (pF)
SUPPLY VOLTAGE (V)
Figure 8.
Figure 9.
4
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: SM72482
SM72482
www.ti.com
SNVS696C –JANUARY 2011–REVISED APRIL 2013
Typical Performance Characteristics (continued)
Delay Time vs Temperature
RDSON vs Supply Voltage
32.5
30
3.25
65
55
V
= 12V
CC
T
I
= 25°C
A
C
= 2200pF
L
= 10mA
OUT
2.75
t
D2
27.5
R
OH
2.25
1.75
1.25
45
25
t
D1
35
25
15
22.5
R
OL
20
17.5
0.75
0
3
6
9
12
15
18
-75 -50 -25
0
25 50 75 100 125 150 175
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
Figure 10.
Figure 11.
UVLO Thresholds and Hysteresis vs Temperature
3.100
0.450
0.390
0.330
0.270
0.210
0.150
V
CCR
2.800
2.500
2.200
1.900
1.600
V
CCF
V
CCH
-75 -50 -25
0
25 50 75 100 125 150 175
TEMPERATURE (°C)
Figure 12.
Copyright © 2011–2013, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Links: SM72482
SM72482
SNVS696C –JANUARY 2011–REVISED APRIL 2013
www.ti.com
BLOCK DIAGRAM
V
CC
UVLO
V
EE
OUT_A
IN_A
V
EE
V
CC
IN_B
OUT_B
V
EE
Figure 13. Block Diagram of SM72482
6
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: SM72482
SM72482
www.ti.com
SNVS696C –JANUARY 2011–REVISED APRIL 2013
DETAILED OPERATING DESCRIPTION
The SM72482 dual gate driver consists of two independent and identical driver channels with TTL compatible
logic inputs and high current totem-pole outputs that source or sink current to drive MOSFET gates. The driver
output consist of a compound structure with MOS and bipolar transistor operating in parallel to optimize current
capability over a wide output voltage and operating temperature range. The bipolar device provides high peak
current at the critical threshold region of the MOSFET VGS while the MOS devices provide rail-to-rail output
swing. The totem pole output drives the MOSFET gate between the gate drive supply voltage VCC and the power
ground potential at the VEE pin.
The control inputs of the drivers are high impedance CMOS buffers with TTL compatible threshold voltages. The
SM72482 pinout was designed for compatibility with industry standard gate drivers in single supply gate driver
applications.
The input stage of each driver should be driven by a signal with a short rise and fall time. Slow rising and falling
input signals, although not harmful to the driver, may result in the output switching repeatedly at a high
frequency.
The two driver channels of the SM72482 are designed as identical cells. Transistor matching inherent to
integrated circuit manufacturing ensures that the AC and DC peformance of the channels are nearly identical.
Closely matched propagation delays allow the dual driver to be operated as a single with inputs and output pins
connected. The drive current capability in parallel operation is precisely 2X the drive of an individual channel.
Small differences in switching speed between the driver channels will produce a transient current (shoot-through)
in the output stage when two output pins are connected to drive a single load. Differences in input thresholds
between the driver channels will also produce a transient current (shoot-through) in the output stage. Fast
transition input signals are especially important while operating in a parallel configuration. The efficiency loss for
parallel operation has been characterized at various loads, supply voltages and operating frequencies. The
power dissipation in the SM72482 increases less than 1% relative to the dual driver configuration when operated
as a single driver with inputs/ outputs connected.
An Under Voltage Lock Out (UVLO) circuit is included in the SM72482, which senses the voltage difference
between VCC and the chip ground pin, VEE. When the VCC to VEE voltage difference falls below 2.8V both driver
channels are disabled. The UVLO hysteresis prevents chattering during brown-out conditions and the driver will
resume normal operation when the VCC to VEE differential voltage exceeds approximately 3.0V.
The SM72482MY –1 device hold both outputs in the low state in the under-voltage lockout (UVLO) condition. The
SM72482MA–4 has an active high output state of OUT_A during UVLO. When VCC is less than the UVLO
threshold voltage, OUT_A will be locked in the high state while OUT_B will be disabled in the low state. This
configuration allows the SM72482MY –4 to drive a PFET through OUT_A and an NFET through OUT_B with
both FETs safely turned off during UVLO.
Layout Considerations
Attention must be given to board layout when using SM72482. Some important considerations include:
1. A Low ESR/ESL capacitor must be connected close to the IC and between the VCC and VEE pins to support
high peak currents being drawn from VCC during turn-on of the MOSFET.
2. Proper grounding is crucial. The drivers need a very low impedance path for current return to ground
avoiding inductive loops. The two paths for returning current to ground are a) between SM72482 VEE pin and
the ground of the circuit that controls the driver inputs, b) between SM72482 VEE pin and the source of the
power MOSFET being driven. All these paths should be as short as possible to reduce inductance and be as
wide as possible to reduce resistance. All these ground paths should be kept distinctly separate to avoid
coupling between the high current output paths and the logic signals that drive the SM72482. A good method
is to dedicate one copper plane in a multi-layered PCB to provide a common ground surface.
3. With the rise and fall times in the range of 10 ns to 30 ns, care is required to minimize the lengths of current
carrying conductors to reduce their inductance and EMI from the high di/dt transients generated by the
SM72482.
4. The SM72482 footprint is compatible with other industry standard drivers including the TC4426/27/28 and
UCC27323/4/5.
5. If either channel is not being used, the respective input pin (IN_A or IN_B) should be connected to either VEE
or VCC to avoid spurious output signals.
Copyright © 2011–2013, Texas Instruments Incorporated
Submit Documentation Feedback
7
Product Folder Links: SM72482
SM72482
SNVS696C –JANUARY 2011–REVISED APRIL 2013
Thermal Performance
INTRODUCTION
www.ti.com
The primary goal of thermal management is to maintain the integrated circuit (IC) junction temperature (TJ) below
a specified maximum operating temperature to ensure reliability. It is essential to estimate the maximum TJ of IC
components in worst case operating conditions. The junction temperature is estimated based on the power
dissipated in the IC and the junction to ambient thermal resistance θJA for the IC package in the application board
and environment. The θJA is not a given constant for the package and depends on the printed circuit board
design and the operating environment.
DRIVE POWER REQUIREMENT CALCULATIONS IN SM72482
The SM72482 dual low side MOSFET driver is capable of sourcing/sinking 3A/5A peak currents for short
intervals to drive a MOSFET without exceeding package power dissipation limits. High peak currents are
required to switch the MOSFET gate very quickly for operation at high frequencies.
V
GATE
V
HIGH
Q1
R
G
V
TRIG
C
IN
Q2
The schematic above shows a conceptual diagram of the SM72482 output and MOSFET load. Q1 and Q2 are
the switches within the gate driver. RG is the gate resistance of the external MOSFET, and CIN is the equivalent
gate capacitance of the MOSFET. The gate resistance Rg is usually very small and losses in it can be neglected.
The equivalent gate capacitance is a difficult parameter to measure since it is the combination of CGS (gate to
source capacitance) and CGD (gate to drain capacitance). Both of these MOSFET capacitances are not constants
and vary with the gate and drain voltage. The better way of quantifying gate capacitance is the total gate charge
QG in coloumbs. QG combines the charge required by CGS and CGD for a given gate drive voltage VGATE
.
Assuming negligible gate resistance, the total power dissipated in the MOSFET driver due to gate charge is
approximated by
PDRIVER = VGATE x QG x FSW
where
•
FSW = switching frequency of the MOSFET
(1)
For example, consider the MOSFET MTD6N15 whose gate charge specified as 30 nC for VGATE = 12V.
The power dissipation in the driver due to charging and discharging of MOSFET gate capacitances at switching
frequency of 300 kHz and VGATE of 12V is equal to
PDRIVER = 12V x 30 nC x 300 kHz = 0.108W.
(2)
If both channels of the SM72482 are operating at equal frequency with equivalent loads, the total losses will be
twice as this value which is 0.216W.
In addition to the above gate charge power dissipation, - transient power is dissipated in the driver during output
transitions. When either output of the SM72482 changes state, current will flow from VCC to VEE for a very brief
interval of time through the output totem-pole N and P channel MOSFETs. The final component of power
dissipation in the driver is the power associated with the quiescent bias current consumed by the driver input
stage and Under-voltage lockout sections.
8
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: SM72482
SM72482
www.ti.com
SNVS696C –JANUARY 2011–REVISED APRIL 2013
Characterization of the SM72482 provides accurate estimates of the transient and quiescent power dissipation
components. At 300 kHz switching frequency and 30 nC load used in the example, the transient power will be 8
mW. The 1 mA nominal quiescent current and 12V VGATE supply produce a 12 mW typical quiescent power.
Therefore the total power dissipation
PD = 0.216 + 0.008 + 0.012 = 0.236W.
(3)
(4)
(5)
We know that the junction temperature is given by
TJ = PD x θJA + TA
Or the rise in temperature is given by
TRISE = TJ − TA = PD x θJA
For SOIC package, θJA is estimated as 170°C/W for the conditions of natural convection. For VSSOP, θJA is
typically 60°C/W.
Therefore for SOIC TRISE is equal to
TRISE = 0.236 x 170 = 40.1°C
(6)
CONTINUOUS CURRENT RATING OF SM72482
The SM72482 can deliver pulsed source/sink currents of 3A and 5A to capacitive loads. In applications requiring
continuous load current (resistive or inductive loads), package power dissipation, limits the SM72482 current
capability far below the 5A sink/3A source capability. Rated continuous current can be estimated both when
sourcing current to or sinking current from the load. For example when sinking, the maximum sink current can be
calculated as:
T (MAX) - T
J
A
I
(MAX) :=
SINK
q
JA
· R (ON)
DS
where
•
RDS(on) is the on resistance of lower MOSFET in the output stage of SM72482
(7)
Consider TJ(max) of 125°C and θJA of 170°C/W for an SOIC package under the condition of natural convection
and no air flow. If the ambient temperature (TA) is 60°C, and the RDS(on) of the SM72482 output at TJ(max) is
2.5Ω, this equation yields ISINK(max) of 391mA which is much smaller than 5A peak pulsed currents.
Similarly, the maximum continuous source current can be calculated as
T (MAX) - T
J
A
I
(MAX) :=
SOURCE
q
JA
· V
DIODE
where
•
VDIODE is the voltage drop across hybrid output stage which varies over temperature and can be assumed to
be about 1.1V at TJ(max) of 125°C
(8)
Assuming the same parameters as above, this equation yields ISOURCE(max) of 347mA.
Copyright © 2011–2013, Texas Instruments Incorporated
Submit Documentation Feedback
9
Product Folder Links: SM72482
SM72482
SNVS696C –JANUARY 2011–REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Changes from Revision B (April 2013) to Revision C
Page
•
Changed layout of National Data Sheet to TI format ............................................................................................................ 9
10
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: SM72482
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
SM72482MA-4/NOPB
SM72482MAE-4/NOPB
SM72482MAX-4/NOPB
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
ACTIVE
SOIC
SOIC
SOIC
D
8
8
8
95
Green (RoHS
& no Sb/Br)
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
S482
ACTIVE
ACTIVE
D
D
250
Green (RoHS
& no Sb/Br)
-40 to 125
S482
S482
2500
Green (RoHS
& no Sb/Br)
-40 to 125
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Oct-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SM72482MAE-4/NOPB
SM72482MAX-4/NOPB
SOIC
SOIC
D
D
8
8
250
178.0
330.0
12.4
12.4
6.5
6.5
5.4
5.4
2.0
2.0
8.0
8.0
12.0
12.0
Q1
Q1
2500
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Oct-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SM72482MAE-4/NOPB
SM72482MAX-4/NOPB
SOIC
SOIC
D
D
8
8
250
210.0
367.0
185.0
367.0
35.0
35.0
2500
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
Automotive and Transportation www.ti.com/automotive
Communications and Telecom www.ti.com/communications
Amplifiers
Data Converters
DLP® Products
DSP
Computers and Peripherals
Consumer Electronics
Energy and Lighting
Industrial
www.ti.com/computers
www.ti.com/consumer-apps
www.ti.com/energy
dsp.ti.com
Clocks and Timers
Interface
www.ti.com/clocks
interface.ti.com
logic.ti.com
www.ti.com/industrial
www.ti.com/medical
Medical
Logic
Security
www.ti.com/security
Power Mgmt
Microcontrollers
RFID
power.ti.com
Space, Avionics and Defense
Video and Imaging
www.ti.com/space-avionics-defense
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/omap
OMAP Applications Processors
Wireless Connectivity
TI E2E Community
e2e.ti.com
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2013, Texas Instruments Incorporated
相关型号：
©2020 ICPDF网 联系我们和版权申明