SM73304MMX [TI]

Dual and Single Precision, 17 MHz, Low Noise, CMOS Input Amplifiers with Enable; 双核和单精度, 17兆赫,低噪声, CMOS输入放大器,使
SM73304MMX
型号: SM73304MMX
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

Dual and Single Precision, 17 MHz, Low Noise, CMOS Input Amplifiers with Enable
双核和单精度, 17兆赫,低噪声, CMOS输入放大器,使

放大器
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SM73304,SM73305  
SM73304 SM73305 Dual and Single Precision, 17 MHz, Low Noise, CMOS Input  
Amplifiers with Enable  
Literature Number: SNOSB98  
October 5, 2011  
SM73304  
SM73305  
Dual and Single Precision, 17 MHz, Low Noise, CMOS Input  
Amplifiers with Enable  
General Description  
Features  
The SM73304/SM73305 are dual and single low noise, low  
offset, CMOS input, rail-to-rail output precision amplifiers with  
a high gain bandwidth product and an enable pin. The  
SM73304/SM73305 are ideal for a variety of instrumentation  
applications.  
Unless otherwise noted, typical values at VS = 5V.  
Renewable Energy Grade  
Input offset voltage  
Input bias current  
Input voltage noise  
Gain bandwidth product  
Supply current (SM73305)  
Supply current (SM73304)  
Supply voltage range  
THD+N @ f = 1 kHz  
Operating temperature range  
Rail-to-rail output swing  
Space saving TSOT23 package (SM73305)  
10-pin MSOP package (SM73304)  
±150 μV (max)  
100 fA  
5.8 nV/Hz  
17 MHz  
Utilizing a CMOS input stage, the SM73304/SM73305  
achieve an input bias current of 100 fA, an input referred volt-  
age noise of 5.8 nV/Hz, and an input offset voltage of less  
than ±150 μV. These features make the SM73304/SM73305  
superior choices for precision applications.  
1.15 mA  
1.30 mA  
1.8V to 5.5V  
0.001%  
−40°C to 125°C  
Consuming only 1.15 mA of supply current, the SM73305 of-  
fers a high gain bandwidth product of 17 MHz, enabling  
accurate amplification at high closed loop gains.  
The SM73304/SM73305 have a supply voltage range of 1.8V  
to 5.5V, which makes these ideal choices for portable low  
power applications with low supply voltage requirements. In  
order to reduce the already low power consumption the  
SM73304/SM73305 have an enable function. Once in shut-  
down, the SM73304/SM73305 draw only 140 nA of supply  
current.  
Applications  
Photovoltaic Electronics  
Active filters and buffers  
Sensor interface applications  
The SM73304/SM73305 are built with National’s advanced  
VIP50 process technology. The SM73305 is offered in a 6-pin  
TSOT23 package and the SM73304 is offered in a 10-pin  
MSOP.  
Transimpedance amplifiers  
Typical Performance  
Offset Voltage Distribution  
Input Referred Voltage Noise  
30159439  
30159422  
© 2011 Texas Instruments Incorporated  
301594  
www.ti.com  
Soldering Information  
Infrared or Convection (20 sec)  
Wave Soldering Lead Temp. (10 sec)  
Absolute Maximum Ratings (Note 1)  
If Military/Aerospace specified devices are required,  
please contact the Texas Instruments Sales Office/  
Distributors for availability and specifications.  
235°C  
260°C  
Operating Ratings (Note 1)  
ESD Tolerance (Note 2)  
Human Body Model  
Machine Model  
Charge-Device Model  
VIN Differential  
Supply Voltage (VS = V+ – V)  
Voltage on Input/Output Pins  
Storage Temperature Range  
Junction Temperature (Note 3)  
Temperature Range (Note 3)  
−40°C to 125°C  
2000V  
200V  
1000V  
Supply Voltage (VS = V+ – V)  
0°C TA 125°C  
−40°C TA 125°C  
Package Thermal Resistance (θJA(Note 3))  
6-Pin TSOT23  
1.8V to 5.5V  
2.0V to 5.5V  
±0.3V  
6.0V  
V+ +0.3V, V−0.3V  
−65°C to 150°C  
+150°C  
170°C/W  
236°C/W  
10-Pin MSOP  
2.5V Electrical Characteristics  
Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 2.5V, V= 0V ,VO = VCM = V+/2, VEN = V+. Boldface limits  
apply at the temperature extremes.  
Min  
Typ  
Max  
Symbol  
Parameter  
Input Offset Voltage  
Conditions  
Units  
μV  
(Note 5) (Note 4) (Note 5)  
VOS  
±20  
±180  
±480  
TC VOS Input Offset Voltage Temperature Drift SM73305  
–1  
±4  
μV/°C  
(Note 6, Note 8)  
SM73304  
–1.75  
0.05  
IB  
Input Bias Current  
VCM = 1.0V  
1
25  
−40°C TA 85°C  
−40°C TA 125°C  
(Note 7, Note 8)  
pA  
0.05  
0.006  
100  
1
100  
IOS  
Input Offset Current  
VCM = 1.0V  
0.5  
50  
pA  
dB  
(Note 8)  
CMRR Common Mode Rejection Ratio  
PSRR Power Supply Rejection Ratio  
83  
80  
0V VCM 1.4V  
2.0V V+ 5.5V  
85  
80  
100  
V= 0V, VCM = 0  
dB  
V
1.8V V+ 5.5V  
85  
98  
V= 0V, VCM = 0  
CMVR Common Mode Voltage Range  
−0.3  
–0.3  
1.5  
1.5  
CMRR 80 dB  
CMRR 78 dB  
AVOL  
Open Loop Voltage Gain  
SM73305, VO = 0.15 to 2.2V  
RL = 2 kto V+/2  
88  
82  
98  
92  
SM73304, VO = 0.15 to 2.2V  
RL = 2 kto V+/2  
84  
80  
dB  
SM73305, VO = 0.15 to 2.2V  
RL = 10 kto V+/2  
92  
88  
110  
95  
SM73304, VO = 0.15 to 2.2V  
RL = 10 kto V+/2  
90  
86  
RL = 2 kto V+/2  
RL = 10 kto V+/2  
RL = 2 kto V+/2  
RL = 10 kto V+/2  
VOUT  
Output Voltage Swing  
High  
25  
20  
30  
15  
70  
77  
60  
66  
mV from  
either rail  
Output Voltage Swing  
Low  
70  
73  
60  
62  
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2
Min  
Typ  
Max  
Symbol  
Parameter  
Output Current  
Conditions  
Sourcing to V−  
Units  
(Note 5) (Note 4) (Note 5)  
IOUT  
36  
52  
30  
VIN = 200 mV (Note 9)  
mA  
Sinking to V+  
7.5  
15  
5.0  
VIN = −200 mV (Note 9)  
IS  
Supply Current  
SM73305  
0.95  
1.10  
0.03  
1.30  
1.65  
Enable Mode VEN 2.1  
SM73304 (per channel)  
Enable Mode VEN 2.1  
Shutdown Mode (per channel)  
VEN 0.4  
mA  
1.50  
1.85  
1
4
μA  
SR  
Slew Rate  
AV = +1, Rising (10% to 90%)  
8.3  
10.3  
14  
V/μs  
AV = +1, Falling (90% to 10%)  
GBW  
en  
Gain Bandwidth  
MHz  
Input Referred Voltage Noise Density f = 400 Hz  
f = 1 kHz  
6.8  
nV/  
5.8  
in  
Input Referred Current Noise Density f = 1 kHz  
0.01  
pA/  
ns  
ton  
Turn-on Time  
Turn-off Time  
140  
1000  
2 - 2.5  
0 - 0.5  
1.5  
toff  
ns  
VEN  
Enable Pin Voltage Range  
Enable Mode  
2.1  
V
Shutdown Mode  
VEN = 2.5V (Note 7)  
VEN = 0V (Note 7)  
0.4  
3.0  
0.1  
IEN  
Enable Pin Input Current  
μA  
0.003  
0.003  
THD+N Total Harmonic Distortion + Noise  
f = 1 kHz, AV = 1, RL = 100 kΩ  
VO = 0.9 VPP  
%
0.004  
f = 1 kHz, AV = 1, RL = 600Ω  
VO = 0.9 VPP  
5V Electrical Characteristics  
Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V= 0V, VCM = V+/2, VEN = V+. Boldface limits apply  
at the temperature extremes.  
Min  
Typ  
Max  
Symbol  
Parameter  
Input Offset Voltage  
Conditions  
Units  
μV  
(Note 5) (Note 4) (Note 5)  
VOS  
±10  
±150  
±450  
TC VOS Input Offset Voltage Temperataure Drift SM73305  
–1  
–1.75  
0.1  
±4  
μV/°C  
(Note 6, Note 8)  
SM73304  
IB  
Input Bias Current  
VCM = 2.0V  
1
25  
−40°C TA 85°C  
−40°C TA 125°C  
(Note 7, Note 8)  
pA  
0.1  
0.01  
100  
100  
1
100  
IOS  
Input Offset Current  
VCM = 2.0V  
0.5  
50  
pA  
dB  
(Note 8)  
CMRR Common Mode Rejection Ratio  
PSRR Power Supply Rejection Ratio  
85  
82  
0V VCM 3.7V  
2.0V V+ 5.5V  
85  
80  
V= 0V, VCM = 0  
dB  
1.8V V+ 5.5V  
85  
98  
V= 0V, VCM = 0  
3
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Min  
Typ  
Max  
Symbol  
Parameter  
Conditions  
CMRR 80 dB  
Units  
(Note 5) (Note 4) (Note 5)  
CMVR Common Mode Voltage Range  
−0.3  
–0.3  
4
4
V
CMRR 78 dB  
AVOL  
Open Loop Voltage Gain  
SM73305, VO = 0.3 to 4.7V  
RL = 2 kto V+/2  
88  
82  
107  
90  
SM73304, VO = 0.3 to 4.7V  
RL = 2 kto V+/2  
84  
80  
dB  
SM73305, VO = 0.3 to 4.7V  
RL = 10 kto V+/2  
92  
88  
110  
95  
SM73304, VO = 0.3 to 4.7V  
RL = 10 kto V+/2  
90  
86  
RL = 2 kto V+/2  
VOUT  
Output Voltage Swing  
High  
32  
22  
42  
70  
77  
RL = 10 kto V+/2  
mV from  
either rail  
60  
66  
RL = 2 kto V+/2  
(SM73305)  
Output Voltage Swing  
Low  
70  
73  
RL = 2 kto V+/2  
(SM73304)  
50  
75  
78  
RL = 10 kto V+/2  
20  
66  
60  
62  
IOUT  
Output Current  
Supply Current  
Sourcing to V−  
46  
38  
VIN = 200 mV (Note 9)  
mA  
Sinking to V+  
10.5  
6.5  
23  
VIN = −200 mV (Note 9)  
IS  
SM73305  
1.15  
1.30  
0.14  
1.40  
1.75  
Enable Mode VEN 4.6  
SM73304 (per channel)  
Enable Mode VEN 4.6  
mA  
1.70  
2.05  
1
4
Shutdown Mode VEN 0.4  
(per channel)  
μA  
SR  
Slew Rate  
AV = +1, Rising (10% to 90%)  
6.0  
7.5  
9.5  
11.5  
17  
V/μs  
MHz  
nV/  
AV = +1, Falling (90% to 10%)  
GBW  
en  
Gain Bandwidth  
Input Referred Voltage Noise Density f = 400 Hz  
f = 1 kHz  
7.0  
5.8  
in  
Input Referred Current Noise Density f = 1 kHz  
0.01  
pA/  
ns  
ton  
Turn-on Time  
Turn-off Time  
110  
800  
toff  
ns  
VEN  
Enable Pin Voltage Range  
Enable Mode  
4.6  
4.5 – 5  
0 – 0.5  
5.6  
V
Shutdown Mode  
VEN = 5V (Note 7)  
VEN = 0V (Note 7)  
0.4  
10  
IEN  
Enable Pin Input Current  
μA  
0.005  
0.001  
0.2  
THD+N Total Harmonic Distortion + Noise  
f = 1 kHz, AV = 1, RL = 100 kΩ  
VO = 4 VPP  
%
0.004  
f = 1 kHz, AV = 1, RL = 600Ω  
VO = 4 VPP  
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4
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is  
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics  
Tables.  
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)  
Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).  
Note 3: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is  
PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC Board.  
Note 4: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will  
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.  
Note 5: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using the Statistical Quality  
Control (SQC) method.  
Note 6: Offset voltage average drift is determined by dividing the change in VOS at the temperature extremes by the total temperature change.  
Note 7: Positive current corresponds to current flowing into the device.  
Note 8: This parameter is guaranteed by design and/or characterization and is not tested in production.  
Note 9: The short circuit test is a momentary open loop test.  
Connection Diagrams  
6-Pin TSOT23  
10-Pin MSOP  
30159401  
Top View  
30159402  
Top View  
Ordering Information  
Package  
Part Number  
SM73305MK  
SM73305MKE  
SM73305MKX  
SM73304MM  
SM73304MME  
SM73304MMX  
Package Marking  
Transport Media  
NSC Drawing  
1k Units Tape and Reel  
250 Units Tape and Reel  
3k Units Tape and Reel  
1k Units Tape and Reel  
250 Units Tape and Reel  
3.5k Units Tape and Reel  
6-Pin TSOT23  
SC8B  
MK06A  
10-Pin MSOP  
SC8B  
MUB10A  
5
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Typical Performance Characteristics Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2, VEN  
=
V+.  
Offset Voltage Distribution  
Offset Voltage Distribution  
Offset Voltage vs. VCM  
TCVOS Distribution (SM73305)  
TCVOS Distribution (SM73304)  
Offset Voltage vs. VCM  
30159481  
30159403  
30159422  
30159480  
30159410  
30159411  
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6
Offset Voltage vs. VCM  
Offset Voltage vs. Supply Voltage  
30159421  
30159412  
Offset Voltage vs. Temperature  
CMRR vs. Frequency  
30159456  
30159409  
Input Bias Current Over Temperature  
Input Bias Current Over Temperature  
30159423  
30159424  
7
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Supply Current vs. Supply Voltage (SM73305)  
Supply Current vs. Supply Voltage (SM73304)  
30159405  
30159477  
Supply Current vs. Supply Voltage (Shutdown)  
Crosstalk Rejection Ratio (SM73304)  
30159476  
30159406  
Supply Current vs. Enable Pin Voltage (SM73305)  
Supply Current vs. Enable Pin Voltage (SM73305)  
30159408  
30159407  
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8
Supply Current vs. Enable Pin Voltage (SM73304)  
Supply Current vs. Enable Pin Voltage (SM73304)  
30159478  
30159479  
Sourcing Current vs. Supply Voltage  
Sinking Current vs. Supply Voltage  
30159420  
30159419  
Sourcing Current vs. Output Voltage  
Sinking Current vs. Output Voltage  
30159450  
30159454  
9
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Output Swing High vs. Supply Voltage  
Output Swing Low vs. Supply Voltage  
30159417  
30159415  
Output Swing High vs. Supply Voltage  
Output Swing Low vs. Supply Voltage  
30159416  
30159414  
Output Swing High vs. Supply Voltage  
Output Swing Low vs. Supply Voltage  
30159418  
30159413  
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10  
Open Loop Frequency Response  
Open Loop Frequency Response  
Phase Margin vs. Capacitive Load  
Slew Rate vs. Supply Voltage  
30159473  
30159441  
Phase Margin vs. Capacitive Load  
30159445  
30159446  
Overshoot and Undershoot vs. Capacitive Load  
30159430  
30159429  
11  
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Small Signal Step Response  
Small Signal Step Response  
THD+N vs. Output Voltage  
Large Signal Step Response  
30159438  
30159437  
Large Signal Step Response  
30159433  
30159434  
THD+N vs. Output Voltage  
30159426  
30159404  
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12  
THD+N vs. Frequency  
THD+N vs. Frequency  
30159457  
30159455  
PSRR vs. Frequency  
Time Domain Voltage Noise  
30159482  
30159428  
Input Referred Voltage Noise vs. Frequency  
Closed Loop Frequency Response  
30159439  
30159436  
13  
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Closed Loop Output Impedance vs. Frequency  
30159432  
CAPACITIVE LOAD  
Application Notes  
The unity gain follower is the most sensitive configuration to  
capacitive loading. The combination of a capacitive load  
placed directly on the output of an amplifier along with the  
output impedance of the amplifier creates a phase lag which  
in turn reduces the phase margin of the amplifier. If phase  
margin is significantly reduced, the response will be either  
underdamped or the amplifier will oscillate.  
SM73304/SM73305  
The SM73304/SM73305 are dual and single, low noise, low  
offset, rail-to-rail output precision amplifiers with a wide gain  
bandwidth product of 17 MHz and low supply current. The  
wide bandwidth makes the SM73304/SM73305 ideal choices  
for wide-band amplification in portable applications. The low  
supply current along with the enable feature that is built-in on  
the SM73304/SM73305 allows for even more power efficient  
designs by turning the device off when not in use.  
The SM73304/SM73305 can directly drive capacitive loads of  
up to 120 pF without oscillating. To drive heavier capacitive  
loads, an isolation resistor, RISO in Figure 1, should be used.  
This resistor and CL form a pole and hence delay the phase  
lag or increase the phase margin of the overall system. The  
larger the value of RISO, the more stable the output voltage  
will be. However, larger values of RISO result in reduced output  
swing and reduced output current drive.  
The SM73304/SM73305 are superior for sensor applications.  
The very low input referred voltage noise of only 5.8 nV/  
at 1 kHz and very low input referred current noise of only 10  
fA/  
mean more signal fidelity and higher signal-to-noise  
ratio.  
The SM73304/SM73305 have a supply voltage range of 1.8V  
to 5.5V over a wide temperature range of 0°C to 125°C. This  
is optimal for low voltage commercial applications. For appli-  
cations where the ambient temperature might be less than 0°  
C, the SM73304/SM73305 are fully operational at supply volt-  
ages of 2.0V to 5.5V over the temperature range of −40°C to  
125°C.  
The outputs of the SM73304/SM73305 swing within 25 mV of  
either rail providing maximum dynamic range in applications  
requiring low supply voltage. The input common mode range  
of the SM73304/SM73305 extends to 300 mV below ground.  
This feature enables users to utilize this device in single sup-  
ply applications.  
30159461  
FIGURE 1. Isolating Capacitive Load  
INPUT CAPACITANCE  
The use of a very innovative feedback topology has enhanced  
the current drive capability of the SM73304/SM73305, result-  
ing in sourcing currents as much as 47 mA with a supply  
voltage of only 1.8V.  
CMOS input stages inherently have low input bias current and  
higher input referred voltage noise. The SM73304/SM73305  
enhance this performance by having the low input bias current  
of only 50 fA, as well as, a very low input referred voltage  
The SM73305 is offered in the space saving TSOT23 pack-  
age and the SM73304 is offered in a 10-pin MSOP. These  
small packages are ideal solutions for applications requiring  
minimum PC board footprint.  
noise of 5.8 nV/  
. In order to achieve this a larger input  
stage has been used. This larger input stage increases the  
input capacitance of the SM73304/SM73305. Figure 2 shows  
typical input common mode input capacitance of the  
SM73304/SM73305.  
National Semiconductor is heavily committed to precision  
amplifiers and the market segments they serves. Technical  
support and extensive characterization data is available for  
sensitive applications or applications with a constrained error  
budget.  
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14  
 
(2)  
As shown in Equation 2, as the values of R1 and R2 are in-  
creased, the magnitude of the poles are reduced, which in  
turn decreases the bandwidth of the amplifier. Figure 4 shows  
the frequency response with different value resistors for R1  
and R2. Whenever possible, it is best to chose smaller feed-  
back resistors.  
30159475  
FIGURE 2. Input Common Mode Capacitance  
This input capacitance will interact with other impedances  
such as gain and feedback resistors, which are seen on the  
inputs of the amplifier to form a pole. This pole will have little  
or no effect on the output of the amplifier at low frequencies  
and under DC conditions, but will play a bigger role as the  
frequency increases. At higher frequencies, the presence of  
this pole will decrease phase margin and also causes gain  
peaking. In order to compensate for the input capacitance,  
care must be taken in choosing feedback resistors. In addition  
to being selective in picking values for the feedback resistor,  
a capacitor can be added to the feedback path to increase  
stability.  
30159459  
FIGURE 4. Closed Loop Frequency Response  
As mentioned before, adding a capacitor to the feedback path  
will decrease the peaking. This is because CF will form yet  
another pole in the system and will prevent pairs of poles, or  
complex conjugates from forming. It is the presence of pairs  
of poles that cause the peaking of gain. Figure 5 shows the  
frequency response of the schematic presented in Figure 3  
with different values of CF. As can be seen, using a small val-  
ue capacitor significantly reduces or eliminates the peaking.  
The DC gain of the circuit shown in Figure 3 is simply −R2/  
R1.  
30159464  
FIGURE 3. Compensating for Input Capacitance  
For the time being, ignore CF. The AC gain of the circuit in  
Figure 3 can be calculated as follows:  
30159460  
FIGURE 5. Closed Loop Frequency Response  
TRANSIMPEDANCE AMPLIFIER  
In many applications, the signal of interest is a very small  
amount of current that needs to be detected. Current that is  
transmitted through a photodiode is a good example. Barcode  
scanners, light meters, fiber optic receivers, and industrial  
sensors are some typical applications utilizing photodiodes  
(1)  
This equation is rearranged to find the location of the two  
poles:  
15  
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for current detection. This current needs to be amplified be-  
fore it can be further processed. This amplification is per-  
formed using a current-to-voltage converter configuration or  
transimpedance amplifier. The signal of interest is fed to the  
inverting input of an op amp with a feedback resistor in the  
current path. The voltage at the output of this amplifier will be  
equal to the negative of the input current times the value of  
the feedback resistor. Figure 6 shows a transimpedance am-  
plifier configuration. CD represents the photodiode parasitic  
capacitance and CCM denotes the common-mode capaci-  
tance of the amplifier. The presence of all of these capaci-  
tances at higher frequencies might lead to less stable  
topologies at higher frequencies. Care must be taken when  
designing a transimpedance amplifier to prevent the circuit  
from oscillating.  
30159431  
With a wide gain bandwidth product, low input bias current  
and low input voltage and current noise, the SM73304/  
SM73305 are ideal for wideband transimpedance applica-  
tions.  
FIGURE 7. Modified Transimpedance Amplifier  
SENSOR INTERFACE  
The SM73304/SM73305 have low input bias current and low  
input referred noise, which make them ideal choices for sen-  
sor interfaces such as thermopiles, Infra Red (IR) thermom-  
etry, thermocouple amplifiers, and pH electrode buffers.  
Thermopiles generate voltage in response to receiving radi-  
ation. These voltages are often only a few microvolts. As a  
result, the operational amplifier used for this application  
needs to have low offset voltage, low input voltage noise, and  
low input bias current. Figure 8 shows a thermopile applica-  
tion where the sensor detects radiation from a distance and  
generates a voltage that is proportional to the intensity of the  
radiation. The two resistors, RA and RB, are selected to pro-  
vide high gain to amplify this signal, while CF removes the high  
frequency noise.  
30159469  
FIGURE 6. Transimpedance Amplifier  
A feedback capacitance CF is usually added in parallel with  
RF to maintain circuit stability and to control the frequency re-  
sponse. To achieve a maximally flat, 2nd order response, RF  
and CF should be chosen by using Equation 3  
30159427  
(3)  
FIGURE 8. Thermopile Sensor Interface  
Calculating CF from Equation 3 can sometimes result in ca-  
pacitor values which are less than 2 pF. This is especially the  
case for high speed applications. In these instances, its often  
more practical to use the circuit shown in Figure 7 in order to  
allow more sensible choices for CF. The new feedback ca-  
pacitor, CF, is (1+ RB/RA) CF. This relationship holds as long  
as RA << RF.  
PRECISION RECTIFIER  
Rectifiers are electrical circuits used for converting AC signals  
to DC signals. Figure 9 shows a full-wave precision rectifier.  
Each operational amplifier used in this circuit has a diode on  
its output. This means for the diodes to conduct, the output of  
the amplifier needs to be positive with respect to ground. If  
VIN is in its positive half cycle then only the output of the bot-  
tom amplifier will be positive. As a result, the diode on the  
output of the bottom amplifier will conduct and the signal will  
show at the output of the circuit. If VIN is in its negative half  
cycle then the output of the top amplifier will be positive, re-  
sulting in the diode on the output of the top amplifier conduct-  
ing and, delivering the signal on the amplifier's output to the  
circuits output.  
For R2/ R1 2, the resistor values can be found by using the  
equation shown in Figure 9. If R2/ R1 = 1, then R3 should be  
www.ti.com  
16  
 
 
 
 
left open, no resistor needed, and R4 should simply be short-  
ed.  
30159474  
FIGURE 9. Precision Rectifier  
17  
www.ti.com  
 
Physical Dimensions inches (millimeters) unless otherwise noted  
6-Pin TSOT23  
NS Package Number MK06A  
10-Pin MSOP  
NS Package Number MUB10A  
www.ti.com  
18  
Notes  
19  
www.ti.com  
Notes  
TI/NATIONAL INTERIM IMPORTANT NOTICE  
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terms previously agreed in writing with National Semiconductor, where applicable) and are not subject to any differing terms and notices  
applicable to other TI components, sales or websites. To the extent information on official TI and National websites and business social  
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Copyright© 2011 Texas Instruments Incorporated  
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IMPORTANT NOTICE  
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www.ti.com/medical  
www.ti.com/security  
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interface.ti.com  
logic.ti.com  
Medical  
Security  
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Microcontrollers  
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Copyright © 2011, Texas Instruments Incorporated  

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