SM73307MME [TI]
SM73307 Dual Precision, 17 MHz, Low Noise, CMOS Input Amplifier; SM73307双精度， 17兆赫，低噪声， CMOS输入放大器
| 型号： | SM73307MME |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | SM73307 Dual Precision, 17 MHz, Low Noise, CMOS Input Amplifier |
| 文件： | 总20页 (文件大小：970K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SM73307
SM73307 Dual Precision, 17 MHz, Low Noise, CMOS Input Amplifier
Literature Number: SNOSB88A
June 1, 2011
SM73307
Dual Precision, 17 MHz, Low Noise, CMOS Input Amplifier
General Description
Features
The SM73307 is a dual, low noise, low offset, CMOS input,
rail-to-rail output precision amplifier with a high gain band-
width product. The SM73307 is ideal for a variety of instru-
mentation applications including solar photovoltaic.
Unless otherwise noted, typical values at VS = 5V.
Renewable Energy Grade
Input offset voltage
Input bias current
Input voltage noise
Gain bandwidth product
Supply current
Supply voltage range
THD+N @ f = 1 kHz
Operating temperature range
Rail-to-rail output swing
8-Pin MSOP package
■
±150 μV (max)
100 fA
■
■
■
■
■
■
■
■
■
■
Utilizing a CMOS input stage, the SM73307 achieves an input
bias current of 100 fA, an input referred voltage noise of 5.8
5.8 nV/√Hz
17 MHz
nV/
, and an input offset voltage of less than ±150 μV.
1.30 mA
These features make the SM73307 a superior choice for pre-
cision applications.
1.8V to 5.5V
0.001%
−40°C to 125°C
Consuming only 1.30 mA of supply current per channel, the
SM73307 offers a high gain bandwidth product of 17 MHz,
enabling accurate amplification at high closed loop gains.
The SM73307 has a supply voltage range of 1.8V to 5.5V,
which makes it an ideal choice for portable low power appli-
cations with low supply voltage requirements.
Applications
The SM73307 is built with National’s advanced VIP50 pro-
cess technology and is offered in an 8-pin MSOP package.
Photovoltaic Electronics
■
■
■
■
Active filters and buffers
The SM73307 incorporates enhanced manufacturing and
support processes for the photovoltaic and automotive mar-
ket, including defect detection methodologies. Reliability
qualification is compliant with the requirements and temper-
ature grades defined in the Renewable Energy Grade and
AEC-Q100 standards.
Sensor interface applications
Transimpedance amplifiers
Automotive
■
Typical Performance
Offset Voltage Distribution
Input Referred Voltage Noise
30155339
30155322
© 2011 National Semiconductor Corporation
301553
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Soldering Information
Infrared or Convection (20 sec)
Wave Soldering Lead Temp. (10 sec)
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
235°C
260°C
Operating Ratings (Note 1)
ESD Tolerance (Note 2)
Human Body Model
Machine Model
Temperature Range (Note 3)
−40°C to 125°C
2000V
200V
Supply Voltage (VS = V+ – V−)
0°C ≤ TA ≤ 125°C
−40°C ≤ TA ≤ 125°C
Package Thermal Resistance (θJA(Note 3))
8-Pin MSOP
Charge-Device Model
VIN Differential
Supply Voltage (VS = V+ – V−)
Voltage on Input/Output Pins
Storage Temperature Range
Junction Temperature (Note 3)
1000V
1.8V to 5.5V
2.0V to 5.5V
±0.3V
6.0V
V+ +0.3V, V− −0.3V
−65°C to 150°C
+150°C
236°C/W
2.5V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 2.5V, V− = 0V ,VO = VCM = V+/2. Boldface limits apply at
the temperature extremes.
Min
Typ
Max
Symbol
VOS
Parameter
Conditions
−20°C ≤ TA ≤ 85°C
−40°C ≤ TA ≤ 125°C
Units
μV
(Note 5) (Note 4) (Note 5)
±180
±20
±330
Input Offset Voltage
±180
±20
±430
Input Offset Voltage Temperature Drift
(Note 6, Note 8)
TC VOS
–1.75
0.05
0.05
0.006
100
±4
μV/°C
pA
1
25
−40°C ≤ TA ≤ 85°C
−40°C ≤ TA ≤ 125°C
VCM = 1.0V
IB
Input Bias Current
Input Offset Current
(Note 7, Note 8)
1
100
VCM = 1V
0.5
50
IOS
pA
dB
(Note 8)
83
80
CMRR Common Mode Rejection Ratio
0V ≤ VCM ≤ 1.4V
2.0V ≤ V+ ≤ 5.5V
85
80
100
98
V− = 0V, VCM = 0
PSRR
Power Supply Rejection Ratio
dB
V
1.8V ≤ V+ ≤ 5.5V
85
V− = 0V, VCM = 0
CMRR ≥ 80 dB
CMRR ≥ 78 dB
VO = 0.15 to 2.2V
RL = 2 kΩ to V+/2
VO = 0.15 to 2.2V
RL = 10 kΩ to V+/2
−0.3
–0.3
1.5
1.5
CMVR Common Mode Voltage Range
84
80
92
AVOL
Open Loop Voltage Gain
dB
90
86
95
25
20
30
15
70
77
RL = 2 kΩ to V+/2
RL = 10 kΩ to V+/2
RL = 2 kΩ to V+/2
RL = 10 kΩ to V+/2
Output Voltage Swing
High
60
66
mV from
either rail
VOUT
70
73
Output Voltage Swing
Low
60
62
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Min
Typ
Max
Symbol
IOUT
Parameter
Conditions
Sourcing to V−
Units
mA
(Note 5) (Note 4) (Note 5)
36
52
30
VIN = 200 mV (Note 9)
Output Current
Sinking to V+
7.5
15
VIN = −200 mV (Note 9)
5.0
1.50
1.10
IS
Supply Current
Per Channel
mA
1.85
AV = +1, Rising (10% to 90%)
AV = +1, Falling (90% to 10%)
8.3
10.3
14
SR
Slew Rate
V/μs
GBW
en
Gain Bandwidth
MHz
f = 400 Hz
f = 1 kHz
6.8
Input Referred Voltage Noise Density
nV/
pA/
5.8
in
Input Referred Current Noise Density f = 1 kHz
0.01
f = 1 kHz, AV = 1, RL = 100 kΩ
VO = 0.9 VPP
0.003
0.004
THD+N Total Harmonic Distortion + Noise
%
f = 1 kHz, AV = 1, RL = 600Ω
VO = 0.9 VPP
5V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = 0V, VCM = V+/2. Boldface limits apply at the
temperature extremes.
Min
Typ
Max
Symbol
VOS
Parameter
Conditions
−20°C ≤ TA ≤ 85°C
−40°C ≤ TA ≤ 125°C
Units
μV
(Note 5) (Note 4) (Note 5)
±150
±10
±300
Input Offset Voltage
±150
±10
±400
Input Offset Voltage Temperature Drift
(Note 6, Note 8)
TC VOS
–1.75
0.1
±4
μV/°C
pA
1
25
−40°C ≤ TA ≤ 85°C
−40°C ≤ TA ≤ 125°C
VCM = 2.0V
IB
Input Bias Current
Input Offset Current
(Note 7, Note 8)
1
100
0.1
VCM = 2.0V
0.5
50
IOS
0.01
100
pA
dB
(Note 8)
85
82
CMRR Common Mode Rejection Ratio
0V ≤ VCM ≤ 3.7V
2.0V ≤ V+ ≤ 5.5V
85
80
100
98
V− = 0V, VCM = 0
PSRR
Power Supply Rejection Ratio
dB
V
1.8V ≤ V+ ≤ 5.5V
85
V− = 0V, VCM = 0
CMRR ≥ 80 dB
CMRR ≥ 78 dB
VO = 0.3 to 4.7V
RL = 2 kΩ to V+/2
VO = 0.3 to 4.7V
RL = 10 kΩ to V+/2
−0.3
–0.3
4
4
CMVR Common Mode Voltage Range
84
80
90
95
AVOL
Open Loop Voltage Gain
dB
90
86
3
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Min
Typ
Max
Symbol
Parameter
Conditions
RL = 2 kΩ to V+/2
Units
(Note 5) (Note 4) (Note 5)
70
77
32
Output Voltage Swing
High
60
66
RL = 10 kΩ to V+/2
RL = 2 kΩ to V+/2
RL = 10 kΩ to V+/2
22
mV from
either rail
VOUT
75
78
45
Output Voltage Swing
Low
60
62
20
Sourcing to V−
46
66
38
VIN = 200 mV (Note 9)
IOUT
Output Current
Supply Current
mA
mA
Sinking to V+
10.5
23
VIN = −200 mV (Note 9)
6.5
1.70
1.30
IS
(per channel)
2.05
AV = +1, Rising (10% to 90%)
AV = +1, Falling (90% to 10%)
6.0
7.5
9.5
11.5
17
SR
Slew Rate
V/μs
MHz
nV/
GBW
en
Gain Bandwidth
f = 400 Hz
f = 1 kHz
7.0
Input Referred Voltage Noise Density
5.8
in
Input Referred Current Noise Density f = 1 kHz
0.01
pA/
f = 1 kHz, AV = 1, RL = 100 kΩ
VO = 4 VPP
0.001
0.004
THD+N Total Harmonic Distortion + Noise
%
f = 1 kHz, AV = 1, RL = 600Ω
VO = 4 VPP
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics
Tables.
Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)
Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 3: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PC Board.
Note 4: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 5: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using the Statistical Quality
Control (SQC) method.
Note 6: Offset voltage average drift is determined by dividing the change in VOS at the temperature extremes by the total temperature change.
Note 7: Positive current corresponds to current flowing into the device.
Note 8: This parameter is guaranteed by design and/or characterization and is not tested in production.
Note 9: The short circuit test is a momentary open loop test.
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4
Connection Diagram
8-Pin MSOP
30155302
Top View
Ordering Information
Package
Part Number
SM73307MM
SM73307MME
SM73307MMX
Package Marking
Transport Media
NSC Drawing
Features
1k Units Tape and Reel
250 Units Tape and Reel
3.5k Units Tape and Reel
8–Pin MSOP
S307
MUA08A
Renewable Energy Grade
5
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Typical Performance Characteristics Unless otherwise noted: TA = 25°C, VS = 5V, VCM = VS/2.
Offset Voltage Distribution
Offset Voltage Distribution
Offset Voltage vs. VCM
Offset Voltage vs. VCM
30155381
30155322
TCVOS Distribution
30155380
30155310
Offset Voltage vs. VCM
30155312
30155311
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Offset Voltage vs. Supply Voltage
CMRR vs. Frequency
Input Bias Current vs. VCM
Crosstalk Rejection Ratio
30155321
30155356
Input Bias Current vs. VCM
30155323
30155324
Supply Current vs. Supply Voltage
30155376
30155377
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Sourcing Current vs. Supply Voltage
Sinking Current vs. Supply Voltage
30155320
30155319
Sourcing Current vs. Output Voltage
Sinking Current vs. Output Voltage
30155350
30155354
Output Swing High vs. Supply Voltage
Output Swing Low vs. Supply Voltage
30155317
30155315
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Output Swing High vs. Supply Voltage
Output Swing Low vs. Supply Voltage
30155316
30155314
Output Swing High vs. Supply Voltage
Output Swing Low vs. Supply Voltage
30155318
30155313
Open Loop Frequency Response
Open Loop Frequency Response
30155373
30155341
9
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Phase Margin vs. Capacitive Load
Phase Margin vs. Capacitive Load
30155345
30155346
Overshoot and Undershoot vs. Capacitive Load
Slew Rate vs. Supply Voltage
30155330
30155329
Small Signal Step Response
Large Signal Step Response
30155338
30155337
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Small Signal Step Response
THD+N vs. Output Voltage
THD+N vs. Frequency
Large Signal Step Response
THD+N vs. Output Voltage
THD+N vs. Frequency
30155333
30155334
30155326
30155304
30155357
30155355
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PSRR vs. Frequency
Input Referred Voltage Noise vs. Frequency
30155339
30155328
Time Domain Voltage Noise
Closed Loop Frequency Response
30155382
30155336
Closed Loop Output Impedance vs. Frequency
30155332
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12
INPUT CAPACITANCE
Application Information
CMOS input stages inherently have low input bias current and
higher input referred voltage noise. The SM73307 enhances
this performance by having the low input bias current of only
50 fA, as well as, a very low input referred voltage noise of
The SM73307 is a dual, low noise, low offset, rail-to-rail output
precision amplifier with a wide gain bandwidth product of 17
MHz and low supply current. The wide bandwidth makes the
SM73307 an ideal choice for wide-band amplification in pho-
tovoltaic and portable applications.
5.8 nV/
. In order to achieve this a larger input stage has
been used. This larger input stage increases the input capac-
itance of the SM73307. Figure 2 shows typical input common
mode capacitance of the SM73307.
The SM73307 is superior for sensor applications. The very
low input referred voltage noise of only 5.8 nV/
at 1 kHz
and very low input referred current noise of only 10 fA/
mean more signal fidelity and higher signal-to-noise ratio.
The SM73307 has a supply voltage range of 1.8V to 5.5V over
a wide temperature range of 0°C to 125°C. This is optimal for
low voltage commercial applications. For applications where
the ambient temperature might be less than 0°C, the
SM73307 is fully operational at supply voltages of 2.0V to
5.5V over the temperature range of −40°C to 125°C.
The outputs of the SM73307 swing within 25 mV of either rail
providing maximum dynamic range in applications requiring
low supply voltage. The input common mode range of the
SM73307 extends to 300 mV below ground. This feature en-
ables users to utilize this device in single supply applications.
The use of a very innovative feedback topology has enhanced
the current drive capability of the SM73307, resulting in sourc-
ing currents of as much as 47 mA with a supply voltage of only
1.8V.
The SM73307 is offered in an 8-pin MSOP package. This
small package is an ideal solution for applications requiring
minimum PC board footprint.
30155375
FIGURE 2. Input Common Mode Capacitance
CAPACITIVE LOAD
This input capacitance will interact with other impedances,
such as gain and feedback resistors which are seen on the
inputs of the amplifier, to form a pole. This pole will have little
or no effect on the output of the amplifier at low frequencies
and under DC conditions, but will play a bigger role as the
frequency increases. At higher frequencies, the presence of
this pole will decrease phase margin and also cause gain
peaking. In order to compensate for the input capacitance,
care must be taken in choosing feedback resistors. In addition
to being selective in picking values for the feedback resistor,
a capacitor can be added to the feedback path to increase
stability.
The unity gain follower is the most sensitive configuration to
capacitive loading. The combination of a capacitive load
placed directly on the output of an amplifier along with the
output impedance of the amplifier creates a phase lag which
in turn reduces the phase margin of the amplifier. If phase
margin is significantly reduced, the response will be either
under-damped or the amplifier will oscillate.
The SM73307 can directly drive capacitive loads of up to
120 pF without oscillating. To drive heavier capacitive loads,
an isolation resistor, RISO as shown in Figure 1, should be
used. This resistor and CL form a pole and hence delay the
phase lag or increase the phase margin of the overall system.
The larger the value of RISO, the more stable the output volt-
age will be. However, larger values of RISO result in reduced
output swing and reduced output current drive.
The DC gain of the circuit shown in Figure 3 is simply −R2/
R1.
30155361
FIGURE 1. Isolating Capacitive Load
30155364
FIGURE 3. Compensating for Input Capacitance
13
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For the time being, ignore CF. The AC gain of the circuit in
Figure 3 can be calculated as follows:
(1)
This equation is rearranged to find the location of the two
poles:
(2)
As shown in Equation 2, as the values of R1 and R2 are in-
creased, the magnitude of the poles are reduced, which in
turn decreases the bandwidth of the amplifier. Figure 4 shows
the frequency response with different value resistors for R1
and R2. Whenever possible, it is best to choose smaller feed-
back resistors.
30155360
FIGURE 5. Closed Loop Frequency Response
TRANSIMPEDANCE AMPLIFIER
In many applications the signal of interest is a very small
amount of current that needs to be detected. Current that is
transmitted through a photodiode is a good example. Barcode
scanners, light meters, fiber optic receivers, and industrial
sensors are some typical applications utilizing photodiodes
for current detection. This current needs to be amplified be-
fore it can be further processed. This amplification is per-
formed using a current-to-voltage converter configuration or
transimpedance amplifier. The signal of interest is fed to the
inverting input of an op amp with a feedback resistor in the
current path. The voltage at the output of this amplifier will be
equal to the negative of the input current times the value of
the feedback resistor. Figure 6 shows a transimpedance am-
plifier configuration. CD represents the photodiode parasitic
capacitance and CCM denotes the common-mode capaci-
tance of the amplifier. The presence of all of these capaci-
tances at higher frequencies might lead to less stable
topologies at higher frequencies. Care must be taken when
designing a transimpedance amplifier to prevent the circuit
from oscillating.
30155359
FIGURE 4. Closed Loop Frequency Response
With a wide gain bandwidth product, low input bias current
and low input voltage and current noise, the SM73307 is ideal
for wideband transimpedance applications.
As mentioned before, adding a capacitor to the feedback path
will decrease the peaking. This is because CF will form yet
another pole in the system and will prevent pairs of poles, or
complex conjugates from forming. It is the presence of pairs
of poles that cause the peaking of gain. Figure 5 shows the
frequency response of the schematic presented in Figure 3
with different values of CF. As can be seen, using a small val-
ue capacitor significantly reduces or eliminates the peaking.
30155369
FIGURE 6. Transimpedance Amplifier
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14
A feedback capacitance CF is usually added in parallel with
RF to maintain circuit stability and to control the frequency re-
sponse. To achieve a maximally flat, 2nd order response, RF
and CF should be chosen by using Equation 3
PRECISION RECTIFIER
Rectifiers are electrical circuits used for converting AC signals
to DC signals. Figure 9 shows a full-wave precision rectifier.
Each operational amplifier used in this circuit has a diode on
its output. This means for the diodes to conduct, the output of
the amplifier needs to be positive with respect to ground. If
VIN is in its positive half cycle then only the output of the bot-
tom amplifier will be positive. As a result, the diode on the
output of the bottom amplifier will conduct and the signal will
show at the output of the circuit. If VIN is in its negative half
cycle then the output of the top amplifier will be positive, re-
sulting in the diode on the output of the top amplifier conduct-
ing and delivering the signal from the amplifier's output to the
circuit's output.
(3)
Calculating CF from Equation 3 can sometimes result in ca-
pacitor values which are less than 2 pF. This is especially the
case for high speed applications. In these instances, it is often
more practical to use the circuit shown in Figure 7 in order to
allow more sensible choices for CF. The new feedback ca-
pacitor, CF′, is (1+ RB/RA) CF. This relationship holds as long
as RA << RF.
For R2/ R1 ≥ 2, the resistor values can be found by using the
equation shown in Figure 9. If R2/ R1 = 1, then R3 should be
left open, no resistor needed, and R4 should simply be short-
ed.
30155331
FIGURE 7. Modified Transimpedance Amplifier
SENSOR INTERFACE
30155374
The SM73307 has a low input bias current and low input re-
ferred noise, which makes it an ideal choice for sensor inter-
faces such as thermopiles, Infra Red (IR) thermometry,
thermocouple amplifiers, and pH electrode buffers.
FIGURE 9. Precision Rectifier
Thermopiles generate voltage in response to receiving radi-
ation. These voltages are often only a few microvolts. As a
result, the operational amplifier used for this application
needs to have low offset voltage, low input voltage noise, and
low input bias current. Figure 8 shows a thermopile applica-
tion where the sensor detects radiation from a distance and
generates a voltage that is proportional to the intensity of the
radiation. The two resistors, RA and RB, are selected to pro-
vide high gain to amplify this signal, while CF removes the high
frequency noise.
30155327
FIGURE 8. Thermopile Sensor Interface
15
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Physical Dimensions inches (millimeters) unless otherwise noted
8-Pin MSOP
NS Package Number MUA08A
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Notes
17
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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Audio
Applications
www.ti.com/audio
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
Communications and Telecom www.ti.com/communications
Amplifiers
Data Converters
DLP® Products
DSP
Computers and Peripherals
Consumer Electronics
Energy and Lighting
Industrial
www.ti.com/computers
www.ti.com/consumer-apps
www.ti.com/energy
dsp.ti.com
www.ti.com/industrial
www.ti.com/medical
www.ti.com/security
Clocks and Timers
Interface
www.ti.com/clocks
interface.ti.com
logic.ti.com
Medical
Security
Logic
Space, Avionics and Defense www.ti.com/space-avionics-defense
Transportation and Automotive www.ti.com/automotive
Power Mgmt
Microcontrollers
RFID
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
Video and Imaging
www.ti.com/video
OMAP Mobile Processors www.ti.com/omap
Wireless Connectivity www.ti.com/wirelessconnectivity
TI E2E Community Home Page
e2e.ti.com
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