SN10KHT5539NT [TI]
OCTAL ECL-TO-TTL TRANSLATOR WITH OPEN-COLLECTOR OUTPUTS;
| 型号： | SN10KHT5539NT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL ECL-TO-TTL TRANSLATOR WITH OPEN-COLLECTOR OUTPUTS 输出元件 |
| 文件： | 总6页 (文件大小：103K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢇꢇ ꢈꢉ
ꢊ ꢋꢆꢌꢍꢎꢏ ꢋꢍ ꢐꢆꢊ ꢐꢆ ꢆꢍꢎꢆ ꢑꢌꢁ ꢀ ꢍꢌꢆꢊ ꢑ
ꢒ ꢓꢆ ꢅꢎ ꢊꢔ ꢏꢁꢐꢋꢊ ꢍ ꢍ ꢏꢋꢆꢊ ꢑꢎꢊ ꢕ ꢆꢔ ꢕꢆ ꢀ
SDZS007 − JANUARY 1990 − REVISED OCTOBER 1990
DW OR NT PACKAGE
(T0P VIEW)
• 10KH Compatible
• Open-Collector Outputs Drive Bus Lines or
Y1
Y2
Y3
Y4
A1
A2
A3
A4
Buffer Memory Address Registers
1
24
23
22
21
20
19
18
17
16
15
14
13
2
• ECL and TTL Output-Enable Inputs
3
4
• Flow-Through Architecture Optimizes PCB
V
OE2 (TTL)
5
Layout
CC
GND
GND
GND
Y5
Y6
Y7
V
6
EE
• Center-Pin V , V , and GND
CC EE
GND
OE1 (ECL)
A5
A6
A7
A8
7
Configurations Minimize High-Speed
8
Switching Noise
9
10
11
12
• Package Options Include “Small Outline”
Packages and Standard Plastic 300-mil
DIPs
Y8
description
This octal ECL-to-TTL translator is designed to provide efficient translation between a 10KH signal environment
and a TTL signal environment. This device is designed specifically to improve the performance and density of
ECL-to-TTL CPU/bus-oriented functions such as memory-address drivers, clock drivers, and bus-oriented
receivers and transmitters while eliminating the need for 3-state overlap protection.
Two pins OE1 and OE2 are provided for output-enable control. These control inputs are ANDed together with
OE1 being ECL-compatible and OE2 being TTL-compatible. This offers the choice of controlling the outputs of
the device from either a TTL or ECL signal environment.
The SN10KHT5539 is characterized for operation from 0°C to 75°C.
FUNCTION TABLE
OUTPUT
ENABLE
DATA
OUTPUT
INPUT
(TTL)
OE1
OE2
A
X
X
L
Y
H
H
L
X
H
L
H
X
L
L
L
H
H
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Copyright 1990, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇꢇꢈ ꢉ
ꢊꢋ ꢆꢌ ꢍꢎ ꢏꢋ ꢍ ꢐꢆꢊ ꢐꢆꢆꢍꢎ ꢆꢑ ꢌꢁ ꢀꢍ ꢌꢆꢊ ꢑ
ꢒꢓ ꢆ ꢅ ꢎꢊ ꢔꢏꢁꢐꢋ ꢊꢍ ꢍꢏ ꢋꢆꢊ ꢑꢎ ꢊ ꢕꢆꢔ ꢕꢆꢀ
SDZS007 − JANUARY 1990 − REVISED OCTOBER 1990
†
logic symbol
logic diagram (positive logic)
24
ECL/TTL
&
1
2
3
4
17
20
ECL/TTL
ECL/TTL
ECL/TTL
ECL/TTL
A1
OE1
OE2
Y1
Y2
EN
23
22
21
A2
A3
A4
24
23
1
2
ECL/TTL
A1
Y1
Y3
Y4
A2
A3
A4
Y2
Y3
Y4
22
21
16
3
4
9
A5
A6
A7
A8
Y5
Y6
Y7
Y8
15
14
13
10
11
12
17
20
OE1 (ECL)
OE2 (TTL)
ECL/TTL
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
16
15
9
ECL/TTL
ECL/TTL
ECL/TTL
ECL/TTL
A5
A6
Y5
Y6
10
14
13
11
12
A7
A8
Y7
Y8
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −8 V to 0 V
CC
EE
Input voltage range: TTL (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −1.2 V to 7 V
ECL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V to 0 V
EE
Input current range, TTL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −30 mA to 5 mA
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
Voltage applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
CC
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 75°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The TTL input voltage ratings may be exceeded provided the input current ratings are observed.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁꢂ ꢃꢄ ꢅꢆ ꢇꢇ ꢈꢉ
ꢊ ꢋꢆꢌꢍꢎꢏ ꢋꢍ ꢐꢆꢊ ꢐꢆ ꢆꢍꢎꢆ ꢑꢌꢁ ꢀ ꢍꢌꢆꢊ ꢑ
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SDZS007 − JANUARY 1990 − REVISED OCTOBER 1990
recommended operating conditions
MIN
4.5
NOM
5
MAX
5.5
UNIT
V
V
V
V
TTL supply voltage
V
V
V
V
CC
EE
IH
ECL supply voltage
−4.94
2
−5.2
−5.46
TTL high-level input voltage
TTL low-level input voltage
0.8
−840
−810
−735
−1480
−1480
−1450
5.5
IL
T
= 0°C
−1170
−1130
−1070
−1950
−1950
−1950
A
†
V
IH
ECL high-level input voltage
T
A
T
A
T
A
T
A
= 25°C
= 75°C
= 0°C
= 25°C
= 75°C
mV
mV
†
V
V
ECL low-level input voltage
IL
T
A
TTL high-level output voltage
TTL input clamp current
V
OH
I
I
−18
mA
mA
°C
IK
Low-level output current
48
OL
T
A
Operating free-air temperature range
0
75
†
The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for logic levels only.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
‡
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
−1.2
250
0.55
0.1
UNIT
V
V
IK
OE2 only
V
V
V
V
V
V
V
V
V
= 4.5 V,
= 4.5 V,
= 4.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
V
V
V
V
V
V
V
V
V
= −4.94 V,
I = −18 mA
I
CC
CC
CC
CC
CC
CC
CC
CC
CC
EE
EE
EE
EE
EE
EE
EE
EE
EE
I
= −4.94 V,
= −5.2 V 5%,
= −5.46 V,
= −5.46 V,
= −5.46 V,
= −5.46 V,
= −5.46 V,
= −5.46 V,
V
= 5.5 V
µA
V
OH
OH
= 48 mA
V
OL
I
0.38
OL
V = 7 V
I
I
I
OE2 only
OE2 only
OE2 only
mA
µA
mA
I
I
V = 2.7 V
I
V = 0.5 V
I
V = −840 mV
I
V = −810 mV
I
20
IH
IL
−0.5
350
350
350
T
= 0°C
A
I
A inputs and OE1
A inputs and OE1
T
A
T
A
T
A
T
A
T
A
= 25°C
= 75°C
= 0°C
= 25°C
= 75°C
µA
µA
IH
IL
V = −735 mV
I
0.5
0.5
0.5
I
V
CC
= 5.5 V,
V
EE
= −5.46 V,
V = −1950 mV
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5 V,
V
EE
V
EE
V
EE
V
EE
V
EE
= −5.46 V
= −5.46 V
= −5.46 V
= −5.2 V
= −5.2 V
63
79
−22
6
91
114
−32
mA
mA
mA
pF
CCH
CCL
EE
C
i
C
= 5 V,
5
pF
o
‡
All typical values are at V
CC
= 5 V, V = −5.2 V, T = 25°C.
EE A
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇꢇꢈ ꢉ
ꢊꢋ ꢆꢌ ꢍꢎ ꢏꢋ ꢍ ꢐꢆꢊ ꢐꢆꢆꢍꢎ ꢆꢑ ꢌꢁ ꢀꢍ ꢌꢆꢊ ꢑ
ꢒꢓ ꢆ ꢅ ꢎꢊ ꢔꢏꢁꢐꢋ ꢊꢍ ꢍꢏ ꢋꢆꢊ ꢑꢎ ꢊ ꢕꢆꢔ ꢕꢆꢀ
SDZS007 − JANUARY 1990 − REVISED OCTOBER 1990
switching characteristics over recommended ranges of operating supply voltage and free-air
temperature (unless otherwise noted) (see Figure 1)
C
= 50 pF,
L
FROM
TO
R1 = 500 Ω,
R2 = 500 Ω
PARAMETER
UNIT
(INPUT)
(OUTPUT)
†
MIN TYP
MAX
12.4
7.3
t
t
t
t
t
t
6.2
2.6
7.1
3.2
6.5
2.7
9.3
4.9
PLH
PHL
PLH
PHL
PLH
PHL
Any A
Y
ns
10.3
5.8
13.5
8.4
OE1 (ECL)
OE2 (TTL)
Y
Y
ns
ns
9.5
12.4
8
5.3
†
All typical values are at V
CC
= 5 V, V = −5.2 V, T = 25°C.
EE A
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
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SDZS007 − JANUARY 1990 − REVISED OCTOBER 1990
PARAMETER MEASUREMENT INFORMATION
7 V
R1
From Output
Test Point
Under Test
C
R2
L
(See Note A)
LOAD CIRCUIT
3 V
t
t
r
f
−890 mV
Input
80%
50%
80%
50%
Input
(See Note B)
1.5 V
1.5 V
(See Note C)
20%
PLH
20%
0
−1690 mV
t
t
PHL
PHL
t
t
PLH
V
V
V
OH
OL
OH
In-Phase
Output
In-Phase
Output
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
V
OL
t
t
PLH
PLH
t
t
PHL
PHL
V
V
V
OH
OL
OH
Out-of-Phase
Output
1.5 V
1.5 V
1.5 V
Out-of-Phase
Output
V
OL
TTL-INPUT PROPAGATION DELAY TIMES
NOTES: A.C includes probe and jig capacitance.
ECL-INPUT PROPAGATION DELAY TIMES
L
B.For TTL inputs, input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns,
o
r
t ≤ 2.5 ns.
f
C.For ECL inputs, input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 1.5 ns,
o
r
t ≤ 1.5 ns.
f
D.The outputs are measured one at a time with one transition per measurement.
Figure 1. load circuit and voltage waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
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相关型号：
SN10KHT5540NT
OCTAL ECL TO TTL TRANSLATOR, INVERTED OUTPUT, PDIP24, 0.300 INCH, PLASTIC, DIP-24
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