SN54ABT162244_14 [TI]
16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS;
| 型号： | SN54ABT162244_14 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS 驱动 输出元件 |
| 文件： | 总12页 (文件大小：214K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SCBS238E − JUNE 1992 − REVISED JUNE 2004
SN54ABT162244 . . . WD PACKAGE
SN74ABT162244 . . . DGG, DGV, OR DL PACKAGE
(TOP VIEW)
D
D
Members of the Texas Instruments
Widebus E Family
Output Ports Have Equivalent 25-Ω Series
Resistors, So No External Resistors Are
Required
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1Y1
1Y2
GND
1Y3
1Y4
2OE
1A1
1A2
GND
1A3
1A4
2
D
D
D
D
D
D
Typical V
(Output Ground Bounce)
OLP
3
<1 V at V
= 5 V, T = 25°C
4
CC
A
5
High-Impedance State During Power Up
and Power Down
6
7
V
V
I
and Power-Up 3-State Support Hot
CC
CC
off
8
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
Insertion
9
Distributed V
High-Speed Switching Noise
and GND Pins Minimize
CC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Flow-Through Architecture Optimizes PCB
Layout
Latch-Up Performance Exceeds 500 mA Per
JESD-17
description/ordering information
V
V
CC
CC
The ’ABT162244 devices are 16-bit buffers and
line drivers designed specifically to improve both
the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented
receivers and transmitters. These devices can be
used as four 4-bit buffers, two 8-bit buffers, or one
16-bit buffer. These devices provide noninverting
4Y1
4Y2
GND
4Y3
4Y4
4A1
4A2
GND
4A3
4A4
3OE
4OE
outputs
and
symmetrical
active-low
output-enable (OE) inputs.
The outputs, which are designed to source or sink up to 12 mA, include equivalent 25-Ω series resistors to
reduce overshoot and undershoot.
To ensure the high-impedance state during power up or power down, OE should be tied to V
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
through a pullup
CC
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
Tube
SN74ABT162244DL
SSOP − DL
ABT162244
Tape and reel
SN74ABT162244DLR
SN74ABT162244DGGR
SN74ABT162244DGVR
SNJ54ABT162244WD
−40°C to 85°C
−55°C to 125°C
TSSOP − DGG Tape and reel
ABT162244
TVSOP − DGV
CFP − WD
Tape and reel
Tube
AH2244
SNJ54ABT162244WD
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
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Copyright 2004, Texas Instruments Incorporated
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1
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ꢇꢈ ꢌꢅꢍ ꢆ ꢅ ꢎ ꢏꢏ ꢐꢑ ꢀꢒ ꢓ ꢑꢍ ꢔ ꢐꢑ ꢀ
ꢕꢍ ꢆꢖ ꢗ ꢌꢀꢆꢄꢆ ꢐ ꢘꢎꢆ ꢙ ꢎꢆꢀ
SCBS238E − JUNE 1992 − REVISED JUNE 2004
description/ordering information (continued)
These devices are fully specified for hot-insertion applications using I and power-up 3-state. The I circuitry
off
off
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
FUNCTION TABLE
(each 4-bit buffer)
INPUTS
OUTPUT
Y
OE
L
A
H
L
H
L
L
H
X
Z
logic diagram (positive logic)
1
25
36
1OE
3OE
3A1
47
2
3
5
6
13
14
16
17
1A1
1Y1
1Y2
1Y3
1Y4
3Y1
3Y2
3Y3
3Y4
46
35
33
32
1A2
3A2
3A3
3A4
44
1A3
43
1A4
48
24
30
2OE
4OE
4A1
41
8
9
19
20
22
23
2A1
2Y1
2Y2
2Y3
2Y4
4Y1
4Y2
4Y3
4Y4
40
29
27
26
2A2
4A2
4A3
4A4
38
11
2A3
37
12
2A4
2
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SCBS238E − JUNE 1992 − REVISED JUNE 2004
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Voltage range applied to any output in the high or power-off state, V
. . . . . . . . . . . . . . . . . . . −0.5 V to 5.5 V
O
Current into any output in the low state, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
O
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −18 mA
IK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
OK
O
Package thermal impedance, θ (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
JA
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Storage temperature range, T
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54ABT162244 SN74ABT162244
UNIT
MIN
4.5
2
MAX
MIN
4.5
2
MAX
V
V
V
V
Supply voltage
5.5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
Input voltage
IH
0.8
0.8
V
IL
0
V
0
V
CC
V
I
CC
−3
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Power-up ramp rate
−12
12
mA
mA
ns/V
µs/V
°C
OH
OL
8
∆t/∆v
∆t/∆V
Outputs enabled
10
10
200
−55
200
−40
CC
T
A
Operating free-air temperature
125
85
NOTES: 3. All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢉꢉ ꢃꢃ ꢊ ꢀ ꢁꢋ ꢃ ꢄꢅꢆ ꢇ ꢈꢉ ꢉ ꢃꢃ
ꢇꢈ ꢌꢅꢍ ꢆ ꢅ ꢎ ꢏꢏ ꢐꢑ ꢀꢒ ꢓ ꢑꢍ ꢔ ꢐꢑ ꢀ
ꢕꢍ ꢆꢖ ꢗ ꢌꢀꢆꢄꢆ ꢐ ꢘꢎꢆ ꢙ ꢎꢆꢀ
SCBS238E − JUNE 1992 − REVISED JUNE 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54ABT162244 SN74ABT162244
A
PARAMETER
TEST CONDITIONS
UNIT
†
MIN TYP
MAX
MIN
MAX
MIN
MAX
V
V
V
V
V
= 4.5 V,
I = −18 mA
−1.2
−1.2
−1.2
V
IK
CC
CC
CC
I
= 4.5 V,
= 5 V,
I
I
I
I
I
I
= −1 mA
= −1 mA
= −3 mA
= −12 mA
= 8 mA
3.35
3.85
3.1
3.35
3.85
3.1
3.35
3.85
3.1
OH
OH
OH
OH
OL
OL
V
V
OH
V
= 4.5 V
= 4.5 V
CC
CC
2.6*
2.6
0.4
0.8
0.65
0.8
V
V
V
OL
= 12 mA
0.8*
100
mV
hys
I
I
V
CC
= 0 to 5.5 V, V = V or GND
I CC
1
1
1
µA
V
V
= 0 to 2.1 V,
= 0.5 V to 2.7 V, OE = X
CC
O
50
50
50
µA
µA
µA
I
OZPU
OZPD
OZH
V
V
= 2.1 V to 0,
= 0.5 V to 2.7 V, OE = X
CC
O
50
10
50
10
50
10
I
I
V
V
= 2.1 V to 5.5 V,
= 2.7 V, OE ≥ 2 V
CC
O
V
V
= 2.1 V to 5.5 V,
= 0.5 V, OE ≥ 2 V
CC
O
I
I
I
I
−10
100
50
−10
−10
100
50
µA
µA
µA
mA
OZL
V
CC
= 0, V or V ≤ 4.5 V
off
I
O
V
V
= 5.5 V,
= 5.5 V
CC
O
Outputs high
50
CEX
O
V
CC
= 5.5 V,
V
= 2.5 V
−25
−55 −100
−25
−100
2
−25
−100
2
O
Outputs high
Outputs low
2
30
2
V
I
= 5.5 V,
= 0,
CC
O
‡
30
2
30
2
I
mA
CC
V = V
I
or GND
CC
Outputs disabled
V
= 5.5 V,
CC
Outputs enabled
Outputs disabled
50
50
50
50
50
50
50
50
50
One input at 3.4 V,
Other inputs at
Data inputs
§
µA
∆I
CC
V
CC
or GND
V
CC
= 5.5 V, One input at 3.4 V,
or GND
Control inputs
Other inputs at V
CC
C
C
V = 2.5 V or 0.5 V
3
8
pF
pF
i
I
V
O
= 2.5 V or 0.5 V
o
* On products compliant to MIL-PRF-38535, this parameter does not apply.
†
‡
§
All typical values are at V
= 5 V.
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
CC
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V
or GND.
CC
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢕ ꢍꢆ ꢖ ꢗ ꢌꢀꢆꢄꢆ ꢐ ꢘ ꢎꢆ ꢙꢎ ꢆ
SCBS238E − JUNE 1992 − REVISED JUNE 2004
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C = 50 pF (unless otherwise noted) (see Figure 1)
L
SN54ABT162244
= 5 V,
V
T
FROM
(INPUT)
TO
(OUTPUT)
CC
A
PARAMETER
UNIT
= 25°C
TYP
2.5
MIN
MAX
MIN
MAX
3.6
4.7
4.8
4.7
5.3
4.6
t
t
t
t
t
t
1
1
1
1
1
1
1
1
1
1
1
1
4.1
5.3
5.6
5.5
6.3
4.9
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
ns
ns
ns
3.1
3.2
OE
OE
3.2
3.2
3.1
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C = 50 pF (unless otherwise noted) (see Figure 1)
L
SN74ABT162244
= 5 V,
V
T
FROM
(INPUT)
TO
(OUTPUT)
CC
A
PARAMETER
UNIT
= 25°C
TYP
2.5
MIN
MAX
MIN
MAX
3.2
4
t
t
t
t
t
t
1
1
1
1
1
1
1
1
1
1
1
1
3.9
4.8
5.4
5.1
4.6
4.5
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
ns
ns
ns
3.1
3.2
4.2
4.1
4
OE
OE
3.2
3.2
3.1
3.9
5
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ꢇꢈ ꢌꢅꢍ ꢆ ꢅ ꢎ ꢏꢏ ꢐꢑ ꢀꢒ ꢓ ꢑꢍ ꢔ ꢐꢑ ꢀ
ꢕꢍ ꢆꢖ ꢗ ꢌꢀꢆꢄꢆ ꢐ ꢘꢎꢆ ꢙ ꢎꢆꢀ
SCBS238E − JUNE 1992 − REVISED JUNE 2004
PARAMETER MEASUREMENT INFORMATION
7 V
TEST
S1
Open
S1
500 Ω
From Output
Under Test
t
/t
PLH PHL
Open
7 V
GND
t
/t
PLZ PZL
C
= 50 pF
t
/t
Open
L
PHZ PZH
500 Ω
(see Note A)
3 V
0 V
LOAD CIRCUIT
Timing Input
Data Input
1.5 V
t
w
t
t
h
su
3 V
0 V
3 V
0 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
3 V
0 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
Input
t
PZL
t
t
t
PHL
PLH
PHL
t
PLZ
Output
Waveform 1
S1 at 7 V
3.5 V
V
V
OH
1.5 V
1.5 V
1.5 V
1.5 V
Output
V
V
+ 0.3 V
OL
V
OL
OL
(see Note B)
t
PHZ
t
PLH
t
PZH
Output
Waveform 2
S1 at Open
(see Note B)
V
OH
V
V
OH
− 0.3 V
OH
1.5 V
1.5 V
Output
≈0 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
28-Feb-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
5962-9458701QXA
ACTIVE
ACTIVE
CFP
WD
48
48
1
None
Call TI
Level-NC-NC-NC
SN74ABT162244DGGR
TSSOP
DGG
2000
Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
SN74ABT162244DGVR
ACTIVE
TVSOP
DGV
48
2000
Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
SN74ABT162244DL
SN74ABT162244DLR
SNJ54ABT162244WD
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
CFP
DL
DL
48
48
48
25
1000
1
None
None
None
CU NIPDAU Level-1-235C-UNLIM
CU NIPDAU Level-1-235C-UNLIM
WD
Call TI
Level-NC-NC-NC
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997
WD (R-GDFP-F**)
CERAMIC DUAL FLATPACK
48 LEADS SHOWN
0.120 (3,05)
0.075 (1,91)
0.009 (0,23)
0.004 (0,10)
1.130 (28,70)
0.870 (22,10)
0.370 (9,40)
0.250 (6,35)
0.390 (9,91)
0.370 (9,40)
0.370 (9,40)
0.250 (6,35)
1
48
0.025 (0,635)
A
0.014 (0,36)
0.008 (0,20)
24
25
NO. OF
LEADS**
48
56
0.740
0.640
(16,26) (18,80)
A MAX
A MIN
0.610 0.710
(15,49) (18,03)
4040176/D 10/97
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only
E. Falls within MIL STD 1835: GDFP1-F48 and JEDEC MO-146AA
GDFP1-F56 and JEDEC MO-146AB
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
48
0.0135 (0,343)
0.008 (0,203)
0.005 (0,13)
M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
0°–ā8°
1
24
0.040 (1,02)
0.020 (0,51)
A
Seating Plane
0.004 (0,10)
0.008 (0,20) MIN
PINS **
0.110 (2,79) MAX
28
48
0.630
56
DIM
0.380
(9,65)
0.730
A MAX
A MIN
(16,00) (18,54)
0.370
(9,40)
0.620
0.720
(15,75) (18,29)
4040048/E 12/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MO-118
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
M
0,08
0,50
48
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
0,25
1
24
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
48
56
64
DIM
A MAX
12,60
12,40
14,10
13,90
17,10
16,90
A MIN
4040078/F 12/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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