SN54ABT2827 [TI]

10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS; 10位缓冲器/驱动器,具有三态输出
SN54ABT2827
型号: SN54ABT2827
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
10位缓冲器/驱动器,具有三态输出

驱动器 输出元件
文件: 总6页 (文件大小:107K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN54ABT2827, SN74ABT2827  
10-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS648A – DECEMBER 1995 – REVISED JANUARY 1997  
SN54ABT2827 . . . JT PACKAGE  
SN74ABT2827 . . . DW OR NT PACKAGE  
(TOP VIEW)  
Output Ports Have Equivalent 25-Series  
Resistors, So No External Resistors Are  
Required  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
OE1  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
1
2
3
4
5
6
7
8
9
24  
V
CC  
23 Y1  
22 Y2  
21 Y3  
20 Y4  
19 Y5  
18 Y6  
17 Y7  
16 Y8  
15 Y9  
14 Y10  
13 OE2  
Flow-Through Architecture Optimizes  
PCB Layout  
Latch-Up Performance Exceeds 500 mA  
Per JEDEC Standard JESD-17  
Typical V  
(Output Ground Bounce) < 1 V  
OLP  
at V  
= 5 V, T = 25°C  
CC  
A
Package Options Include Plastic  
Small-Outline (DW) Package, Ceramic  
Chip Carriers (FK), and Plastic (NT) and  
Ceramic (JT) DIPs  
A9 10  
A10 11  
GND 12  
description  
SN54ABT2827 . . . FK PACKAGE  
(TOP VIEW)  
These 10-bit buffers or bus drivers provide a  
high-performance bus interface for wide data  
paths or buses carrying parity.  
4
3
2
1
28 27 26  
25  
The 3-state control gate is a 2-input AND gate with  
active-low inputs so that if either output-enable  
(OE1 or OE2) input is high, all ten outputs are in  
the high-impedance state. The ’ABT2827 provide  
true data at their outputs.  
5
6
7
8
9
A3  
A4  
A5  
NC  
A6  
Y3  
Y4  
Y5  
NC  
Y6  
24  
23  
22  
21  
A7 10  
A8 11  
20 Y7  
19 Y8  
To ensure the high-impedance state during power  
up or power down, OE should be tied to V  
CC  
12 13 14 15 16 17 18  
through a pullup resistor; the minimum value of  
the resistor is determined by the current-sinking  
capability of the driver.  
NC – No internal connection  
The outputs, which are designed to source or sink  
up to 12 mA, include equivalent 25-series  
resistors to reduce overshoot and undershoot.  
The SN54ABT2827 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74ABT2827 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABT2827, SN74ABT2827  
10-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS648A – DECEMBER 1995 – REVISED JANUARY 1997  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
OE1  
L
OE2  
L
A
L
L
H
Z
Z
L
L
H
X
X
H
X
X
H
logic diagram (positive logic)  
logic symbol  
1
1
&
OE1  
OE1  
OE2  
13  
EN  
13  
OE2  
2
23  
2
23  
Y1  
A1  
1
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
A9  
A10  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Y7  
Y8  
Y9  
Y10  
3
22  
21  
20  
19  
18  
17  
16  
15  
14  
4
To Nine Other Channels  
5
6
7
8
9
10  
11  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Pin numbers shown are for the DW, JT, and NT packages.  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
I
Voltage range applied to any output in the high or power-off state, V  
. . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V  
O
Current into any output in the low state, I : SN54ABT2827 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA  
O
SN74ABT2827 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA  
IK  
OK  
I
Output clamp current, I  
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA  
O
Package thermal impedance, θ (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W  
JA  
NT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages,  
which use a trace length of zero.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABT2827, SN74ABT2827  
10-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS648A – DECEMBER 1995 – REVISED JANUARY 1997  
recommended operating conditions (see Note 3)  
SN54ABT2827 SN74ABT2827  
UNIT  
MIN  
4.5  
2
MAX  
MIN  
4.5  
2
MAX  
V
V
V
V
Supply voltage  
5.5  
5.5  
V
V
CC  
High-level input voltage  
Low-level input voltage  
Input voltage  
IH  
0.8  
0.8  
V
IL  
0
V
CC  
0
V
CC  
V
I
I
I
High-level output current  
Low-level output current  
Input transition rise or fall rate  
Operating free-air temperature  
–12  
12  
–12  
12  
5
mA  
mA  
ns/V  
°C  
OH  
OL  
t/v  
5
T
–55  
125  
–40  
85  
A
NOTE 3: Unused inputs must be held high or low to prevent them from floating.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
= 25°C  
SN54ABT2827 SN74ABT2827  
A
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN TYP  
MAX  
MIN  
MAX  
MIN  
MAX  
V
V
V
V
= 4.5 V,  
= 4.5 V,  
= 5 V,  
I = –18 mA  
–1.2  
–1.2  
–1.2  
V
IK  
CC  
CC  
CC  
I
I
I
I
I
I
= –1 mA  
= –1 mA  
= –3 mA  
= –12 mA  
= 12 mA  
2.5  
3
2.5  
3
2.5  
3
OH  
OH  
OH  
OH  
OL  
V
OH  
V
2.4  
2
2.4  
2
2.4  
2
V
= 4.5 V  
= 4.5 V  
CC  
CC  
V
V
V
0.8  
0.8  
0.8  
V
OL  
100  
mV  
µA  
µA  
µA  
µA  
µA  
mA  
µA  
mA  
µA  
mA  
hys  
I
I
I
I
I
I
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 0 to 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 0,  
V = V or GND  
I CC  
±1  
±1  
10  
±1  
I
10  
10  
V
V
= 2.7 V  
= 0.5 V  
OZH  
OZL  
off  
O
–10  
–10  
–10  
O
V or V 4.5 V  
±100  
±100  
I
O
= 5.5 V, V = 5.5 V  
O
Outputs high  
= 2.5 V  
50  
50  
50  
CEX  
§
–50 –225  
= 5.5 V,  
V
O
–50  
–140 –225  
–50 –225  
O
Outputs high  
80  
35  
80  
250  
250  
250  
V
I
= 5.5 V,  
= 0,  
CC  
O
40  
40  
40  
I
Outputs low  
CC  
V = V  
I
or GND  
CC  
Outputs disabled  
Outputs enabled  
250  
1.5  
50  
250  
1.5  
50  
250  
1.5  
50  
V
CC  
= 5.5 V,  
One input at 3.4 V,  
Outputs disabled  
Control inputs  
µA  
I  
CC  
Other inputs at  
1.5  
1.5  
1.5  
mA  
pF  
pF  
V
or GND  
CC  
V = 2.5 V or 0.5 V  
C
C
4
i
I
V
O
= 2.5 V or 0.5 V  
8.5  
o
§
All typical values are at V  
= 5 V, T = 25°C.  
A
CC  
This data sheet limit may vary among suppliers.  
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.  
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V or GND.  
CC  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABT2827, SN74ABT2827  
10-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS648A – DECEMBER 1995 – REVISED JANUARY 1997  
switching characteristics over recommended ranges of supply voltage and operating free-air  
temperature, C = 50 pF (unless otherwise noted) (see Figure 1)  
L
V
T
= 5 V,  
= 25°C  
CC  
A
SN54ABT2827 SN74ABT2827  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
1.1  
1.1  
1
TYP  
3.3  
2.7  
4
MAX  
5.1  
4.5  
5.9  
6.8  
6.7  
7.2  
MIN  
1.1  
1.1  
1
MAX  
5.6  
5.2  
6.8  
8
MIN  
1.1  
1.1  
1
MAX  
5.5  
5.1  
6.7  
7.8  
7.2  
7.5  
t
t
t
t
t
t
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
A
Y
Y
Y
ns  
ns  
ns  
OE  
OE  
1
4.2  
5.3  
4.8  
1
1
2
2
7.4  
8.5  
2
1.3  
1.3  
1.3  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ABT2827, SN74ABT2827  
10-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS648A – DECEMBER 1995 – REVISED JANUARY 1997  
PARAMETER MEASUREMENT INFORMATION  
7 V  
Open  
S1  
500 Ω  
From Output  
Under Test  
TEST  
S1  
GND  
t
t
/t  
Open  
7 V  
PLH PHL  
/t  
C
= 50 pF  
L
t
500 Ω  
PLZ PZL  
/t  
(see Note A)  
Open  
PHZ PZH  
LOAD CIRCUIT  
3 V  
0 V  
Timing Input  
Data Input  
1.5 V  
t
w
t
t
h
su  
3 V  
0 V  
3 V  
0 V  
Input  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
3 V  
0 V  
3 V  
0 V  
Input  
Output  
Control  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
t
PZL  
t
t
PHL  
PLH  
t
PLZ  
Output  
Waveform 1  
S1 at 7 V  
3.5 V  
V
V
OH  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
Output  
Output  
V
V
+ 0.3 V  
– 0.3 V  
OL  
V
OL  
OL  
(see Note B)  
t
PHZ  
t
PLH  
t
t
PZH  
PHL  
Output  
Waveform 2  
S1 at Open  
(see Note B)  
V
OH  
V
V
OH  
OH  
1.5 V  
1.5 V  
0 V  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 n  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1998, Texas Instruments Incorporated  

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