SN54AHC138WR
更新时间:2024-09-18 18:07:14
品牌:TI
描述:AHC SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP16, CERAMIC, FP-16
SN54AHC138WR 概述
AHC SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP16, CERAMIC, FP-16 解码器/驱动器
SN54AHC138WR 规格参数
生命周期: | Obsolete | 零件包装代码: | DFP |
包装说明: | DFP, | 针数: | 16 |
Reach Compliance Code: | unknown | ECCN代码: | EAR99 |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.39 |
其他特性: | 3 ENABLE INPUTS | 系列: | AHC |
JESD-30 代码: | R-GDFP-F16 | 长度: | 10.2 mm |
负载电容(CL): | 50 pF | 功能数量: | 1 |
端子数量: | 16 | 最高工作温度: | 125 °C |
最低工作温度: | -55 °C | 输出极性: | INVERTED |
封装主体材料: | CERAMIC, GLASS-SEALED | 封装代码: | DFP |
封装形状: | RECTANGULAR | 封装形式: | FLATPACK |
传播延迟(tpd): | 18 ns | 认证状态: | Not Qualified |
座面最大高度: | 2.03 mm | 最大供电电压 (Vsup): | 5.5 V |
最小供电电压 (Vsup): | 2 V | 标称供电电压 (Vsup): | 3.3 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | MILITARY | 端子形式: | FLAT |
端子节距: | 1.27 mm | 端子位置: | DUAL |
宽度: | 6.73 mm | Base Number Matches: | 1 |
SN54AHC138WR 数据手册
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PDF下载SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L − DECEMBER 1995 − REVISED JULY 2003
D
D
Operating Range 2-V to 5.5-V V
D
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
CC
Designed Specifically for High-Speed
Memory Decoders and Data-Transmission
Systems
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
D
Incorporate Three Enable Inputs to Simplify
Cascading and/or Data Reception
− 1000-V Charged-Device Model (C101)
SN54AHC138 . . . J OR W PACKAGE
SN74AHC138 . . . D, DB, DGV, N, NS,
OR PW PACKAGE
SN74AHC138 . . . RGY PACKAGE
(TOP VIEW)
SN54AHC138 . . . FK PACKAGE
(TOP VIEW)
(TOP VIEW)
1
16
A
B
C
VCC
15 Y0
1
2
3
4
5
6
7
8
16
3
2
1 20 19
18
Y1
C
G2A
NC
G2B
G1
4
5
6
7
8
B
C
G2A
G2B
G1
15
14
13
12
11
10
2
3
4
5
6
7
Y0
Y1
Y2
Y3
Y4
Y5
17 Y2
16
14
Y1
NC
Y3
Y4
13
12
11
10
9
G2A
G2B
G1
Y7
GND
Y2
Y3
Y4
Y5
Y6
15
14
9 10 11 12 13
Y7
8
9
NC − No internal connection
description/ordering information
The ’AHC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing
applications that require very short propagation-delay times. In high-performance memory systems, these
decoders can be used to minimize the effects of system decoding. When employed with high-speed memories
utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are
less than the typical access time of the memory. This means that the effective system delay introduced by the
decoders is negligible.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
QFN − RGY
PDIP − N
Tape and reel
Tube
SN74AHC138RGYR
SN74AHC138N
HA138
SN74AHC138N
Tube
SN74AHC138D
SOIC − D
AHC138
Tape and reel
SN74AHC138DR
−40°C to 85°C
SOP − NS
Tape and reel
Tape and reel
Tube
SN74AHC138NSR
SN74AHC138DBR
SN74AHC138PW
SN74AHC138PWR
SN74AHC138DGVR
SNJ54AHC138J
AHC138
HA138
SSOP − DB
TSSOP − PW
HA138
Tape and reel
Tape and reel
Tube
TVSOP − DGV
CDIP − J
HA138
SNJ54AHC138J
SNJ54AHC138W
SNJ54AHC138FK
CFP − W
Tube
SNJ54AHC138W
SNJ54AHC138FK
−55°C to 125°C
LCCC − FK
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L − DECEMBER 1995 − REVISED JULY 2003
description/ordering information (continued)
The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two
active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.
A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one
inverter. An enable input can be used as a data input for demultiplexing applications.
FUNCTION TABLE
ENABLE INPUTS
SELECT INPUTS
OUTPUTS
G1
G2A
H
X
X
L
G2B
C
X
X
X
L
B
X
X
X
L
A
X
X
X
L
Y0
H
H
H
L
Y1
H
H
H
H
L
Y2
H
H
H
H
H
L
Y3
H
H
H
H
H
H
L
Y4
H
H
H
H
H
H
H
L
Y5
H
H
H
H
H
H
H
H
L
Y6
H
H
H
H
H
H
H
H
H
L
Y7
H
H
H
H
H
H
H
H
H
H
L
X
X
L
X
H
X
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
H
L
H
H
H
H
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
L
H
L
H
H
H
L
H
H
H
H
L
H
H
logic diagram (positive logic)
15
Y0
1
A
14
13
12
11
Y1
Y2
Y3
Y4
2
3
Select
Inputs
B
C
Data
Outputs
10
9
Y5
Y6
Y7
4
5
6
7
G2A
G2B
Enable
Inputs
G1
Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, RGY, and W packages.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L − DECEMBER 1995 − REVISED JULY 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V + 0.5 V
O
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
IK
I
Output clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
OK
O
O
CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
O
O
CC
Continuous current through V or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 mA
CC
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
JA
(see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
(see Note 2): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
(see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
(see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
(see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
(see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.
recommended operating conditions (see Note 4)
SN54AHC138 SN74AHC138
UNIT
MIN
2
MAX
MIN
2
MAX
V
V
Supply voltage
5.5
5.5
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
1.5
2.1
3.85
1.5
2.1
3.85
= 3 V
High-level input voltage
V
V
IH
= 5.5 V
= 2 V
0.5
0.9
0.5
0.9
= 3 V
V
IL
Low-level input voltage
= 5.5 V
1.65
5.5
1.65
5.5
V
V
Input voltage
0
0
0
0
V
V
I
Output voltage
V
CC
V
CC
O
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
−50
−4
−8
50
4
−50
−4
−8
50
4
mA
= 3.3 V 0.3 V
= 5 V 0.5 V
= 2 V
I
High-level output current
Low-level output current
OH
mA
mA
= 3.3 V 0.3 V
= 5 V 0.5 V
= 3.3 V 0.3 V
= 5 V 0.5 V
I
OL
mA
8
8
100
20
125
100
20
85
Δt/Δv
Input transition rise or fall rate
Operating free-air temperature
ns/V
T
−55
−40
°C
A
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L − DECEMBER 1995 − REVISED JULY 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T = 25°C
SN54AHC138 SN74AHC138
A
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
1.9
TYP
2
MAX
MIN
1.9
MAX
MIN
1.9
MAX
2 V
3 V
2.9
3
2.9
2.9
I
= −50 mA
OH
4.5 V
3 V
4.4
4.5
4.4
4.4
V
V
V
OH
2.58
2.48
2.48
I
I
= −4 mA
= −8 mA
OH
4.5 V
2 V
3.94
3.8
3.8
OH
0.1
0.1
0.1
0.1
0.1
0.5
0.1
0.1
3 V
I
OL
= 50 mA
4.5 V
3 V
0.1
0.1
V
OL
0.36
0.44
I
I
= 4 mA
= 8 mA
OL
4.5 V
0 V to 5.5 V
5.5 V
0.36
0.1
4
0.5
1*
0.44
1
OL
I
I
V = 5.5 V or GND
mA
mA
pF
I
I
V = V or GND,
I = 0
O
40
40
10
CC
I
CC
C
V = V or GND
5 V
2
10
i
I
CC
* On products compliant to MIL-PRF-38535, this parameter is not production tested at V = 0 V.
CC
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
T = 25°C
A
SN54AHC138 SN74AHC138
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
ns
MIN
TYP
MAX
MIN
1**
1**
1**
1**
MAX
13**
13**
15**
15**
MIN
1
MAX
13
t
t
t
t
t
t
t
t
t
t
t
t
8.2** 11.4**
8.2** 11.4**
8.1** 12.8**
8.1** 12.8**
8.2** 11.4**
8.2** 11.4**
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
A, B, C
G1
Any Y
Any Y
Any Y
Any Y
Any Y
Any Y
C = 15 pF
L
1
13
1
15
C = 15 pF
L
ns
1
15
1** 13.5**
1** 13.5**
1
13.5
13.5
18
C = 15 pF
L
ns
G2A, G2B
A, B, C
G1
1
10
10
15.8
15.8
16.3
16.3
14.9
14.9
1
1
1
1
1
1
18
18
1
C = 50 pF
L
ns
1
18
10.6
10.6
10.7
10.7
18.5
18.5
17
1
18.5
18.5
17
C = 50 pF
L
ns
1
1
C = 50 pF
L
ns
G2A, G2B
17
1
17
** On products compliant to MIL-PRF-38535, this parameter is not production tested.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L − DECEMBER 1995 − REVISED JULY 2003
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
5.7*
5.7*
5.6*
5.6*
5.8*
5.8*
7.2
SN54AHC138 SN74AHC138
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
ns
MIN
MAX
8.1*
8.1*
8.1*
8.1*
8.1*
8.1*
10.1
10.1
10.1
10.1
10.1
10.1
MIN
1*
1*
1*
1*
1*
1*
1
MAX
9.5*
9.5*
9.5*
9.5*
9.5*
9.5*
11.5
11.5
11.5
11.5
11.5
11.5
MIN
1
MAX
9.5
t
t
t
t
t
t
t
t
t
t
t
t
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
A, B, C
G1
Any Y
Any Y
Any Y
Any Y
Any Y
Any Y
C = 15 pF
L
1
9.5
1
9.5
C = 15 pF
L
ns
1
9.5
1
9.5
C = 15 pF
L
ns
G2A, G2B
A, B, C
G1
1
9.5
1
11.5
11.5
11.5
11.5
11.5
11.5
C = 50 pF
L
ns
7.2
1
1
7.1
1
1
C = 50 pF
L
ns
7.1
1
1
7.3
1
1
C = 50 pF
L
ns
G2A, G2B
7.3
1
1
*
On products compliant to MIL-PRF-38535, this parameter is not production tested.
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
No load, f = 1 MHz
TYP
UNIT
C
Power dissipation capacitance
13
pF
pd
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L − DECEMBER 1995 − REVISED JULY 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
S1
Open
GND
R = 1 kΩ
L
TEST
/t
S1
From Output
Under Test
Test
Point
From Output
Under Test
t
t
Open
PLH PHL
t
C
C
L
/t
V
CC
L
PLZ PZL
(see Note A)
(see Note A)
/t
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
V
CC
50% V
Timing Input
CC
0 V
t
w
t
h
t
su
V
CC
V
CC
50% V
50% V
CC
Input
CC
50% V
50% V
CC
Data Input
CC
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
CC
CC
Output
Control
50% V
50% V
50% V
50% V
CC
Input
CC
CC
CC
0 V
0 V
t
t
t
t
t
PZL
PLZ
PLH
PHL
Output
Waveform 1
V
≈V
OH
CC
In-Phase
Output
50% V
50% V
CC
50% V
CC
CC
S1 at V
CC
V
+ 0.3 V
OL
V
OL
V
OL
(see Note B)
t
t
t
PHL
PLH
PZH
PHZ
Output
Waveform 2
S1 at GND
V
V
OH
OH
Out-of-Phase
Output
V
OH
− 0.3 V
50% V
50% V
50% V
CC
CC
CC
≈0 V
V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L − DECEMBER 1995 − REVISED JULY 2003
APPLICATION INFORMATION
SN74AHC138
BIN/OCT
15
14
13
12
11
10
9
1
2
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
1
2
3
4
6
4
5
&
V
CC
EN
7
SN74AHC138
BIN/OCT
15
14
13
12
11
10
9
1
2
0
1
2
3
4
5
6
7
8
A0
A1
A2
1
2
9
10
11
12
13
14
15
3
4
6
4
5
&
A3
A4
EN
7
SN74AHC138
BIN/OCT
15
14
13
12
11
10
9
1
2
0
1
2
3
4
5
6
7
16
17
18
19
20
21
22
23
1
2
3
4
6
4
5
&
EN
7
Figure 2. 24-Bit Decoding Scheme
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L − DECEMBER 1995 − REVISED JULY 2003
APPLICATION INFORMATION
SN74AHC138
BIN/OCT
15
14
13
12
11
10
9
1
2
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
A0
A1
A2
1
2
3
4
6
4
5
&
V
CC
A3
EN
A4
7
SN74AHC138
BIN/OCT
15
14
13
12
11
10
9
1
2
0
1
2
3
4
5
6
7
8
1
2
9
10
11
12
13
14
15
3
4
6
4
5
&
EN
7
SN74AHC138
BIN/OCT
15
14
13
12
11
10
9
1
2
0
1
2
3
4
5
6
7
16
17
18
19
20
21
22
23
1
2
3
4
6
4
5
&
EN
7
SN74AHC138
BIN/OCT
15
14
13
12
11
10
9
1
2
0
1
2
3
4
5
6
7
24
25
26
27
28
29
30
31
1
2
3
4
6
4
5
&
EN
7
Figure 3. 32-Bit Decoding Scheme
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-9851601Q2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
9851601Q2A
SNJ54AHC
138FK
5962-9851601QEA
5962-9851601QFA
SN74AHC138D
ACTIVE
ACTIVE
ACTIVE
CDIP
CFP
J
16
16
16
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
-55 to 125
-55 to 125
-40 to 85
5962-9851601QE
A
SNJ54AHC138J
W
D
5962-9851601QF
A
SNJ54AHC138W
SOIC
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
AHC138
SN74AHC138DBLE
SN74AHC138DBR
OBSOLETE
ACTIVE
SSOP
SSOP
DB
DB
16
16
TBD
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
2000
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
HA138
SN74AHC138DBRE4
SN74AHC138DBRG4
SN74AHC138DE4
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
SOIC
DB
DB
D
16
16
16
16
16
16
16
16
16
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
HA138
Green (RoHS
& no Sb/Br)
HA138
Green (RoHS
& no Sb/Br)
AHC138
AHC138
HA138
SN74AHC138DG4
SOIC
D
40
Green (RoHS
& no Sb/Br)
SN74AHC138DGVR
SN74AHC138DGVRE4
SN74AHC138DGVRG4
SN74AHC138DR
TVSOP
TVSOP
TVSOP
SOIC
DGV
DGV
DGV
D
2000
2000
2000
2500
2500
2500
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
HA138
Green (RoHS
& no Sb/Br)
HA138
Green (RoHS
& no Sb/Br)
AHC138
AHC138
AHC138
SN74AHC138DRE4
SN74AHC138DRG4
SOIC
D
Green (RoHS
& no Sb/Br)
SOIC
D
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
SN74AHC138N
SN74AHC138NE4
SN74AHC138NSR
SN74AHC138NSRE4
SN74AHC138NSRG4
SN74AHC138PW
ACTIVE
PDIP
PDIP
SO
N
16
16
16
16
16
16
16
16
25
Pb-Free
(RoHS)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
N / A for Pkg Type
SN74AHC138N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
N
25
2000
2000
2000
90
Pb-Free
(RoHS)
N / A for Pkg Type
SN74AHC138N
AHC138
AHC138
AHC138
HA138
NS
NS
NS
PW
PW
PW
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
SO
Green (RoHS
& no Sb/Br)
SO
Green (RoHS
& no Sb/Br)
TSSOP
TSSOP
TSSOP
Green (RoHS
& no Sb/Br)
SN74AHC138PWE4
SN74AHC138PWG4
90
Green (RoHS
& no Sb/Br)
HA138
90
Green (RoHS
& no Sb/Br)
HA138
SN74AHC138PWLE
SN74AHC138PWR
OBSOLETE
ACTIVE
TSSOP
TSSOP
PW
PW
16
16
TBD
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
2000
3000
3000
1
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
HA138
HA138
HA138
HA138
HA138
SN74AHC138PWRE4
SN74AHC138PWRG4
SN74AHC138RGYR
SN74AHC138RGYRG4
SNJ54AHC138FK
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
VQFN
VQFN
LCCC
PW
PW
16
16
16
16
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
POST-PLATE
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
N / A for Pkg Type
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-55 to 125
Green (RoHS
& no Sb/Br)
RGY
RGY
FK
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TBD
5962-
9851601Q2A
SNJ54AHC
138FK
SNJ54AHC138J
SNJ54AHC138W
ACTIVE
ACTIVE
CDIP
CFP
J
16
16
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
5962-9851601QE
A
SNJ54AHC138J
W
5962-9851601QF
A
SNJ54AHC138W
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54AHC138, SN74AHC138 :
Catalog: SN74AHC138
•
Military: SN54AHC138
•
NOTE: Qualified Version Definitions:
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Catalog - TI's standard catalog product
•
•
Military - QML certified for Military and Defense Applications
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74AHC138DBR
SN74AHC138DGVR
SN74AHC138DR
SSOP
TVSOP
SOIC
DB
DGV
D
16
16
16
16
16
2000
2000
2500
2000
3000
330.0
330.0
330.0
330.0
330.0
16.4
12.4
16.4
12.4
12.4
8.2
6.8
6.5
6.9
3.8
6.6
4.0
2.5
1.6
2.1
1.6
1.5
12.0
8.0
8.0
8.0
8.0
16.0
12.0
16.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
10.3
5.6
SN74AHC138PWR
SN74AHC138RGYR
TSSOP
VQFN
PW
RGY
4.3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74AHC138DBR
SN74AHC138DGVR
SN74AHC138DR
SSOP
TVSOP
SOIC
DB
DGV
D
16
16
16
16
16
2000
2000
2500
2000
3000
367.0
367.0
333.2
367.0
367.0
367.0
367.0
345.9
367.0
367.0
38.0
35.0
28.6
35.0
35.0
SN74AHC138PWR
SN74AHC138RGYR
TSSOP
VQFN
PW
RGY
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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SN54AHC138WR 相关器件
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SN54AHC139 | TI | DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS | 获取价格 | |
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