SN54AHC373WR [TI]
AHC SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDFP20, CERAMIC, FP-20;
| 型号： | SN54AHC373WR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | AHC SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDFP20, CERAMIC, FP-20 驱动 CD 输出元件 逻辑集成电路 |
| 文件： | 总22页 (文件大小：958K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54AHC373, SN74AHC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS235I – OCTOBER 1995 – REVISED JULY 2003
Operating Range 2-V to 5.5-V V
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
CC
Latch-Up Performance Exceeds 250 mA Per
JESD 17
– 1000-V Charged-Device Model (C101)
SN54AHC373 . . . J OR W PACKAGE
SN74AHC373 . . . DB, DGV, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54AHC373 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
3
2
1 20 19
18
2D
2Q
3Q
3D
4D
8D
7D
7Q
6Q
4
5
6
7
8
17
16
15
14 6D
9 10 11 12 13
GND
description/ordering information
The ’AHC373 devices are octal transparent D-type latches designed for 2-V to 5.5-V V
operation.
CC
When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs
are latched at the logic levels of the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
interface or pullup components.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP – N
Tube
SN74AHC373N
SN74AHC373N
Tube
SN74AHC373DW
SN74AHC373DWR
SN74AHC373NSR
SN74AHC373DBR
SN74AHC373PW
SN74AHC373PWR
SN74AHC373DGVR
SNJ54AHC373J
SOIC – DW
AHC373
Tape and reel
Tape and reel
Tape and reel
Tube
SOP – NS
AHC373
HA373
–40°C to 85°C
SSOP – DB
TSSOP – PW
HA373
Tape and reel
Tape and reel
Tube
TVSOP – DGV
CDIP – J
HA373
SNJ54AHC373J
SNJ54AHC373W
SNJ54AHC373FK
–55°C to 125°C
CFP – W
Tube
SNJ54AHC373W
SNJ54AHC373FK
LCCC – FK
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHC373, SN74AHC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS235I – OCTOBER 1995 – REVISED JULY 2003
description/ordering information (continued)
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup
CC
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
Q
OE
L
LE
H
H
L
D
H
L
H
L
L
L
X
X
Q
0
H
X
Z
logic diagram (positive logic)
1
OE
11
LE
C1
1D
2
1Q
3
1D
To Seven Other Channels
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
O
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA
IK
I
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through V
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA
JA
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHC373, SN74AHC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS235I – OCTOBER 1995 – REVISED JULY 2003
recommended operating conditions (see Note 3)
SN54AHC373 SN74AHC373
UNIT
MIN
MAX
MIN
MAX
V
V
Supply voltage
2
5.5
2
5.5
V
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
1.5
2.1
3.85
1.5
2.1
3.85
High-level input voltage
= 3 V
IH
= 5.5 V
= 2 V
0.5
0.9
0.5
0.9
V
IL
Low-level input voltage
= 3 V
V
= 5.5 V
1.65
5.5
1.65
5.5
V
V
Input voltage
0
0
0
0
V
V
I
Output voltage
V
V
CC
O
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
–50
–4
–8
50
4
–50
–4
–8
50
4
A
I
High-level output current
Low-level output current
= 3.3 V ± 0.3 V
= 5 V ± 0.5 V
= 2 V
OH
OL
mA
A
I
= 3.3 V ± 0.3 V
= 5 V ± 0.5 V
= 3.3 V ± 0.3 V
= 5 V ± 0.5 V
mA
8
8
100
20
125
100
20
85
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
T
–55
–40
°C
A
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54AHC373 SN74AHC373
A
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
TYP MAX
MIN
1.9
MAX
MIN
1.9
MAX
2 V
3 V
1.9
2.9
I
= –50
A
2.9
2.9
OH
4.5 V
3 V
4.4
4.4
4.4
V
V
OH
OL
2.58
3.94
2.48
3.8
2.48
3.8
I
I
= –4 mA
OH
4.5 V
2 V
= –8 mA
OH
0.1
0.1
0.1
0.1
0.1
0.5
0.5
±1*
±2.5
40
0.1
0.1
I
= 50
A
3 V
OL
4.5 V
3 V
0.1
0.1
V
V
0.36
0.36
±0.1
±0.25
4
0.44
0.44
±1
I
I
= 4 mA
= 8 mA
OL
4.5 V
0 V to 5.5 V
5.5 V
5.5 V
5 V
OL
I
I
I
V = 5.5 V or GND
A
A
I
I
V = V or V
,
IL
V
= V or GND
CC
±2.5
40
OZ
CC
I
IH
O
V = V
or GND,
or GND
I = 0
O
A
I
CC
CC
C
C
V = V
4
6
10
10
pF
pF
i
I
V
= V or GND
CC
5 V
o
O
* On products compliant to MIL-PRF-38535, this parameter is not production tested at V
= 0 V.
CC
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHC373, SN74AHC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS235I – OCTOBER 1995 – REVISED JULY 2003
timing requirements over recommended operating free-air temperature range, V
(unless otherwise noted) (see Figure 1)
= 3.3 V ± 0.3 V
CC
T
= 25°C
SN54AHC373 SN74AHC373
A
UNIT
MIN
5
MAX
MIN
5
MAX
MIN
5
MAX
t
w
t
su
t
h
Pulse duration, LE high
Setup time, data before LE↓
Hold time, data after LE↓
ns
ns
ns
4
4
4
1
1
1
timing requirements over recommended operating free-air temperature range, V
(unless otherwise noted) (see Figure 1)
= 5 V ± 0.5 V
CC
T
= 25°C
SN54AHC373 SN74AHC373
A
UNIT
MIN
5
MAX
MIN
5
MAX
MIN
5
MAX
t
w
t
su
t
h
Pulse duration, LE high
Setup time, data before LE↓
Hold time, data after LE↓
ns
ns
ns
4
4
4
1
1
1
switching characteristics over recommended operating free-air temperature range,
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
V
CC
T = 25°C
A
SN54AHC373 SN74AHC373
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
ns
MIN
TYP
MAX
MIN
MAX
MIN
1
MAX
13.5
13.5
13
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
7.3* 11.4*
7.3* 11.4*
1* 13.5*
1* 13.5*
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
sk(o)
D
Q
Q
Q
Q
Q
Q
Q
Q
C
C
C
C
C
C
C
= 15 pF
= 15 pF
= 15 pF
= 15 pF
= 50 pF
= 50 pF
= 50 pF
L
L
L
L
L
L
L
1
7*
7*
11*
11*
1*
1*
13*
13*
1
LE
ns
1
13
7.3* 11.4*
7.3* 11.4*
1* 13.5*
1* 13.5*
1
13.5
13.5
12
ns
OE
OE
D
1
7*
7*
10*
10*
1*
1*
1
12*
12*
17
1
ns
1
12
9.8
9.8
9.5
9.5
9.8
9.8
9.5
9.5
14.9
14.9
14.5
14.5
14.9
14.9
13.2
13.2
1.5**
1
17
ns
1
17
1
17
1
16.5
16.5
17
1
16.5
16.5
17
LE
OE
OE
ns
1
1
1
1
ns
1
17
1
17
1
15
1
15
C
C
= 50 pF
= 50 pF
ns
ns
L
L
1
15
1
15
1.5
On products compliant to MIL-PRF-38535, this parameter is not production tested.
On products compliant to MIL-PRF-38535, this parameter does not apply.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHC373, SN74AHC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS235I – OCTOBER 1995 – REVISED JULY 2003
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
5*
SN54AHC373 SN74AHC373
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
ns
MIN
MAX
7.2*
7.2*
7.2*
7.2*
8.1*
8.1*
7.2*
7.2*
9.2
MIN
1*
1*
1*
1*
1*
1*
1*
1*
1
MAX
8.5*
8.5*
8.5*
8.5*
9.5*
9.5*
8.5*
8.5*
10.5
10.5
10.5
10.5
11.5
11.5
10.5
10.5
MIN
1
MAX
8.5
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
sk(o)
D
Q
Q
Q
Q
Q
Q
Q
Q
C
C
C
C
C
C
C
= 15 pF
= 15 pF
= 15 pF
= 15 pF
= 50 pF
= 50 pF
= 50 pF
L
L
L
L
L
L
L
5*
1
8.5
4.9*
4.9*
5.5*
5.5*
5*
1
8.5
LE
ns
1
8.5
1
9.5
ns
OE
OE
D
1
9.5
1
8.5
ns
5*
1
8.5
6.5
6.5
6.4
6.4
7
1
10.5
10.5
10.5
10.5
11.5
11.5
10.5
10.5
1
ns
9.2
1
1
9.2
1
1
LE
ns
9.2
1
1
10.1
10.1
9.2
1
1
ns
OE
OE
7
1
1
6.5
6.5
1
1
C
C
= 50 pF
= 50 pF
ns
ns
L
L
9.2
1
1
1**
On products compliant to MIL-PRF-38535, this parameter is not production tested.
On products compliant to MIL-PRF-38535, this parameter does not apply.
noise characteristics, V
= 5 V, C = 50 pF, T = 25°C (see Note 4)
CC
L
A
SN74AHC373
PARAMETER
UNIT
MIN
MAX
0.8
V
V
V
V
V
Quiet output, maximum dynamic V
V
V
V
V
V
OL(P)
OL(V)
OH(V)
IH(D)
IL(D)
OL
Quiet output, minimum dynamic V
Quiet output, minimum dynamic V
High-level dynamic input voltage
Low-level dynamic input voltage
–0.8
OL
4.1
3.5
OH
1.5
NOTE 4: Characteristics are for surface-mount packages only.
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
Power dissipation capacitance
TEST CONDITIONS
No load, f = 1 MHz
TYP
UNIT
C
18
pF
pd
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHC373, SN74AHC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS235I – OCTOBER 1995 – REVISED JULY 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
Open
GND
S1
R
= 1 kΩ
L
TEST
S1
From Output
Under Test
Test
Point
From Output
Under Test
t
t
/t
Open
PLH PHL
/t
C
C
L
t
V
CC
L
PLZ PZL
/t
(see Note A)
(see Note A)
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
V
CC
50% V
CC
Timing Input
0 V
t
w
t
h
t
su
V
CC
V
CC
50% V
50% V
CC
Input
CC
50% V
50% V
CC
Data Input
CC
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
CC
CC
Output
Control
50% V
50% V
50% V
50% V
t
Input
CC
CC
CC
CC
0 V
0 V
t
t
t
t
PZL
PLZ
PLH
PHL
Output
Waveform 1
V
OH
≈V
CC
In-Phase
Output
50% V
50% V
CC
50% V
CC
CC
V
S1 at V
(see Note B)
V
OL
+ 0.3 V
CC
V
OL
OL
t
t
t
PHL
PLH
PZH
PHZ
Output
Waveform 2
S1 at GND
V
V
OH
OH
Out-of-Phase
Output
V
OH
– 0.3 V
50% V
50% V
50% V
CC
CC
CC
V
≈0 V
(see Note B)
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-9686601Q2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
9686601Q2A
SNJ54AHC
373FK
5962-9686601QRA
5962-9686601QSA
ACTIVE
ACTIVE
CDIP
CFP
J
20
20
1
1
TBD
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
5962-9686601QR
A
SNJ54AHC373J
W
Call TI
5962-9686601QS
A
SNJ54AHC373W
SN74AHC373DBLE
SN74AHC373DBR
OBSOLETE
ACTIVE
SSOP
SSOP
DB
DB
20
20
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
2000
2000
2000
2000
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
HA373
SN74AHC373DBRE4
SN74AHC373DBRG4
SN74AHC373DGVR
SN74AHC373DGVRE4
SN74AHC373DGVRG4
SN74AHC373DW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
TVSOP
TVSOP
TVSOP
SOIC
DB
DB
20
20
20
20
20
20
20
20
20
20
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
HA373
Green (RoHS
& no Sb/Br)
HA373
DGV
DGV
DGV
DW
DW
DW
DW
DW
DW
Green (RoHS
& no Sb/Br)
HA373
Green (RoHS
& no Sb/Br)
HA373
Green (RoHS
& no Sb/Br)
HA373
Green (RoHS
& no Sb/Br)
AHC373
AHC373
AHC373
AHC373
AHC373
AHC373
SN74AHC373DWE4
SN74AHC373DWG4
SN74AHC373DWR
SN74AHC373DWRE4
SN74AHC373DWRG4
SOIC
25
Green (RoHS
& no Sb/Br)
SOIC
25
Green (RoHS
& no Sb/Br)
SOIC
2000
2000
2000
Green (RoHS
& no Sb/Br)
SOIC
Green (RoHS
& no Sb/Br)
SOIC
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
SN74AHC373N
SN74AHC373NE4
SN74AHC373NSR
SN74AHC373NSRE4
SN74AHC373NSRG4
SN74AHC373PW
ACTIVE
PDIP
PDIP
SO
N
20
20
20
20
20
20
20
20
20
Pb-Free
(RoHS)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
N / A for Pkg Type
SN74AHC373N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
N
20
2000
2000
2000
70
Pb-Free
(RoHS)
N / A for Pkg Type
SN74AHC373N
AHC373
AHC373
AHC373
HA373
NS
NS
NS
PW
PW
PW
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
SO
Green (RoHS
& no Sb/Br)
SO
Green (RoHS
& no Sb/Br)
TSSOP
TSSOP
TSSOP
Green (RoHS
& no Sb/Br)
SN74AHC373PWE4
SN74AHC373PWG4
70
Green (RoHS
& no Sb/Br)
HA373
70
Green (RoHS
& no Sb/Br)
HA373
SN74AHC373PWLE
SN74AHC373PWR
OBSOLETE
ACTIVE
TSSOP
TSSOP
PW
PW
20
20
TBD
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
2000
1
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
HA373
HA373
HA373
SN74AHC373PWRE4
SN74AHC373PWRG4
SNJ54AHC373FK
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
LCCC
PW
PW
FK
20
20
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
POST-PLATE
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
-40 to 85
-55 to 125
Green (RoHS
& no Sb/Br)
TBD
5962-
9686601Q2A
SNJ54AHC
373FK
SNJ54AHC373J
SNJ54AHC373W
ACTIVE
ACTIVE
CDIP
CFP
J
20
20
1
1
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
5962-9686601QR
A
SNJ54AHC373J
W
Call TI
5962-9686601QS
A
SNJ54AHC373W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54AHC373, SN74AHC373 :
Catalog: SN74AHC373
•
Military: SN54AHC373
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74AHC373DBR
SN74AHC373DGVR
SN74AHC373DWR
SN74AHC373NSR
SN74AHC373PWR
SSOP
TVSOP
SOIC
DB
DGV
DW
NS
20
20
20
20
20
2000
2000
2000
2000
2000
330.0
330.0
330.0
330.0
330.0
16.4
12.4
24.4
24.4
16.4
8.2
6.9
7.5
5.6
2.5
1.6
2.7
2.5
1.6
12.0
8.0
16.0
12.0
24.0
24.0
16.0
Q1
Q1
Q1
Q1
Q1
10.8
8.2
13.0
13.0
7.1
12.0
12.0
8.0
SO
TSSOP
PW
6.95
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74AHC373DBR
SN74AHC373DGVR
SN74AHC373DWR
SN74AHC373NSR
SN74AHC373PWR
SSOP
TVSOP
SOIC
DB
DGV
DW
NS
20
20
20
20
20
2000
2000
2000
2000
2000
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
38.0
35.0
45.0
45.0
38.0
SO
TSSOP
PW
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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