SN54AHC573FKR [TI]

AHC SERIES, 8-BIT DRIVER, TRUE OUTPUT, CQCC20, CERAMIC, LCC-20;
SN54AHC573FKR
型号: SN54AHC573FKR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

AHC SERIES, 8-BIT DRIVER, TRUE OUTPUT, CQCC20, CERAMIC, LCC-20

驱动 输出元件 逻辑集成电路
文件: 总24页 (文件大小:1212K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢊ ꢆꢋꢄꢌ ꢋ ꢍꢄꢁꢀ ꢎꢄꢍꢏ ꢁꢋ ꢐꢑꢋ ꢒꢎ ꢏ ꢌꢄꢋꢆ ꢅ ꢏ  
SCLS242K − OCTOBER 1995 − REVISED JANUARY 2004  
SN54AHC573 . . . J OR W PACKAGE  
SN74AHC573 . . . DB, DGV, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
D
Operating Range 2-V to 5.5-V V  
CC  
3-State Outputs Directly Drive Bus Lines  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
14  
13  
12  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
description/ordering information  
The ’AHC573 devices are octal transparent  
D-type latches designed for 2-V to 5.5-V V  
operation.  
CC  
When the latch-enable (LE) input is high, the  
Q outputs follow the data (D) inputs. When LE is  
low, the Q outputs are latched at the logic levels  
of the D inputs.  
GND 10  
11 LE  
SN54AHC573 . . . FK PACKAGE  
(TOP VIEW)  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low) or the high-impedance state. In  
the high-impedance state, the outputs neither  
load nor drive the bus lines significantly. The  
high-impedance state and increased drive  
provide the capability to drive bus lines without  
interface or pullup components.  
3
2
1 20 19  
18  
2Q  
3Q  
4Q  
5Q  
6Q  
3D  
4D  
5D  
6D  
7D  
4
5
6
7
8
17  
16  
15  
14  
OE does not affect the internal operations of the  
latches. Old data can be retained or new data can  
be entered while the outputs are in the  
high-impedance state.  
9 10 11 12 13  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CC  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
Tube  
SN74AHC573N  
SN74AHC573N  
Tube  
SN74AHC573DW  
SN74AHC573DWR  
SN74AHC573NSR  
SN74AHC573DBR  
SN74AHC573PW  
SN74AHC573PWR  
SN74AHC573DGVR  
SNJ54AHC573J  
SOIC − DW  
AHC573  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SOP − NS  
AHC573  
HA573  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
HA573  
Tape and reel  
Tape and reel  
Tube  
TVSOP − DGV  
CDIP − J  
HA573  
SNJ54AHC573J  
SNJ54AHC573W  
SNJ54AHC573FK  
CFP − W  
Tube  
SNJ54AHC573W  
SNJ54AHC573FK  
−55°C to 125°C  
LCCC − FK  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2004, Texas Instruments Incorporated  
ꢊ ꢗ ꢢ ꢚ ꢙꢥ ꢠꢟ ꢝꢞ ꢟꢙ ꢛꢢ ꢤꢖ ꢜꢗ ꢝ ꢝꢙ ꢬꢔ ꢌꢑ ꢎꢍ ꢭ ꢑꢈꢮꢂ ꢈꢂꢉ ꢜꢤꢤ ꢢꢜ ꢚ ꢜ ꢛꢡ ꢝꢡꢚ ꢞ ꢜ ꢚ ꢡ ꢝꢡ ꢞꢝꢡ ꢥ  
ꢝ ꢡ ꢞ ꢝꢖ ꢗꢫ ꢙꢘ ꢜ ꢤꢤ ꢢꢜ ꢚ ꢜ ꢛ ꢡ ꢝ ꢡ ꢚ ꢞ ꢦ  
ꢠ ꢗꢤ ꢡꢞꢞ ꢙ ꢝꢧꢡ ꢚ ꢩꢖ ꢞꢡ ꢗ ꢙꢝꢡ ꢥꢦ ꢊ ꢗ ꢜꢤ ꢤ ꢙ ꢝꢧꢡ ꢚ ꢢꢚ ꢙ ꢥꢠꢟ ꢝꢞ ꢉ ꢢꢚ ꢙ ꢥꢠꢟ ꢝꢖꢙ ꢗ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢂ ꢇ ꢈꢉ ꢀ ꢁꢇ ꢃ ꢄꢅꢆ ꢂ ꢇꢈ  
ꢊꢆ ꢋꢄ ꢌ ꢋ ꢍ ꢄꢁ ꢀꢎꢄꢍ ꢏꢁ ꢋ ꢐꢑꢋ ꢒ ꢎꢏ ꢌꢄꢋꢆ ꢅꢏꢀ  
ꢓꢔ ꢋ ꢅ ꢈ ꢑꢀꢋꢄꢋ ꢏ ꢊꢕꢋ ꢎ ꢕꢋꢀ  
SCLS242K − OCTOBER 1995 − REVISED JANUARY 2004  
FUNCTION TABLE  
(each latch)  
INPUTS  
OUTPUT  
Q
OE  
L
LE  
H
H
L
D
H
L
H
L
L
L
X
X
Q
0
H
X
Z
logic diagram (positive logic)  
1
OE  
11  
LE  
C1  
1D  
19  
1Q  
2
1D  
To Seven Other Channels  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
I
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V  
+ 0.5 V  
O
CC  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA  
IK  
I
Output clamp current, I  
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA  
Continuous current through V  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 mA  
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W  
JA  
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92°C/W  
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W  
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢊ ꢆꢋꢄꢌ ꢋ ꢍꢄꢁꢀ ꢎꢄꢍꢏ ꢁꢋ ꢐꢑꢋ ꢒꢎ ꢏ ꢌꢄꢋꢆ ꢅ ꢏ  
SCLS242K − OCTOBER 1995 − REVISED JANUARY 2004  
recommended operating conditions (see Note 3)  
SN54AHC573 SN74AHC573  
UNIT  
MIN  
2
MAX  
MIN  
2
MAX  
V
V
Supply voltage  
5.5  
5.5  
V
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
= 3 V  
1.5  
2.1  
3.85  
1.5  
2.1  
3.85  
High-level input voltage  
IH  
= 5.5 V  
= 2 V  
0.5  
0.9  
0.5  
0.9  
= 3 V  
V
IL  
Low-level input voltage  
V
= 5.5 V  
1.65  
5.5  
1.65  
5.5  
V
V
Input voltage  
0
0
0
0
V
V
I
Output voltage  
V
CC  
V
CC  
O
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
−50  
−4  
−8  
50  
4
−50  
−4  
−8  
50  
4
mA  
= 3.3 V 0.3 V  
= 5 V 0.5 V  
= 2 V  
I
High-level output current  
Low-level output current  
OH  
mA  
mA  
= 3.3 V 0.3 V  
= 5 V 0.5 V  
= 3.3 V 0.3 V  
= 5 V 0.5 V  
I
OL  
mA  
8
8
100  
20  
125  
100  
20  
85  
t/∆v  
Input transition rise or fall rate  
Operating free-air temperature  
ns/V  
T
−55  
−40  
°C  
A
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
A
= 25°C  
TYP  
2
SN54AHC573 SN74AHC573  
PARAMETER  
TEST CONDITIONS  
V
UNIT  
CC  
MIN  
1.9  
MAX  
MIN  
1.9  
MAX  
MIN  
1.9  
MAX  
2 V  
3 V  
2.9  
3
2.9  
2.9  
I
= −50 mA  
OH  
4.5 V  
3 V  
4.4  
4.5  
4.4  
4.4  
V
V
OH  
OL  
2.58  
2.48  
2.48  
I
I
= −4 mA  
= −8 mA  
OH  
4.5 V  
2 V  
3.94  
3.8  
3.8  
OH  
0.1  
0.1  
0.1  
0.1  
0.1  
0.5  
0.1  
0.1  
3 V  
I
= 50 mA  
OL  
4.5 V  
3 V  
0.1  
0.1  
V
V
0.36  
0.44  
I
I
= 4 mA  
= 8 mA  
OL  
4.5 V  
0 V to 5.5 V  
5.5 V  
0.36  
0.1  
0.25  
4
0.5  
1*  
0.44  
1
OL  
I
I
I
V = 5.5 V or GND  
mA  
mA  
mA  
pF  
pF  
I
I
V = V or V , V = V  
or GND  
I = 0  
O
2.5  
40  
2.5  
40  
10  
OZ  
CC  
I
IL  
IH  
O
CC  
V = V  
or GND,  
or GND  
5.5 V  
I
CC  
CC  
C
C
V = V  
5 V  
2.5  
3.5  
10  
i
I
V
= V  
O CC  
or GND  
5 V  
o
* On products compliant to MIL-PRF-38535, this parameter is not production tested at V  
= 0 V.  
CC  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢂ ꢇ ꢈꢉ ꢀ ꢁꢇ ꢃ ꢄꢅꢆ ꢂ ꢇꢈ  
ꢊꢆ ꢋꢄ ꢌ ꢋ ꢍ ꢄꢁ ꢀꢎꢄꢍ ꢏꢁ ꢋ ꢐꢑꢋ ꢒ ꢎꢏ ꢌꢄꢋꢆ ꢅꢏꢀ  
ꢓꢔ ꢋ ꢅ ꢈ ꢑꢀꢋꢄꢋ ꢏ ꢊꢕꢋ ꢎ ꢕꢋꢀ  
SCLS242K − OCTOBER 1995 − REVISED JANUARY 2004  
timing requirements over recommended operating free-air temperature range,  
= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)  
V
CC  
T
= 25°C  
SN54AHC573 SN74AHC573  
A
UNIT  
MIN  
5
MAX  
MIN  
5
MAX  
MIN  
5
MAX  
t
w
t
su  
t
h
Pulse duration, LE high  
Setup time, data before LE↓  
Hold time, data after LE↓  
ns  
ns  
ns  
3.5  
1.5  
3.5  
1.5  
3.5  
1.5  
timing requirements over recommended operating free-air temperature range,  
V
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)  
CC  
T
= 25°C  
SN54AHC573 SN74AHC573  
A
UNIT  
MIN  
5
MAX  
MIN  
5
MAX  
MIN  
5
MAX  
t
w
t
su  
t
h
Pulse duration, LE high  
Setup time, data before LE↓  
Hold time, data after LE↓  
ns  
ns  
ns  
3.5  
1.5  
3.5  
1.5  
3.5  
1.5  
switching characteristics over recommended operating free-air temperature range,  
V
= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)  
CC  
T
A
= 25°C  
TYP  
7*  
SN54AHC573 SN74AHC573  
FROM  
(INPUT)  
TO  
(OUTPUT)  
LOAD  
CAPACITANCE  
PARAMETER  
UNIT  
ns  
MIN  
MAX  
11*  
MIN  
1*  
MAX  
13*  
13*  
14*  
14*  
MIN  
1
MAX  
13  
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PLH  
PHL  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
PLH  
PHL  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
D
Q
Q
Q
Q
Q
Q
Q
Q
C
C
C
C
C
C
C
= 15 pF  
= 15 pF  
= 15 pF  
= 15 pF  
= 50 pF  
= 50 pF  
= 50 pF  
L
L
L
L
L
L
L
7*  
11*  
1*  
1
13  
7.6* 11.9*  
7.6* 11.9*  
7.3* 11.5*  
7.3* 11.5*  
1*  
1
14  
LE  
OE  
OE  
D
ns  
1*  
1
14  
1* 13.5*  
1* 13.5*  
1
13.5  
13.5  
13  
ns  
1
8.3*  
8.3*  
9.5  
11*  
11*  
1*  
1*  
1
13*  
13*  
1
ns  
1
13  
14.5  
14.5  
15.4  
15.4  
15  
16.5  
16.5  
17.5  
17.5  
17  
1
16.5  
16.5  
17.5  
17.5  
17  
ns  
9.5  
1
1
10.1  
10.1  
9.8  
1
1
LE  
OE  
OE  
ns  
1
1
1
1
ns  
9.8  
15  
1
17  
1
17  
10.7  
10.7  
14.5  
14.5  
1.5**  
1
16.5  
16.5  
1
16.5  
16.5  
1.5  
C
C
= 50 pF  
= 50 pF  
ns  
ns  
L
L
1
1
t
sk(o)  
∗∗  
On products compliant to MIL-PRF-38535, this parameter is not production tested.  
On products compliant to MIL-PRF-38535, this parameter does not apply.  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢊ ꢆꢋꢄꢌ ꢋ ꢍꢄꢁꢀ ꢎꢄꢍꢏ ꢁꢋ ꢐꢑꢋ ꢒꢎ ꢏ ꢌꢄꢋꢆ ꢅ ꢏ  
ꢓ ꢔꢋ ꢅ ꢈ ꢑꢀꢋꢄꢋ ꢏ ꢊ ꢕꢋ ꢎ ꢕꢋ  
SCLS242K − OCTOBER 1995 − REVISED JANUARY 2004  
switching characteristics over recommended operating free-air temperature range,  
V
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)  
CC  
T
A
= 25°C  
TYP  
4.5*  
4.5*  
5*  
SN54AHC573 SN74AHC573  
FROM  
(INPUT)  
TO  
(OUTPUT)  
LOAD  
CAPACITANCE  
PARAMETER  
UNIT  
ns  
MIN  
MAX  
6.8*  
6.8*  
7.7*  
7.7*  
7.7*  
7.7*  
7.7*  
7.7*  
8.8  
MIN  
1
MAX  
8*  
MIN  
1
MAX  
8
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PLH  
PHL  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
PLH  
PHL  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
D
Q
Q
Q
Q
Q
Q
Q
Q
C
C
C
C
C
C
C
= 15 pF  
= 15 pF  
= 15 pF  
= 15 pF  
= 50 pF  
= 50 pF  
= 50 pF  
L
L
L
L
L
L
L
1
8*  
1
8
1
9*  
1
9
LE  
OE  
OE  
D
ns  
5*  
1
9*  
1
9
5.2*  
5.2*  
5.2*  
5.2*  
6
1
9*  
1
9
ns  
1
9*  
1
9
1
9*  
1
9
ns  
1
9*  
1
9
1
10  
10  
11  
11  
11  
11  
11  
11  
1
10  
10  
11  
11  
11  
11  
11  
11  
1
ns  
6
8.8  
1
1
6.5  
6.5  
6.7  
6.7  
6.7  
6.7  
9.7  
1
1
LE  
OE  
OE  
ns  
9.7  
1
1
9.7  
1
1
ns  
9.7  
1
1
9.7  
1
1
C
C
= 50 pF  
= 50 pF  
ns  
ns  
L
L
9.7  
1
1
t
1**  
sk(o)  
∗∗  
On products compliant to MIL-PRF-38535, this parameter is not production tested.  
On products compliant to MIL-PRF-38535, this parameter does not apply.  
noise characteristics, V  
= 5 V, C = 50 pF, T = 25°C (see Note 4)  
CC  
L
A
SN74AHC573  
PARAMETER  
UNIT  
MIN  
MAX  
1
V
V
V
V
V
Quiet output, maximum dynamic V  
Quiet output, minimum dynamic V  
V
V
V
V
V
OL(P)  
OL(V)  
OH(V)  
IH(D)  
IL(D)  
OL  
−0.8  
OL  
Quiet output, minimum dynamic V  
High-level dynamic input voltage  
Low-level dynamic input voltage  
4
OH  
3.5  
1.5  
NOTE 4: Characteristics are for surface-mount packages only.  
operating characteristics, V  
= 5 V, T = 25°C  
A
CC  
PARAMETER  
TEST CONDITIONS  
No load, f = 1 MHz  
TYP  
UNIT  
C
Power dissipation capacitance  
16  
pF  
pd  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢂ ꢇ ꢈꢉ ꢀ ꢁꢇ ꢃ ꢄꢅꢆ ꢂ ꢇꢈ  
ꢊꢆ ꢋꢄ ꢌ ꢋ ꢍ ꢄꢁ ꢀꢎꢄꢍ ꢏꢁ ꢋ ꢐꢑꢋ ꢒ ꢎꢏ ꢌꢄꢋꢆ ꢅꢏꢀ  
ꢓꢔ ꢋ ꢅ ꢈ ꢑꢀꢋꢄꢋ ꢏ ꢊꢕꢋ ꢎ ꢕꢋꢀ  
SCLS242K − OCTOBER 1995 − REVISED JANUARY 2004  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
Open  
GND  
S1  
R
= 1 kΩ  
L
TEST  
S1  
From Output  
Under Test  
Test  
Point  
From Output  
Under Test  
t
t
/t  
Open  
PLH PHL  
/t  
C
C
L
t
V
CC  
L
PLZ PZL  
/t  
(see Note A)  
(see Note A)  
GND  
PHZ PZH  
Open Drain  
V
CC  
LOAD CIRCUIT FOR  
LOAD CIRCUIT FOR  
TOTEM-POLE OUTPUTS  
3-STATE AND OPEN-DRAIN OUTPUTS  
V
CC  
50% V  
CC  
Timing Input  
0 V  
t
w
t
h
t
su  
V
CC  
V
CC  
50% V  
CC  
50% V  
CC  
Input  
50% V  
CC  
50% V  
CC  
Data Input  
0 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
V
V
CC  
CC  
Output  
Control  
50% V  
CC  
50% V  
CC  
50% V  
CC  
50% V  
t
Input  
CC  
0 V  
0 V  
t
PZL  
t
t
t
PLZ  
PLH  
PHL  
Output  
Waveform 1  
V
OH  
V  
CC  
In-Phase  
Output  
50% V  
50% V  
CC  
50% V  
CC  
CC  
V
S1 at V  
(see Note B)  
V
OL  
+ 0.3 V  
CC  
V
OL  
OL  
t
t
t
PHL  
PLH  
PZH  
PHZ  
Output  
Waveform 2  
S1 at GND  
V
V
OH  
OH  
Out-of-Phase  
Output  
V
OH  
− 0.3 V  
50% V  
CC  
50% V  
50% V  
CC  
CC  
V
0 V  
(see Note B)  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. includes probe and jig capacitance.  
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z = 50 , t 3 ns, t 3 ns.  
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.  
E. All parameters and waveforms are not applicable to all devices.  
Figure 1. Load Circuit and Voltage Waveforms  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
5962-9685601Q2A  
ACTIVE  
LCCC  
FK  
20  
1
TBD  
POST-PLATE  
N / A for Pkg Type  
-55 to 125  
5962-  
9685601Q2A  
SNJ54AHC  
573FK  
5962-9685601QRA  
5962-9685601QSA  
ACTIVE  
ACTIVE  
CDIP  
CFP  
J
20  
20  
1
1
TBD  
TBD  
TBD  
A42  
N / A for Pkg Type  
N / A for Pkg Type  
-55 to 125  
-55 to 125  
5962-9685601QR  
A
SNJ54AHC573J  
W
Call TI  
5962-9685601QS  
A
SNJ54AHC573W  
SN74AHC573DBLE  
SN74AHC573DBR  
OBSOLETE  
ACTIVE  
SSOP  
SSOP  
DB  
DB  
20  
20  
Call TI  
Call TI  
-40 to 85  
-40 to 85  
2000  
2000  
2000  
2000  
2000  
2000  
25  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-1-260C-UNLIM  
HA573  
SN74AHC573DBRE4  
SN74AHC573DBRG4  
SN74AHC573DGVR  
SN74AHC573DGVRE4  
SN74AHC573DGVRG4  
SN74AHC573DW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SSOP  
SSOP  
TVSOP  
TVSOP  
TVSOP  
SOIC  
DB  
DB  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
HA573  
Green (RoHS  
& no Sb/Br)  
HA573  
DGV  
DGV  
DGV  
DW  
DW  
DW  
DW  
DW  
DW  
Green (RoHS  
& no Sb/Br)  
HA573  
Green (RoHS  
& no Sb/Br)  
HA573  
Green (RoHS  
& no Sb/Br)  
HA573  
Green (RoHS  
& no Sb/Br)  
AHC573  
AHC573  
AHC573  
AHC573  
AHC573  
AHC573  
SN74AHC573DWE4  
SN74AHC573DWG4  
SN74AHC573DWR  
SN74AHC573DWRE4  
SN74AHC573DWRG4  
SOIC  
25  
Green (RoHS  
& no Sb/Br)  
SOIC  
25  
Green (RoHS  
& no Sb/Br)  
SOIC  
2000  
2000  
2000  
Green (RoHS  
& no Sb/Br)  
SOIC  
Green (RoHS  
& no Sb/Br)  
SOIC  
Green (RoHS  
& no Sb/Br)  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
SN74AHC573N  
SN74AHC573NE4  
SN74AHC573NSR  
SN74AHC573NSRE4  
SN74AHC573NSRG4  
SN74AHC573PW  
ACTIVE  
PDIP  
PDIP  
SO  
N
20  
20  
20  
20  
20  
20  
20  
20  
20  
Pb-Free  
(RoHS)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
N / A for Pkg Type  
SN74AHC573N  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
N
20  
2000  
2000  
2000  
70  
Pb-Free  
(RoHS)  
N / A for Pkg Type  
SN74AHC573N  
AHC573  
AHC573  
AHC573  
HA573  
NS  
NS  
NS  
PW  
PW  
PW  
Green (RoHS  
& no Sb/Br)  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
SO  
Green (RoHS  
& no Sb/Br)  
SO  
Green (RoHS  
& no Sb/Br)  
TSSOP  
TSSOP  
TSSOP  
Green (RoHS  
& no Sb/Br)  
SN74AHC573PWE4  
SN74AHC573PWG4  
70  
Green (RoHS  
& no Sb/Br)  
HA573  
70  
Green (RoHS  
& no Sb/Br)  
HA573  
SN74AHC573PWLE  
SN74AHC573PWR  
OBSOLETE  
ACTIVE  
TSSOP  
TSSOP  
PW  
PW  
20  
20  
TBD  
Call TI  
Call TI  
-40 to 85  
-40 to 85  
2000  
2000  
2000  
1
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-1-260C-UNLIM  
HA573  
HA573  
HA573  
SN74AHC573PWRE4  
SN74AHC573PWRG4  
SNJ54AHC573FK  
ACTIVE  
ACTIVE  
ACTIVE  
TSSOP  
TSSOP  
LCCC  
PW  
PW  
FK  
20  
20  
20  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
POST-PLATE  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
N / A for Pkg Type  
-40 to 85  
-40 to 85  
-55 to 125  
Green (RoHS  
& no Sb/Br)  
TBD  
5962-  
9685601Q2A  
SNJ54AHC  
573FK  
SNJ54AHC573J  
SNJ54AHC573W  
ACTIVE  
ACTIVE  
CDIP  
CFP  
J
20  
20  
1
1
TBD  
TBD  
A42  
N / A for Pkg Type  
N / A for Pkg Type  
-55 to 125  
-55 to 125  
5962-9685601QR  
A
SNJ54AHC573J  
W
Call TI  
5962-9685601QS  
A
SNJ54AHC573W  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF SN54AHC573, SN74AHC573 :  
Catalog: SN74AHC573  
Automotive: SN74AHC573-Q1, SN74AHC573-Q1  
Military: SN54AHC573  
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
Addendum-Page 3  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects  
Military - QML certified for Military and Defense Applications  
Addendum-Page 4  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
26-Jan-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
SN74AHC573DBR  
SN74AHC573DGVR  
SN74AHC573DWR  
SN74AHC573NSR  
SN74AHC573PWR  
SN74AHC573PWR  
SN74AHC573PWRG4  
SSOP  
TVSOP  
SOIC  
DB  
DGV  
DW  
NS  
20  
20  
20  
20  
20  
20  
20  
2000  
2000  
2000  
2000  
2000  
2000  
2000  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
16.4  
12.4  
24.4  
24.4  
16.4  
16.4  
16.4  
8.2  
6.9  
7.5  
5.6  
2.5  
1.6  
2.7  
2.5  
1.6  
1.6  
1.6  
12.0  
8.0  
16.0  
12.0  
24.0  
24.0  
16.0  
16.0  
16.0  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
10.8  
8.2  
13.0  
13.0  
7.1  
12.0  
12.0  
8.0  
SO  
TSSOP  
TSSOP  
TSSOP  
PW  
PW  
PW  
6.95  
6.95  
6.95  
7.1  
8.0  
7.1  
8.0  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
26-Jan-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN74AHC573DBR  
SN74AHC573DGVR  
SN74AHC573DWR  
SN74AHC573NSR  
SN74AHC573PWR  
SN74AHC573PWR  
SN74AHC573PWRG4  
SSOP  
TVSOP  
SOIC  
DB  
DGV  
DW  
NS  
20  
20  
20  
20  
20  
20  
20  
2000  
2000  
2000  
2000  
2000  
2000  
2000  
367.0  
367.0  
367.0  
367.0  
367.0  
364.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
364.0  
367.0  
38.0  
35.0  
45.0  
45.0  
38.0  
27.0  
38.0  
SO  
TSSOP  
TSSOP  
TSSOP  
PW  
PW  
PW  
Pack Materials-Page 2  
MECHANICAL DATA  
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000  
DGV (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
24 PINS SHOWN  
0,23  
0,13  
M
0,07  
0,40  
24  
13  
0,16 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
0°ā8°  
0,75  
1
12  
0,50  
A
Seating Plane  
0,08  
0,15  
0,05  
1,20 MAX  
PINS **  
14  
16  
20  
24  
38  
48  
56  
DIM  
A MAX  
A MIN  
3,70  
3,50  
3,70  
3,50  
5,10  
4,90  
5,10  
4,90  
7,90  
7,70  
9,80  
9,60  
11,40  
11,20  
4073251/E 08/00  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.  
D. Falls within JEDEC: 24/48 Pins – MO-153  
14/16/20/56 Pins – MO-194  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
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