SN54ALS576BJ [TI]
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS; 八D型边沿触发触发器具有三态输出
| 型号： | SN54ALS576BJ |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS |
| 文件： | 总18页 (文件大小：623K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995
SN54ALS576B, SN54AS576 . . . J OR W PACKAGE
SN74ALS576B, SN74AS576 . . . DW OR N PACKAGE
(TOP VIEW)
• 3-State Buffer-Type Inverting Outputs Drive
Bus Lines Directly
• Bus-Structured Pinout
• Buffered Control Inputs
• SN74ALS577A Has Synchronous Clear
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), Standard Plastic (N, NT)
and Ceramic (J) 300-mil DIPs, and Ceramic
Flat (W) Packages
OE
1D
2D
3D
4D
5D
6D
7D
8D
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
1Q
2Q
3Q
4Q
5Q
6Q
13 7Q
12 8Q
description
11
GND
CLK
These octal D-type edge-triggered flip-flops
feature 3-state outputs designed specifically for
bus driving. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
SN54ALS576B, SN54AS576 . . . FK PACKAGE
(TOP VIEW)
These flip-flops enter data on the low-to-high
transition of the clock (CLK) input.
3
2
1
20 19
18
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
4
5
6
7
8
The output-enable (OE) input does not affect
internal operations of the flip-flops. Old data can
be retained or new data can be entered while the
outputs are disabled.
17
16
15
14
9 10 11 12 13
The SN54ALS576B and SN54AS576 are
characterized for operation over the full military
temperature range of –55°C to 125°C. The
SN74ALS576B,
SN74AS576 are characterized for operation from
0°C to 70°C.
SN74ALS577A,
and
SN74ALS577A . . . DW OR NT PACKAGE
(TOP VIEW)
CLR
OE
1D
2D
3D
4D
5D
6D
7D
V
CC
1
24
23
22
21
20
19
18
17
16
15
14
13
NC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
NC
2
3
4
5
6
7
8
9
8D
NC
GND
10
11
12
NC – No internal connection
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995
Function Tables
′ALS576B, ′AS576
(each flip-flop)
INPUTS
OUTPUT
Q
OE
L
CLK
D
H
L
↑
↑
L
L
H
L
L
X
X
X
Q
0
H
Z
SN74ALS577A
(each flip-flop)
INPUTS
OUTPUT
Q
OE
L
CLR
CLK
D
X
H
L
L
H
H
H
X
↑
↑
H
L
L
L
↑
H
L
L
X
X
X
Q
0
H
Z
†
logic symbols
′ALS576B, ′AS576
SN74ALS577A
1
OE
2
EN
C1
EN
C1
1R
OE
11
14
1
CLK
CLK
CLR
2
1D
3
19
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
1D
18
17
16
15
14
13
12
3
22
21
20
19
18
17
16
15
2D
4
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
1D
2D
3D
4D
5D
6D
7D
8D
1D
4
3D
5
5
4D
6
6
5D
7
7
6D
8
8
7D
9
9
8D
10
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pinnumbers shown for the SN74ALS577A are for the DW and NT
packages.
Pin numbers shown for the ′ALS576B and ′AS576 are for the DW,
J, N, and W packages.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995
logic diagrams (positive logic)
′ALS576B, ′AS576
SN74ALS577A
1
2
OE
OE
14
1
11
CLK
CLK
CLR
1D
C1
1D
19
1Q
2
1D
C1
1D
22
1Q
3
To Seven Other Channels
To Seven Other Channels
Pin numbers shown are for the DW, J, N, and W packages.
Pin numbers shown are for the DW and NT packages.
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, T : SN54ALS576B . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
SN74ALS576B, SN74ALS577A . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN74ALS576B
SN74ALS577A
SN54ALS576B
MIN NOM MAX
UNIT
MIN NOM
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
IH
0.7
–1
12
22
0.8
–2.6
24
V
IL
I
mA
mA
OH
OL
I
′ALS576B
0
25
0
0
30
f
t
t
t
Clock frequency
Pulse duration
MHz
ns
clock
SN74ALS577A
30
′ALS576B, CLK high or low
SN74ALS577A, CLK high or low
Data
16.5
16.5
15
15
0
w
15
ns
Setup time before CLK↑
su
h
SN74ALS577A CLR
Data
4
ns
Hold time after CLK↑
SN74ALS577A CLR
0
T
A
Operating free-air temperature
–55
125
0
70
°C
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN74ALS576B
SN54ALS576B
SN74ALS577A
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
= 4.5 V,
I = –18 mA
–1.2
–1.2
V
IK
CC
I
= 4.5 V to 5.5 V,
I
I
I
I
I
= –0.4 mA
= –1 mA
= –2.6 mA
= 12 mA
= 24 mA
= 2.7 V
V
–2
V
CC
–2
CC
OH
OH
OH
OL
OL
CC
2.4
V
OH
3.3
V
V
= 4.5 V
= 4.5 V
CC
CC
2.4
3.2
0.25
0.35
0.25
0.4
0.4
0.5
20
V
OL
V
V
I
I
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
V
20
–20
0.1
µA
µA
OZH
OZL
I
O
O
V
= 0.4 V
–20
0.1
20
V = 7 V
I
mA
µA
V = 2.7 V
I
20
IH
V = 0.4 V
I
–0.2
–112
18
–0.2
–112
18
mA
mA
IL
‡
V
O
= 2.25 V
–20
–30
O
Outputs high
Outputs low
10
15
16
10
15
16
I
V
CC
= 5.5 V
24
24
mA
CC
Outputs disabled
30
30
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
switching characteristics (see Figure 1)
V
C
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
R1 = 500 Ω,
R2 = 500 Ω,
T
A
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
§
= MIN to MAX
SN54ALS576B SN74ALS576B SN74ALS577A
MIN
22
4
MAX
MIN
30
3
MAX
MIN
30
4
MAX
f
t
t
t
t
t
t
MHz
ns
max
PLH
PHL
PZH
PZL
PHZ
PLZ
24
20
24
23
14
29
14
14
18
18
10
15
14
14
18
18
10
15
CLK
Any Q
Any Q
Any Q
4
4
4
4
3
4
ns
ns
OE
OE
3
4
4
2
1
2
3
2
3
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, T : SN54AS576 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
SN74AS576 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS576
MIN NOM
SN74AS576
MIN NOM
UNIT
MAX
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Clock frequency
IH
0.8
–12
32
0.8
–15
48
V
IL
I
I
f
mA
mA
MHz
OH
OL
clock
*
0
5
100
0
4
2
2
2
0
125
CLK high
CLK low
t *
w
Pulse duration
ns
4
t
*
Setup time, data before CLK↑
Hold time, data after CLK↑
Operating free-air temperature
3
ns
ns
°C
su
t *
3
h
T
A
–55
125
70
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS576
SN74AS576
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
= 4.5 V,
I = –18 mA
–1.2
–1.2
V
IK
CC
I
= 4.5 V to 5.5 V,
I
I
I
I
I
= –2 mA
= –12 mA
= –15 mA
= 32 mA
= 48 mA
= 2.7 V
V
–2
CC
2.4
V
–2
CC
OH
OH
OH
OL
OL
CC
3.2
V
OH
V
= 4.5 V
= 4.5 V
CC
CC
2.4
3.3
0.29
0.5
V
OL
V
V
0.33
0.5
50
I
I
I
I
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
V
50
–50
0.1
µA
µA
mA
µA
OZH
OZL
I
O
O
V
= 0.4 V
–50
0.1
V = 7 V
I
V = 2.7 V
I
20
20
IH
D
–3
–2
I
V
= 5.5 V,
= 5.5 V,
V = 0.4 V
mA
mA
IL
CC
CC
I
All others
–0.5
–112
125
135
135
–0.5
–112
125
135
135
‡
I
O
V
V
O
= 2.25 V
–30
–30
Outputs high
Outputs low
77
84
84
77
84
84
I
V
CC
= 5.5 V
mA
CC
Outputs disabled
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
switching characteristics (see Figure 1)
V
C
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
R1 = 500 Ω,
R2 = 500 Ω,
T
A
FROM
TO
(OUTPUT)
PARAMETER
(INPUT)
UNIT
§
= MIN to MAX
SN54AS576
SN74AS576
MIN
100
3
MAX
MIN
125
3
MAX
f
t
t
t
t
t
t
*
MHz
ns
max
11
11
7
8
9
PLH
PHL
PZH
PZL
PHZ
PLZ
CLK
Any Q
Any Q
Any Q
4
4
2
2
6
ns
ns
OE
OE
3
11
7
3
10
6
2
2
2
7
2
6
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
R
= R1 = R2
V
CC
L
S1
R1
R
L
Test
Point
From Output
Under Test
From Output
Under Test
Test
Point
Test
Point
From Output
Under Test
C
C
L
R
L
R2
L
C
L
(see Note A)
(see Note A)
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
3.5 V
Timing
Input
High-Level
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
0.3 V
t
h
t
w
t
su
3.5 V
3.5 V
0.3 V
Data
Input
Low-Level
1.3 V
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
0.3 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
3.5 V
t
PZL
Input
1.3 V
1.3 V
t
PLZ
0.3 V
PHL
3.5 V
t
Waveform 1
S1 Closed
(see Note B)
t
PLH
1.3 V
V
OH
In-Phase
Output
1.3 V
1.3 V
1.3 V
V
OL
0.3 V
V
OL
t
PHZ
t
PLH
t
PZH
t
PHL
V
OH
V
Waveform 2
S1 Open
(see Note B)
OH
OL
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
0.3 V
V
0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.
r
f
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
CFP
Drawing
84001022A
8400102RA
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
FK
J
20
20
20
20
20
20
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
8400102SA
W
J
SN54ALS576BJ
SN54AS576J
SN74ALS576BDW
CDIP
CDIP
SOIC
J
DW
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ALS576BDWE4
SN74ALS576BDWR
SN74ALS576BDWRE4
SN74ALS576BN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
DW
DW
DW
N
20
20
20
20
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20
20
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN74ALS576BN3
SN74ALS576BNE4
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
20
20
TBD
Call TI
Call TI
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN74ALS576BNSR
SN74ALS576BNSRE4
SN74ALS577ADW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
SO
NS
NS
DW
DW
DW
DW
NS
NS
NT
20
20
24
24
24
24
24
24
24
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
SO
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74ALS577ADWE4
SN74ALS577ADWR
SN74ALS577ADWRE4
SN74ALS577ANSR
SN74ALS577ANSRE4
SN74ALS577ANT
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PDIP
15
15
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN74ALS577ANT3
SN74ALS577ANTE4
OBSOLETE
ACTIVE
PDIP
PDIP
NT
NT
24
24
TBD
Call TI
Call TI
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN74AS576DW
SN74AS576DWE4
SN74AS576DWR
SN74AS576DWRE4
SN74AS576N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
PDIP
DW
DW
DW
DW
N
20
20
20
20
20
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20
Pb-Free
CU NIPDAU Level-NC-NC-NC
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2005
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
(RoHS)
SN74AS576NE4
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SNJ54ALS576BFK
SNJ54ALS576BJ
SNJ54ALS576BW
SNJ54AS576FK
SNJ54AS576J
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CFP
FK
J
20
20
20
20
20
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
W
FK
J
LCCC
CDIP
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI004 – OCTOBER 1994
NT (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
24 PINS SHOWN
A
PINS **
24
28
DIM
24
13
1.260
(32,04) (36,20)
1.425
A MAX
1.230
(31,24) (35,18)
1.385
A MIN
B MAX
B MIN
0.280 (7,11)
0.250 (6,35)
0.310
(7,87)
0.315
(8,00)
1
12
0.290
(7,37)
0.295
(7,49)
0.070 (1,78) MAX
B
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0.010 (0,25)
0°–15°
0.021 (0,53)
0.015 (0,38)
M
0.010 (0,25) NOM
4040050/B 04/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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