SN54HC05J-00 [TI]

HC/UH SERIES, HEX 1-INPUT INVERT GATE, CDIP14;
SN54HC05J-00
型号: SN54HC05J-00
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

HC/UH SERIES, HEX 1-INPUT INVERT GATE, CDIP14

CD 输入元件 逻辑集成电路
文件: 总18页 (文件大小:1057K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN54HC05, SN74HC05  
HEX INVERTERS  
WITH OPEN-DRAIN OUTPUTS  
SCLS080D – MARCH 1984 – REVISED AUGUST 2003  
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive Up To 10 LSTTL Loads  
Typical t = 8 ns  
pd  
4-mA Output Drive at 5 V  
Low Power Consumption, 20-µA Max I  
Low Input Current of 1 µA Max  
CC  
SN54HC05 . . . FK PACKAGE  
(TOP VIEW)  
SN54HC05 . . . J OR W PACKAGE  
SN74HC05 . . . D, DB, N, NS, OR PW PACKAGE  
(TOP VIEW)  
1A  
1Y  
V
CC  
13 6A  
1
2
3
4
5
6
7
14  
3
2
1
20 19  
18  
6Y  
NC  
5A  
2A  
NC  
2Y  
4
5
6
7
8
12  
11  
10  
9
2A  
6Y  
5A  
5Y  
4A  
4Y  
17  
16  
2Y  
3A  
15 NC  
14  
9 10 11 12 13  
NC  
3A  
3Y  
5Y  
8
GND  
NC – No internal connection  
description/ordering information  
The ’HC05 devices contain six independent inverters. They perform the Boolean function  
Y = A in positive logic. The open-drain outputs require pullup resistors to perform correctly. They may be  
connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP – N  
SOIC – D  
Tube of 25  
Tube of 50  
Reel of 2500  
Reel of 250  
Reel of 2000  
Reel of 2000  
Reel of 2000  
Reel of 250  
Tube of 25  
Tube of 150  
Tube of 55  
SN74HC05N  
SN74HC05N  
SN74HC05D  
SN74HC05DR  
SN74HC05DT  
SN74HC05NSR  
SN74HC05DBR  
SN74HC05PWR  
SN74HC05PWT  
SNJ54HC05J  
SNJ54HC05W  
SNJ54HC05FK  
HC05  
–40°C to 85°C  
SOP – NS  
HC05  
HC05  
SSOP – DB  
TSSOP – PW  
HC05  
CDIP – J  
CFP – W  
LCCC – FK  
SNJ54HC05J  
SNJ54HC05W  
SNJ54HC05FK  
–55°C to 125°C  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54HC05, SN74HC05  
HEX INVERTERS  
WITH OPEN-DRAIN OUTPUTS  
SCLS080D – MARCH 1984 – REVISED AUGUST 2003  
FUNCTION TABLE  
(each inverter)  
INPUT  
A
OUTPUT  
Y
H
L
L
H
logic diagram (positive logic)  
A
Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
CC  
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
IK  
I
CC  
Output clamp current, I  
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA  
Continuous current through V  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W  
JA  
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W  
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W  
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
recommended operating conditions (see Note 3)  
SN54HC05  
SN74HC05  
MIN NOM  
UNIT  
MIN NOM  
MAX  
MAX  
V
V
Supply voltage  
2
1.5  
5
6
2
1.5  
5
6
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
High-level input voltage  
= 4.5 V  
= 6 V  
3.15  
4.2  
3.15  
4.2  
V
V
IH  
= 2 V  
0.5  
1.35  
1.8  
0.5  
1.35  
1.8  
V
IL  
Low-level input voltage  
= 4.5 V  
= 6 V  
V
V
Input voltage  
0
0
V
V
0
0
V
V
V
V
I
CC  
CC  
Output voltage  
O
CC  
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
1000  
500  
400  
125  
1000  
500  
400  
85  
t/v  
Input transition rise/fall time  
= 4.5 V  
= 6 V  
ns  
T
A
Operating free-air temperature  
–55  
–40  
°C  
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54HC05, SN74HC05  
HEX INVERTERS  
WITH OPEN-DRAIN OUTPUTS  
SCLS080D – MARCH 1984 – REVISED AUGUST 2003  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
A
= 25°C  
TYP  
SN54HC05  
MIN MAX  
SN74HC05  
MIN MAX  
PARAMETER  
TEST CONDITIONS  
V
UNIT  
CC  
MIN  
MAX  
0.5  
0.1  
0.1  
0.1  
0.26  
0.26  
100  
2
I
V = V or V  
IH  
,
IL  
V
O
= V  
CC  
6 V  
2 V  
0.01  
10  
0.1  
0.1  
0.1  
0.4  
0.4  
1000  
40  
5
0.1  
µA  
OH  
I
0.002  
0.001  
0.001  
0.17  
0.15  
0.1  
I
= 20 µA  
4.5 V  
6 V  
0.1  
OL  
V
OL  
V = V or V  
0.1  
V
I
IH  
IL  
I
I
= 4 mA  
4.5 V  
6 V  
0.33  
0.33  
1000  
20  
OL  
= 5.2 mA  
OL  
I
I
V = V  
I
or 0  
6 V  
nA  
µA  
pF  
I
CC  
CC  
V = V  
I
or 0,  
I
O
= 0  
6 V  
CC  
C
2 V to 6 V  
3
10  
10  
10  
i
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
T
A
= 25°C  
TYP  
60  
13  
10  
45  
9
SN54HC05  
MIN MAX  
SN74HC05  
MIN MAX  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
V
UNIT  
CC  
MIN  
MAX  
115  
23  
2 V  
4.5 V  
6 V  
175  
35  
145  
29  
t
t
t
A
A
Y
Y
Y
ns  
PLH  
PHL  
f
20  
30  
25  
2 V  
85  
130  
26  
105  
21  
4.5 V  
6 V  
17  
ns  
ns  
8
14  
22  
18  
2 V  
38  
8
75  
110  
22  
95  
4.5 V  
6 V  
15  
19  
6
13  
19  
16  
operating characteristics, T = 25°C  
A
PARAMETER  
TEST CONDITIONS  
TYP  
UNIT  
C
Power dissipation capacitance per inverter  
No load  
20  
pF  
pd  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54HC05, SN74HC05  
HEX INVERTERS  
WITH OPEN-DRAIN OUTPUTS  
SCLS080D – MARCH 1984 – REVISED AUGUST 2003  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
R
= 1 kΩ  
L
V
CC  
Test  
Point  
From Output  
Under Test  
Input  
50%  
50%  
0 V  
C
= 50 pF  
L
t
t
PLH  
PHL  
90%  
(see Note A)  
V
V
OH  
In-Phase  
Output  
50%  
10%  
10%  
LOAD CIRCUIT  
OL  
t
f
t
PHL  
90%  
V
t
CC  
PLH  
10%  
90%  
t
90%  
V
V
OH  
Input  
50%  
10%  
50%  
10%  
Out-of-Phase  
Output  
50%  
10%  
0 V  
OL  
t
r
f
t
f
VOLTAGE WAVEFORM  
INPUT RISE AND FALL TIMES  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES  
NOTES: A.  
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following  
characteristics: PRR 1 MHz, Z = 50 , t = 6 ns, t = 6 ns.  
C includes probe and test-fixture capacitance.  
L
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
5962-88718012A  
ACTIVE  
LCCC  
FK  
20  
1
TBD  
POST-PLATE  
N / A for Pkg Type  
-55 to 125  
5962-  
88718012A  
SNJ54HC  
05FK  
5962-8871801CA  
ACTIVE  
CDIP  
J
14  
1
TBD  
TBD  
A42  
N / A for Pkg Type  
-55 to 125  
5962-8871801CA  
SNJ54HC05J  
SN54HC05J  
SN74HC05D  
ACTIVE  
ACTIVE  
CDIP  
SOIC  
J
14  
14  
1
A42  
N / A for Pkg Type  
-55 to 125  
-40 to 85  
SN54HC05J  
D
50  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-1-260C-UNLIM  
HC05  
SN74HC05DE4  
SN74HC05DG4  
SN74HC05DR  
SN74HC05DRE4  
SN74HC05DRG4  
SN74HC05DT  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
PDIP  
D
D
D
D
D
D
D
D
N
14  
14  
14  
14  
14  
14  
14  
14  
14  
50  
50  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
N / A for Pkg Type  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
HC05  
Green (RoHS  
& no Sb/Br)  
HC05  
2500  
2500  
2500  
250  
250  
250  
25  
Green (RoHS  
& no Sb/Br)  
HC05  
Green (RoHS  
& no Sb/Br)  
HC05  
Green (RoHS  
& no Sb/Br)  
HC05  
Green (RoHS  
& no Sb/Br)  
HC05  
SN74HC05DTE4  
SN74HC05DTG4  
SN74HC05N  
Green (RoHS  
& no Sb/Br)  
HC05  
Green (RoHS  
& no Sb/Br)  
HC05  
Pb-Free  
(RoHS)  
SN74HC05N  
SN74HC05N3  
OBSOLETE  
ACTIVE  
PDIP  
PDIP  
N
N
14  
14  
TBD  
Call TI  
Call TI  
-40 to 85  
-40 to 85  
SN74HC05NE4  
25  
Pb-Free  
(RoHS)  
CU NIPDAU  
N / A for Pkg Type  
SN74HC05N  
HC05  
SN74HC05NSR  
ACTIVE  
ACTIVE  
SO  
SO  
NS  
NS  
14  
14  
2000  
2000  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 85  
-40 to 85  
SN74HC05NSRE4  
Green (RoHS  
& no Sb/Br)  
HC05  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-55 to 125  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
SN74HC05NSRG4  
SN74HC05PWR  
SN74HC05PWRE4  
SN74HC05PWRG4  
SN74HC05PWT  
ACTIVE  
SO  
NS  
14  
14  
14  
14  
14  
14  
14  
20  
2000  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
POST-PLATE  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
N / A for Pkg Type  
HC05  
HC05  
HC05  
HC05  
HC05  
HC05  
HC05  
5962-  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
LCCC  
PW  
PW  
PW  
PW  
PW  
PW  
FK  
2000  
2000  
2000  
250  
250  
250  
1
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
SN74HC05PWTE4  
SN74HC05PWTG4  
SNJ54HC05FK  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
TBD  
88718012A  
SNJ54HC  
05FK  
SNJ54HC05J  
ACTIVE  
CDIP  
J
14  
1
TBD  
A42  
N / A for Pkg Type  
-55 to 125  
5962-8871801CA  
SNJ54HC05J  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF SN54HC05, SN74HC05 :  
Catalog: SN74HC05  
Military: SN54HC05  
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
Military - QML certified for Military and Defense Applications  
Addendum-Page 3  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
31-May-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
SN74HC05DR  
SN74HC05DR  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SO  
D
D
14  
14  
14  
14  
14  
14  
14  
14  
2500  
2500  
2500  
2500  
250  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
16.4  
16.4  
16.4  
16.4  
16.4  
16.4  
12.4  
12.4  
6.5  
6.5  
6.5  
6.5  
6.5  
8.2  
6.9  
6.9  
9.0  
9.0  
9.0  
9.0  
9.0  
10.5  
5.6  
5.6  
2.1  
2.1  
2.1  
2.1  
2.1  
2.5  
1.6  
1.6  
8.0  
8.0  
8.0  
8.0  
8.0  
12.0  
8.0  
8.0  
16.0  
16.0  
16.0  
16.0  
16.0  
16.0  
12.0  
12.0  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
SN74HC05DRG4  
SN74HC05DRG4  
SN74HC05DT  
D
D
D
SN74HC05NSR  
SN74HC05PWR  
SN74HC05PWT  
NS  
PW  
PW  
2000  
2000  
250  
TSSOP  
TSSOP  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
31-May-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN74HC05DR  
SN74HC05DR  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SO  
D
D
14  
14  
14  
14  
14  
14  
14  
14  
2500  
2500  
2500  
2500  
250  
367.0  
333.2  
367.0  
333.2  
367.0  
367.0  
367.0  
367.0  
367.0  
345.9  
367.0  
345.9  
367.0  
367.0  
367.0  
367.0  
38.0  
28.6  
38.0  
28.6  
38.0  
38.0  
35.0  
35.0  
SN74HC05DRG4  
SN74HC05DRG4  
SN74HC05DT  
D
D
D
SN74HC05NSR  
SN74HC05PWR  
SN74HC05PWT  
NS  
PW  
PW  
2000  
2000  
250  
TSSOP  
TSSOP  
Pack Materials-Page 2  
IMPORTANT NOTICE  
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www.ti.com/audio  
amplifier.ti.com  
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www.dlp.com  
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Data Converters  
DLP® Products  
DSP  
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Energy and Lighting  
Industrial  
www.ti.com/computers  
www.ti.com/consumer-apps  
www.ti.com/energy  
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