SN54HC14FK [TI]
HEX SCHMITT-TRIGGER INVERTERS; 六角施密特触发反相器型号: | SN54HC14FK |
厂家: | TEXAS INSTRUMENTS |
描述: | HEX SCHMITT-TRIGGER INVERTERS |
文件: | 总15页 (文件大小:516K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢃꢇ ꢀꢁ ꢈꢃ ꢄꢅ ꢆꢃ
ꢄꢉ ꢊ ꢀꢅ ꢄꢋꢌ ꢍꢍꢎꢍ ꢏꢌꢐ ꢐ ꢉꢏ ꢌꢁ ꢑꢉ ꢏ ꢍꢉ ꢏꢀ
SCLS085E − DECEMBER 1982 − REVISED NOVEMBER 2004
D
D
D
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
D
D
D
Typical t = 11 ns
pd
4-mA Output Drive at 5 V
Low Power Consumption, 20-µA Max I
Low Input Current of 1 µA Max
CC
SN54HC14 . . . J OR W PACKAGE
SN74HC14 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54HC14 . . . FK PACKAGE
(TOP VIEW)
1A
1Y
1
2
3
4
5
6
7
14
13
12
11
10
9
V
CC
3
2
1
20 19
18
6A
6Y
5A
5Y
4A
4Y
6Y
NC
5A
2A
NC
2Y
4
5
6
7
8
2A
17
16
2Y
3A
15 NC
14
9 10 11 12 13
NC
3A
3Y
5Y
8
GND
NC − No internal connection
description/ordering information
These Schmitt-trigger devices contain six independent inverters. They perform the Boolean function
Y = A in positive logic.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
SOIC − D
Tube of 25
Tube of 50
Reel of 2500
Reel of 250
Reel of 2000
Reel of 2000
Tube of 90
Reel of 2000
Reel of 250
Tube
SN74HC14N
SN74HC14N
SN74HC14D
SN74HC14DR
SN74HC14DT
SN74HC14NSR
SN74HC14DBR
SN74HC14PW
SN74HC14PWR
SN74HC14PWT
SNJ54HC14J
SNJ54HC14W
SNJ54HC14FK
HC14
SOP − NS
HC14
HC14
−40°C to 85°C
SSOP − DB
TSSOP − PW
HC14
CDIP − J
CFP − W
LCCC − FK
SNJ54HC14J
SNJ54HC14W
SNJ54HC14FK
Tube
−55°C to 125°C
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2004, Texas Instruments Incorporated
ꢓ ꢘ ꢣ ꢛ ꢚꢦ ꢡꢠ ꢞꢟ ꢠꢚ ꢜꢣ ꢥꢗ ꢝꢘ ꢞ ꢞꢚ ꢋꢌ ꢭꢎ ꢒꢏ ꢮ ꢎꢯꢰꢂ ꢯꢂꢇ ꢝꢥꢥ ꢣꢝ ꢛ ꢝ ꢜꢢ ꢞꢢꢛ ꢟ ꢝ ꢛ ꢢ ꢞꢢ ꢟꢞꢢ ꢦ
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢃ ꢇ ꢀꢁ ꢈ ꢃ ꢄꢅꢆ ꢃ
ꢄ ꢉꢊ ꢀꢅ ꢄ ꢋꢌ ꢍ ꢍꢎꢍ ꢏꢌ ꢐꢐ ꢉ ꢏ ꢌ ꢁꢑ ꢉ ꢏꢍꢉ ꢏ ꢀ
SCLS085E − DECEMBER 1982 − REVISED NOVEMBER 2004
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H
L
L
H
logic diagram (positive logic)
A
Y
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
CC
Output clamp current, I
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HC14
SN74HC14
MIN NOM
UNIT
MIN NOM
MAX
MAX
V
V
V
Supply voltage
2
0
5
6
2
0
5
6
V
V
CC
Input voltage
V
V
V
V
I
CC
CC
Output voltage
0
0
V
O
CC
CC
85
T
A
Operating free-air temperature
−55
125
−40
°C
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢃꢇ ꢀꢁ ꢈꢃ ꢄꢅ ꢆꢃ
ꢄꢉ ꢊ ꢀꢅ ꢄꢋꢌ ꢍꢍꢎꢍ ꢏꢌꢐ ꢐ ꢉꢏ ꢌꢁ ꢑꢉ ꢏ ꢍꢉ ꢏꢀ
SCLS085E − DECEMBER 1982 − REVISED NOVEMBER 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
TYP
1.2
2.5
3.3
0.6
1.6
2
SN54HC14
MAX
SN74HC14
A
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
0.7
1.55
2.1
0.3
0.9
1.2
0.2
0.4
0.5
MAX
1.5
3.15
4.2
1
MIN
0.7
1.55
2.1
0.3
0.9
1.2
0.2
0.4
0.5
1.9
4.4
5.9
3.7
5.2
MIN
0.7
MAX
2 V
4.5 V
6 V
1.5
3.15
4.2
1
1.5
3.15
4.2
1
1.55
2.1
V
T+
V
T−
V
T+
V
2 V
0.3
4.5 V
6 V
2.45
3.2
1.2
2.1
2.5
2.45
3.2
1.2
2.1
2.5
0.9
2.45
3.2
1.2
2.1
2.5
V
V
1.2
2 V
0.6
0.9
1.3
0.2
4.5 V
6 V
0.4
− V
T−
0.5
2 V
1.9 1.998
4.4 4.499
5.9 5.999
1.9
4.5 V
6 V
4.4
I
= −20 µA
OH
5.9
V
V
V = V or V
IH
V
V
OH
OL
I
IL
I
I
= −4 mA
4.5 V
6 V
3.98
5.48
4.3
5.8
3.84
5.34
OH
= −5.2 mA
OH
2 V
0.002
0.001
0.001
0.17
0.15
0.1
0.1
0.1
0.1
0.26
0.26
100
2
0.1
0.1
0.1
0.1
4.5 V
6 V
I
= 20 µA
OL
0.1
0.1
V = V or V
I
IH
IL
I
I
= 4 mA
4.5 V
6 V
0.4
0.33
0.33
1000
20
OL
= 5.2 mA
0.4
OL
I
I
V = V
I
or 0
6 V
1000
40
nA
µA
pF
I
CC
V = V
I
or 0,
I
O
= 0
6 V
CC
CC
C
2 V to 6 V
3
10
10
10
i
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
55
SN54HC14
MIN MAX
SN74HC14
MIN MAX
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
CC
MIN
MAX
125
25
2 V
4.5 V
6 V
190
38
155
31
26
95
19
16
12
t
A
Y
Y
ns
pd
t
11
21
32
2 V
38
75
110
22
t
4.5 V
6 V
8
15
ns
6
13
19
operating characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
TYP
UNIT
C
Power dissipation capacitance per inverter
No load
20
pF
pd
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢃ ꢇ ꢀꢁ ꢈ ꢃ ꢄꢅꢆ ꢃ
ꢄ ꢉꢊ ꢀꢅ ꢄ ꢋꢌ ꢍ ꢍꢎꢍ ꢏꢌ ꢐꢐ ꢉ ꢏ ꢌ ꢁꢑ ꢉ ꢏꢍꢉ ꢏ ꢀ
SCLS085E − DECEMBER 1982 − REVISED NOVEMBER 2004
PARAMETER MEASUREMENT INFORMATION
V
CC
From Output
Under Test
Test
Point
Input
50%
50%
0 V
C
= 50 pF
L
t
t
PLH
PHL
90%
(see Note A)
V
V
OH
In-Phase
Output
90%
t
50%
10%
50%
10%
LOAD CIRCUIT
OL
t
r
f
f
t
t
PLH
PHL
90%
V
CC
V
V
90%
t
90%
OH
Input
50%
10%
50%
10%
90%
t
Out-of-Phase
Output
50%
10%
50%
10%
0 V
OL
t
r
f
t
r
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
C includes probe and test-fixture capacitance.
L
O
r
f
C. The outputs are measured one at a time, with one input transition per measurement.
D. and t are the same as t
t
.
PLH
PHL pd
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
28-Feb-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
CDIP
CFP
Drawing
5962-8409101VCA
5962-8409101VDA
84091012A
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
J
W
FK
J
14
14
20
14
14
14
14
14
14
1
1
None
None
None
None
None
None
None
None
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
LCCC
CDIP
CFP
1
8409101CA
1
8409101DA
W
J
1
JM38510/65702BCA
JM38510/65702BDA
SN54HC14J
CDIP
CFP
1
W
J
1
CDIP
SOIC
1
SN74HC14D
D
50
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74HC14DBR
SN74HC14DR
SN74HC14DT
SN74HC14N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SOIC
SOIC
PDIP
DB
D
14
14
14
14
2000
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
250
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
N
25
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN74HC14N3
SN74HC14NS
OBSOLETE
ACTIVE
PDIP
SO
N
14
14
None
Call TI
Call TI
NS
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74HC14NSLE
SN74HC14NSR
OBSOLETE
ACTIVE
SO
SO
NS
NS
14
14
None
Call TI
Call TI
2000
90
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74HC14PW
ACTIVE
TSSOP
PW
14
Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
SN74HC14PWLE
SN74HC14PWR
OBSOLETE TSSOP
PW
PW
14
14
None
Call TI
Call TI
ACTIVE
TSSOP
2000
250
Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
SN74HC14PWT
ACTIVE
TSSOP
PW
14
Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
SNJ54HC14FK
SNJ54HC14J
SNJ54HC14W
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CFP
FK
J
20
14
14
1
1
1
None
None
None
Call TI
Call TI
Call TI
Level-NC-NC-NC
Level-NC-NC-NC
Level-NC-NC-NC
W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
28-Feb-2005
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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