SN54HC240_07 [TI]

OCTAL BUFFERS AND LINE DRIVERS; 八路缓冲器和线路驱动器
SN54HC240_07
型号: SN54HC240_07
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

OCTAL BUFFERS AND LINE DRIVERS
八路缓冲器和线路驱动器

驱动器
文件: 总18页 (文件大小:682K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢊ ꢅꢋꢌꢍ ꢎꢏꢐ ꢐ ꢑꢒꢀ ꢌꢁꢓ ꢍ ꢔꢁꢑ ꢓ ꢒꢔ ꢕ ꢑꢒ  
ꢖ ꢔꢋ ꢄ ꢗ ꢘꢀꢋꢌꢋ ꢑ ꢊ ꢏꢋ ꢙꢏ ꢋ  
SCLS128D − DECEMBER 1982 − REVISED AUGUST 2003  
D
D
Wide Operating Voltage Range of 2 V to 6 V  
D
D
D
6-mA Output Drive at 5 V  
High-Current Outputs Drive Up To 15  
LSTTL Loads  
Low Input Current of 1 µA Max  
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
D
Low Power Consumption, 80-µA Max I  
CC  
D
Typical t = 9 ns  
pd  
SN54HC240 . . . J OR W PACKAGE  
SN74HC240 . . . DB, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
SN54HC240 . . . FK PACKAGE  
(TOP VIEW)  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
2A2  
1Y4  
2A1  
3
2
1
20 19  
18  
1A2  
2Y3  
1A3  
2Y2  
1A4  
1Y1  
2A4  
1Y2  
2A3  
4
5
6
7
8
17  
16  
15  
14 1Y3  
9 10 11 12 13  
description/ordering information  
These octal buffers and line drivers are designed specifically to improve both the performance and density of  
3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC240  
devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low,  
the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the  
high-impedance state.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
Tube of 20  
Tube of 25  
Reel of 2000  
Reel of 2000  
Reel of 2000  
Tube of 70  
Reel of 2000  
Reel of 250  
Tube of 20  
Tube of 85  
Tube of 55  
SN74HC240N  
SN74HC240N  
SN74HC240DW  
SN74HC240DWR  
SN74HC240NSR  
SN74HC240DBR  
SN74HC240PW  
SN74HC240PWR  
SN74HC240PWT  
SNJ54HC240J  
SOIC − DW  
HC240  
SOP − NS  
HC240  
HC240  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
HC240  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54HC240J  
SNJ54HC240W  
SNJ54HC240FK  
SNJ54HC240W  
SNJ54HC240FK  
−55°C to 125°C  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢊ ꢛ ꢦ ꢞ ꢝꢩ ꢤꢣ ꢡꢢ ꢣꢝ ꢟꢦ ꢨꢚ ꢠꢛ ꢡ ꢡꢝ ꢰꢔ ꢍꢘ ꢙꢒ ꢐ ꢘꢗꢱꢂ ꢗꢂꢈ ꢠꢨꢨ ꢦꢠ ꢞ ꢠ ꢟꢥ ꢡꢥꢞ ꢢ ꢠ ꢞ ꢥ ꢡꢥ ꢢꢡꢥ ꢩ  
ꢞꢩ  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
ꢤ ꢛꢨ ꢥꢢꢢ ꢝ ꢡꢫꢥ ꢞ ꢭꢚ ꢢꢥ ꢛ ꢝꢡꢥ ꢩꢪ ꢊ ꢛ ꢠꢨ ꢨ ꢝ ꢡꢫꢥ ꢞ ꢦꢞ ꢝ ꢩꢤꢣ ꢡꢢ ꢈ ꢦꢞ ꢝ ꢩꢤꢣ ꢡꢚꢝ ꢛ  
ꢝꢣ  
ꢛꢯ  
ꢝꢥ  
ꢝꢡ  
ꢩꢥ  
ꢥꢞ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢃ ꢇꢈ ꢀꢁ ꢉ ꢃ ꢄꢅꢆ ꢃ ꢇ  
ꢊꢅ ꢋꢌ ꢍ ꢎ ꢏꢐ ꢐ ꢑ ꢒꢀ ꢌꢁ ꢓ ꢍꢔ ꢁ ꢑ ꢓꢒ ꢔ ꢕꢑ ꢒꢀ  
ꢖꢔ ꢋ ꢄ ꢗ ꢘꢀꢋꢌꢋ ꢑ ꢊꢏꢋ ꢙꢏ ꢋꢀ  
SCLS128D − DECEMBER 1982 − REVISED AUGUST 2003  
FUNCTION TABLE  
(each buffer/driver)  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
L
H
Z
H
X
logic diagram (positive logic)  
1
19  
1OE  
2OE  
18  
2
9
7
11  
13  
1Y1  
1Y2  
1Y3  
1Y4  
1A1  
2Y1  
2Y2  
2A1  
2A2  
2A3  
2A4  
16  
14  
12  
4
1A2  
5
3
6
15  
17  
1A3  
2Y3  
2Y4  
8
1A4  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V  
CC  
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
IK  
I
CC  
Output clamp current, I  
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 mA  
Continuous current through V  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA  
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W  
JA  
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W  
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢊ ꢅꢋꢌꢍ ꢎꢏꢐ ꢐ ꢑꢒꢀ ꢌꢁꢓ ꢍ ꢔꢁꢑ ꢓ ꢒꢔ ꢕ ꢑꢒ  
SCLS128D − DECEMBER 1982 − REVISED AUGUST 2003  
recommended operating conditions (see Note 3)  
SN54HC240  
MIN NOM  
SN74HC240  
MIN NOM  
UNIT  
MAX  
MAX  
V
V
Supply voltage  
2
1.5  
5
6
2
1.5  
5
6
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
= 4.5 V  
= 6 V  
3.15  
4.2  
3.15  
4.2  
High-level input voltage  
V
V
IH  
= 2 V  
0.5  
1.35  
1.8  
0.5  
1.35  
1.8  
= 4.5 V  
= 6 V  
V
IL  
Low-level input voltage  
V
V
Input voltage  
0
0
V
V
0
0
V
V
V
V
I
CC  
CC  
Output voltage  
O
CC  
CC  
V
CC  
V
CC  
V
CC  
= 2 V  
1000  
500  
400  
125  
1000  
500  
400  
85  
= 4.5 V  
= 6 V  
t/v  
Input transition rise/fall time  
ns  
T
A
Operating free-air temperature  
−55  
−40  
°C  
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
= 25°C  
SN54HC240  
SN74HC240  
A
PARAMETER  
TEST CONDITIONS  
V
UNIT  
CC  
MIN  
TYP  
MAX  
MIN  
1.9  
4.4  
5.9  
3.7  
5.2  
MAX  
MIN  
1.9  
MAX  
2 V  
4.5 V  
6 V  
1.9 1.998  
4.4 4.499  
5.9 5.999  
4.4  
I
= −20 µA  
OH  
5.9  
V
V = V or V  
IH  
V
OH  
OL  
I
IL  
IL  
I
I
= −6 mA  
4.5 V  
6 V  
3.98  
5.48  
4.3  
5.8  
3.84  
5.34  
OH  
= −7.8 mA  
OH  
2 V  
0.002  
0.001  
0.001  
0.17  
0.15  
0.1  
0.1  
0.1  
0.1  
0.26  
0.26  
100  
0.5  
8
0.1  
0.1  
0.1  
0.1  
4.5 V  
6 V  
I
= 20 µA  
OL  
0.1  
0.1  
V
V = V or V  
V
I
IH  
I
I
= 6 mA  
4.5 V  
6 V  
0.4  
0.33  
0.33  
1000  
5
OL  
= 7.8 mA  
0.4  
OL  
I
I
I
V = V  
I
or 0  
6 V  
1000  
10  
nA  
µA  
µA  
pF  
I
CC  
V
O
= V  
or 0  
6 V  
0.01  
OZ  
CC  
CC  
V = V  
I
or 0,  
I
O
= 0  
6 V  
160  
10  
80  
CC  
C
2 V to 6 V  
3
10  
10  
i
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢃ ꢇꢈ ꢀꢁ ꢉ ꢃ ꢄꢅꢆ ꢃ ꢇ  
ꢊꢅ ꢋꢌ ꢍ ꢎ ꢏꢐ ꢐ ꢑ ꢒꢀ ꢌꢁ ꢓ ꢍꢔ ꢁ ꢑ ꢓꢒ ꢔ ꢕꢑ ꢒꢀ  
ꢖꢔ ꢋ ꢄ ꢗ ꢘꢀꢋꢌꢋ ꢑ ꢊꢏꢋ ꢙꢏ ꢋꢀ  
SCLS128D − DECEMBER 1982 − REVISED AUGUST 2003  
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
T
A
= 25°C  
TYP  
50  
10  
9
SN54HC240  
SN74HC240  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
V
UNIT  
CC  
MIN  
MAX  
100  
20  
MIN  
MAX  
150  
30  
MIN  
MAX  
125  
25  
2 V  
4.5 V  
6 V  
t
t
t
t
A
Y
Y
Y
Y
ns  
pd  
en  
dis  
t
17  
25  
21  
2 V  
75  
15  
13  
44  
22  
21  
28  
8
150  
30  
225  
45  
190  
38  
4.5 V  
6 V  
OE  
OE  
ns  
ns  
ns  
26  
38  
32  
2 V  
150  
30  
225  
45  
190  
38  
4.5 V  
6 V  
26  
38  
32  
2 V  
60  
90  
75  
4.5 V  
6 V  
12  
18  
15  
6
10  
15  
13  
switching characteristics over recommended operating free-air temperature range, C = 150 pF  
L
(unless otherwise noted) (see Figure 1)  
T
A
= 25°C  
TYP  
75  
SN54HC240  
SN74HC240  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
V
UNIT  
CC  
MIN  
MAX  
150  
30  
MIN  
MAX  
225  
45  
MIN  
MAX  
190  
38  
2 V  
4.5 V  
6 V  
15  
t
t
t
A
Y
Y
Y
ns  
pd  
en  
t
13  
26  
38  
32  
2 V  
100  
20  
200  
40  
300  
60  
250  
50  
4.5 V  
6 V  
OE  
ns  
ns  
17  
34  
51  
43  
2 V  
45  
210  
42  
315  
63  
265  
53  
4.5 V  
6 V  
17  
13  
36  
53  
45  
operating characteristics, T = 25°C  
A
PARAMETER  
TEST CONDITIONS  
TYP  
UNIT  
C
Power dissipation capacitance per buffer/driver  
No load  
35  
pF  
pd  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢊ ꢅꢋꢌꢍ ꢎꢏꢐ ꢐ ꢑꢒꢀ ꢌꢁꢓ ꢍ ꢔꢁꢑ ꢓ ꢒꢔ ꢕ ꢑꢒ  
ꢖ ꢔꢋ ꢄ ꢗ ꢘꢀꢋꢌꢋ ꢑ ꢊ ꢏꢋ ꢙꢏ ꢋ  
SCLS128D − DECEMBER 1982 − REVISED AUGUST 2003  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
PARAMETER  
R
C
L
S1  
S2  
L
t
50 pF  
or  
150 pF  
S1  
S2  
PZH  
Open  
Closed  
Closed  
Open  
Test  
Point  
t
t
1 kΩ  
1 kΩ  
en  
R
t
L
PZL  
From Output  
Under Test  
t
t
PHZ  
PLZ  
Open  
Closed  
Open  
50 pF  
C
dis  
L
Closed  
(see Note A)  
50 pF  
or  
150 pF  
t
or t  
−−  
Open  
Open  
pd  
t
LOAD CIRCUIT  
V
CC  
Input  
50%  
50%  
0 V  
t
t
PLH  
PHL  
90%  
V
V
OH  
In-Phase  
Output  
90%  
50%  
10%  
50%  
10%  
OL  
t
Output  
Control  
(Low-Level  
Enabling)  
t
r
f
f
V
CC  
t
t
PLH  
PHL  
90%  
50%  
50%  
V
V
OH  
90%  
t
0 V  
Out-of-Phase  
Output  
50%  
10%  
50%  
10%  
t
t
PLZ  
PZL  
OL  
t
V  
CC  
V  
CC  
r
Output  
Waveform 1  
(See Note B)  
50%  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES  
10%  
V
OL  
OH  
t
t
PZH  
PHZ  
V
CC  
V
Output  
Waveform 2  
(See Note B)  
90%  
t
90%  
90%  
Input  
50%  
10%  
50%  
10%  
50%  
0 V  
0 V  
t
r
f
VOLTAGE WAVEFORM  
INPUT RISE AND FALL TIMES  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS  
NOTES: A.  
C includes probe and test-fixture capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following  
characteristics: PRR 1 MHz, Z = 50 , t = 6 ns, t = 6 ns.  
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
are the same as t  
.
dis  
PLZ  
PZL  
PLH  
PHZ  
PZH  
PHL  
are the same as t  
.
en  
are the same as t .  
pd  
Figure 1. Load Circuit and Voltage Waveforms  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
9-Oct-2007  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
LCCC  
CDIP  
CFP  
Drawing  
84074012A  
8407401RA  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
FK  
J
20  
20  
20  
20  
20  
20  
20  
1
1
1
1
1
1
TBD  
TBD  
TBD  
TBD  
TBD  
TBD  
POST-PLATE N / A for Pkg Type  
A42 SNPB  
A42  
N / A for Pkg Type  
N / A for Pkg Type  
8407401SA  
W
FK  
J
JM38510/65703B2A  
JM38510/65703BRA  
SN54HC240J  
LCCC  
CDIP  
CDIP  
SSOP  
POST-PLATE N / A for Pkg Type  
A42 SNPB  
A42 SNPB  
N / A for Pkg Type  
N / A for Pkg Type  
J
SN74HC240DBR  
DB  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74HC240DBRE4  
SN74HC240DBRG4  
SN74HC240DW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SSOP  
SSOP  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
PDIP  
DB  
DB  
DW  
DW  
DW  
DW  
DW  
DW  
N
20  
20  
20  
20  
20  
20  
20  
20  
20  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74HC240DWE4  
SN74HC240DWG4  
SN74HC240DWR  
SN74HC240DWRE4  
SN74HC240DWRG4  
SN74HC240N  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
20  
20  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SN74HC240N3  
SN74HC240NE4  
OBSOLETE  
ACTIVE  
PDIP  
PDIP  
N
N
20  
20  
TBD  
Call TI  
Call TI  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SN74HC240NSR  
SN74HC240NSRE4  
SN74HC240NSRG4  
SN74HC240PW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SO  
NS  
NS  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
NS  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
PW  
PW  
PW  
PW  
PW  
PW  
PW  
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN74HC240PWE4  
SN74HC240PWG4  
SN74HC240PWR  
SN74HC240PWRE4  
SN74HC240PWRG4  
SN74HC240PWT  
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
9-Oct-2007  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
no Sb/Br)  
SN74HC240PWTE4  
SN74HC240PWTG4  
ACTIVE  
ACTIVE  
TSSOP  
TSSOP  
PW  
PW  
20  
20  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SNJ54HC240FK  
SNJ54HC240J  
SNJ54HC240W  
ACTIVE  
ACTIVE  
ACTIVE  
LCCC  
CDIP  
CFP  
FK  
J
20  
20  
20  
1
1
1
TBD  
TBD  
TBD  
POST-PLATE N / A for Pkg Type  
A42 SNPB  
A42  
N / A for Pkg Type  
N / A for Pkg Type  
W
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
4-Oct-2007  
TAPE AND REEL BOX INFORMATION  
Device  
Package Pins  
Site  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) (mm) Quadrant  
(mm)  
330  
330  
330  
330  
(mm)  
16  
SN74HC240DBR  
SN74HC240DWR  
SN74HC240NSR  
SN74HC240PWR  
DB  
DW  
NS  
20  
20  
20  
20  
SITE 41  
SITE 41  
SITE 41  
SITE 41  
8.2  
10.8  
8.2  
7.5  
13.0  
13.0  
7.1  
2.5  
2.7  
2.5  
1.6  
12  
12  
12  
8
16  
24  
24  
16  
Q1  
Q1  
Q1  
Q1  
24  
24  
PW  
16  
6.95  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
4-Oct-2007  
Device  
Package  
Pins  
Site  
Length (mm) Width (mm) Height (mm)  
SN74HC240DBR  
SN74HC240DWR  
SN74HC240NSR  
SN74HC240PWR  
DB  
DW  
NS  
20  
20  
20  
20  
SITE 41  
SITE 41  
SITE 41  
SITE 41  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
33.0  
41.0  
41.0  
33.0  
PW  
Pack Materials-Page 2  
MECHANICAL DATA  
MLCC006B – OCTOBER 1996  
FK (S-CQCC-N**)  
LEADLESS CERAMIC CHIP CARRIER  
28 TERMINAL SHOWN  
A
B
NO. OF  
TERMINALS  
**  
18 17 16 15 14 13 12  
MIN  
MAX  
MIN  
MAX  
0.342  
(8,69)  
0.358  
(9,09)  
0.307  
(7,80)  
0.358  
(9,09)  
19  
20  
11  
10  
9
20  
28  
44  
52  
68  
84  
0.442  
(11,23)  
0.458  
(11,63)  
0.406  
(10,31)  
0.458  
(11,63)  
21  
B SQ  
22  
0.640  
(16,26)  
0.660  
(16,76)  
0.495  
(12,58)  
0.560  
(14,22)  
8
A SQ  
23  
0.739  
(18,78)  
0.761  
(19,32)  
0.495  
(12,58)  
0.560  
(14,22)  
7
24  
25  
6
0.938  
(23,83)  
0.962  
(24,43)  
0.850  
(21,6)  
0.858  
(21,8)  
5
1.141  
(28,99)  
1.165  
(29,59)  
1.047  
(26,6)  
1.063  
(27,0)  
26 27 28  
1
2
3
4
0.080 (2,03)  
0.064 (1,63)  
0.020 (0,51)  
0.010 (0,25)  
0.020 (0,51)  
0.010 (0,25)  
0.055 (1,40)  
0.045 (1,14)  
0.045 (1,14)  
0.035 (0,89)  
0.045 (1,14)  
0.035 (0,89)  
0.028 (0,71)  
0.022 (0,54)  
0.050 (1,27)  
4040140/D 10/96  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. This package can be hermetically sealed with a metal lid.  
D. The terminals are gold plated.  
E. Falls within JEDEC MS-004  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,  
improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.  
Customers should obtain the latest relevant information before placing orders and should verify that such information is current and  
complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s  
standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this  
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performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and  
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TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask  
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Amplifiers  
Data Converters  
DSP  
Applications  
Audio  
amplifier.ti.com  
dataconverter.ti.com  
dsp.ti.com  
www.ti.com/audio  
Automotive  
Broadband  
Digital Control  
Military  
www.ti.com/automotive  
www.ti.com/broadband  
www.ti.com/digitalcontrol  
www.ti.com/military  
Interface  
interface.ti.com  
logic.ti.com  
Logic  
Power Mgmt  
Microcontrollers  
RFID  
power.ti.com  
Optical Networking  
Security  
www.ti.com/opticalnetwork  
www.ti.com/security  
www.ti.com/telephony  
www.ti.com/video  
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www.ti-rfid.com  
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Copyright © 2007, Texas Instruments Incorporated  

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