SN54HC7002J [TI]
QUADRUPLE POSITIVE-NOR GATES WITH SCHMITT-TRIGGER INPUTS; 翻两番正或非门带施密特触发器输入型号: | SN54HC7002J |
厂家: | TEXAS INSTRUMENTS |
描述: | QUADRUPLE POSITIVE-NOR GATES WITH SCHMITT-TRIGGER INPUTS |
文件: | 总5页 (文件大小:91K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN54HC7002, SN74HC7002
QUADRUPLE POSITIVE-NOR GATES
WITH SCHMITT-TRIGGER INPUTS
SCLS033C – MARCH 1984 – REVISED MAY 1997
SN54HC7002 . . . J OR W PACKAGE
SN74HC7002 . . . D OR N PACKAGE
(TOP VIEW)
Operation From Very Slow Input
Transitions
Temperature-Compensated Threshold
Levels
1A
1B
V
CC
1
2
3
4
5
6
7
14
13
12
11
High Noise Immunity
4B
4A
4Y
Package Options Include Plastic
Small-Outline (D) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK),
and Standard Plastic (N) and Ceramic
(J) 300-mil DIPs
1Y
2A
2B
10 3B
9
8
2Y
3A
3Y
GND
description
SN54HC7002 . . . FK PACKAGE
(TOP VIEW)
In these devices, each circuit functions as a
quadruple NOR gate. They perform the Boolean
function Y = A • B or Y = A + B in positive logic.
However, because of the Schmitt action, the
inputs have different input threshold levels for
positive- and negative-going signals.
3
2
1
20 19
18
4A
NC
4Y
1Y
NC
2A
4
5
6
7
8
17
16
These circuits are temperature compensated and
can be triggered from the slowest of input ramps
and still give clean jitter-free output signals.
15 NC
14
9 10 11 12 13
NC
2B
3B
The SN54HC7002 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC7002 is characterized for
operation from –40°C to 85°C.
NC – No internal connection
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
B
X
H
L
H
X
L
L
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC7002, SN74HC7002
QUADRUPLE POSITIVE-NOR GATES
WITH SCHMITT-TRIGGER INPUTS
SCLS033C – MARCH 1984 – REVISED MAY 1997
†
logic symbol
1
1A
2
≥1
3
6
1Y
2Y
3Y
4Y
1B
4
2A
5
2B
9
3A
10
3B
12
4A
13
4B
8
11
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
logic diagram (positive logic)
A
Y
B
‡
absolute maximum ratings over operating free-air temperature range
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
CC
Output clamp current, I
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through V
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC7002, SN74HC7002
QUADRUPLE POSITIVE-NOR GATES
WITH SCHMITT-TRIGGER INPUTS
SCLS033C – MARCH 1984 – REVISED MAY 1997
recommended operating conditions
SN54HC7002
MIN NOM MAX
SN74HC7002
MIN NOM MAX
UNIT
V
V
Supply voltage
2
1.5
3.15
4.2
0
5
6
2
1.5
3.15
4.2
0
5
6
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
High-level input voltage
= 4.5 V
= 6 V
V
V
IH
= 2 V
0.5
1.35
1.8
0.5
1.35
1.8
V
IL
Low-level input voltage
= 4.5 V
= 6 V
0
0
0
0
V
V
Input voltage
0
V
0
V
V
V
I
CC
CC
Output voltage
0
V
CC
0
V
CC
85
O
T
A
Operating free-air temperature
–55
125
–40
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54HC7002 SN74HC7002
A
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
TYP
MAX
MIN
1.9
4.4
5.9
3.7
5.2
MAX
MIN
1.9
MAX
2 V
4.5 V
6 V
1.9 1.998
4.4 4.499
5.9 5.999
I
= –20 µA
4.4
OH
V
OH
V
OL
V = V or V
IH
5.9
V
I
IL
IL
I
I
= –4 mA
4.5 V
6 V
3.98
4.3
5.8
3.84
5.34
OH
= –5.2 mA
5.48
OH
2 V
0.002
0.001
0.001
0.17
0.15
1.2
0.1
0.1
0.1
0.26
0.26
1.5
3.15
4.2
1
0.1
0.1
0.1
0.1
I
= 20 µA
4.5 V
6 V
OL
V = V or V
0.1
0.1
V
I
IH
I
I
= 4 mA
4.5 V
6 V
0.4
0.33
0.33
1.5
OL
= 5.2 mA
0.4
OL
2 V
0.7
1.55
2.1
0.3
0.9
1.2
0.2
0.4
0.5
0.7
1.55
2.1
0.3
0.9
1.2
0.2
0.4
0.5
1.5
0.7
1.55
2.1
0.3
0.9
1.2
0.2
0.4
0.5
V
T+
V
T–
V
T+
4.5 V
6 V
2.5
3.15
4.2
3.15
4.2
V
V
V
3.3
2 V
0.6
1
1
4.5 V
6 V
1.6
2.45
3.2
1.2
2.1
2.5
±100
2
2.45
3.2
2.45
3.2
2
2 V
0.6
1.2
1.2
– V
4.5 V
6 V
0.9
2.1
2.1
T–
1.3
2.5
2.5
I
I
V = V
I
or 0
6 V
±0.1
±1000
40
±1000
20
nA
µA
pF
I
CC
CC
V = V
I
or 0,
I
O
= 0
6 V
CC
C
2 V to 6 V
3
10
10
10
i
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54HC7002, SN74HC7002
QUADRUPLE POSITIVE-NOR GATES
WITH SCHMITT-TRIGGER INPUTS
SCLS033C – MARCH 1984 – REVISED MAY 1997
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
60
SN54HC7002 SN74HC7002
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
CC
MIN
MAX
130
26
MIN
MAX
195
39
MIN
MAX
163
33
2 V
4.5 V
6 V
t
A or B
Y
18
ns
pd
t
14
22
33
28
2 V
28
75
110
22
95
t
Any
4.5 V
6 V
8
15
19
ns
6
13
19
16
operating characteristics, T = 25°C
A
PARAMETER
Power dissipation capacitance per gate
TEST CONDITIONS
TYP
UNIT
C
No load
20
pF
pd
PARAMETER MEASUREMENT INFORMATION
V
CC
From Output
Under Test
Test
Point
Input
50%
50%
0 V
C
= 50 pF
L
t
t
PLH
PHL
90%
(see Note A)
V
V
OH
In-Phase
Output
90%
t
50%
10%
50%
10%
LOAD CIRCUIT
OL
t
r
f
f
t
t
PLH
PHL
90%
V
CC
V
V
90%
t
90%
OH
Input
50%
10%
50%
10%
90%
t
Out-of-Phase
Output
50%
10%
50%
10%
0 V
OL
t
r
f
t
r
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
C includes probe and test-fixture capacitance.
L
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
D. and t are the same as t
t
.
pd
PLH
PHL
Figure 1. Load Circuit and Voltage Waveforms
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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