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SN54HCT245J-00 [TI]

HCT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, CDIP20;
SN54HCT245J-00
型号： SN54HCT245J-00
厂家： TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述：

HCT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, CDIP20

CD 输出元件 逻辑集成电路
文件： 总22页 (文件大小：1168K)
中文：  中文翻译
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SN54HCT245, SN74HCT245  
OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCLS020E – MARCH 1984 – REVISED AUGUST 2003  
SN54HCT245 . . . J OR W PACKAGE  
SN74HCT245 . . . DB, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
Operating Voltage Range of 4.5 V to 5.5 V  
High-Current 3-State Outputs Drive Bus  
Lines Directly or Up To 15 LSTTL Loads  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
DIR  
A1  
V
CC  
Low Power Consumption, 80-µA Max I  
Typical t = 14 ns  
pd  
6-mA Output Drive at 5 V  
CC  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
A2  
A3  
Low Input Current of 1 µA Max  
Inputs Are TTL-Voltage Compatible  
A4  
A5  
A6  
description/ordering information  
A7  
A8  
These octal bus transceivers are designed for  
asynchronous two-way communication between  
data buses. The control-function implementation  
minimizes external timing requirements.  
GND  
SN54HCT245 . . . FK PACKAGE  
(TOP VIEW)  
The ’HCT245 devices allow data transmission  
from the Abus to the B bus or from the B bus to the  
A bus, depending upon the logic level at the  
direction-control (DIR) input. The output-enable  
(OE) input can be used to disable the device so  
that the buses are effectively isolated.  
3
2
1
20 19  
18  
B1  
B2  
B3  
B4  
B5  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
17  
16  
15  
14  
9 10 11 12 13  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP – N  
Tube of 20  
Tube of 25  
Reel of 2000  
Reel of 2000  
Reel of 2000  
Tube of 70  
Reel of 2000  
Reel of 250  
Tube of 20  
Tube of 85  
Tube of 55  
SN74HCT245N  
SN74HCT245N  
SN74HCT245DW  
SN74HCT245DWR  
SN74HCT245NSR  
SN74HCT245DBR  
SN74HCT245PW  
SN74HCT245PWR  
SN74HCT245PWT  
SNJ54HCT245J  
SOIC – DW  
HCT245  
SOP – NS  
HCT245  
HT245  
–40°C to 85°C  
SSOP – DB  
TSSOP – PW  
HT245  
CDIP – J  
CFP – W  
LCCC – FK  
SNJ54HCT245J  
SNJ54HCT245W  
SNJ54HCT245FK  
–55°C to 125°C  
SNJ54HCT245W  
SNJ54HCT245FK  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
SN54HCT245, SN74HCT245  
OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCLS020E – MARCH 1984 – REVISED AUGUST 2003  
FUNCTION TABLE  
INPUTS  
OPERATION  
OE  
L
DIR  
L
B data to A bus  
A data to B bus  
Isolation  
L
H
H
X
logic diagram (positive logic)  
1
DIR  
19  
18  
OE  
B1  
2
A1  
To Seven Other Channels  
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
CC  
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
IK  
I
CC  
Output clamp current, I  
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
OK  
O O CC  
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 mA  
Continuous current through V  
O
O
CC  
CC  
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA  
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W  
JA  
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W  
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
stg  
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51-7.  
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
SN54HCT245, SN74HCT245  
OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCLS020E – MARCH 1984 – REVISED AUGUST 2003  
recommended operating conditions (see Note 3)  
SN54HCT245  
SN74HCT245  
MIN NOM MAX  
UNIT  
MIN NOM  
MAX  
V
V
V
V
V
Supply voltage  
4.5  
2
5
5.5  
4.5  
2
5
5.5  
V
V
CC  
IH  
IL  
I
High-level input voltage  
Low-level input voltage  
Input voltage  
V
V
= 4.5 V to 5.5 V  
= 4.5 V to 5.5 V  
CC  
0.8  
0.8  
V
CC  
0
0
V
V
0
0
V
V
V
CC  
CC  
Output voltage  
V
O
CC  
CC  
∆t/∆v  
Input transition rise/fall time  
Operating free-air temperature  
500  
125  
500  
85  
ns  
°C  
T
A
–55  
–40  
NOTE 3: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
= 25°C  
SN54HCT245 SN74HCT245  
A
PARAMETER  
TEST CONDITIONS  
V
UNIT  
V
CC  
MIN  
TYP  
MAX  
MIN  
4.4  
MAX  
MIN  
4.4  
MAX  
I
I
I
I
= –20 µA  
= –6 mA  
= 20 µA  
= 6 mA  
4.4 4.499  
OH  
OH  
OL  
OL  
V
V
V = V or V  
IH  
4.5 V  
4.5 V  
OH  
I
IL  
IL  
3.98  
4.3  
0.001  
0.17  
0.1  
3.7  
3.84  
0.1  
0.26  
100  
0.5  
8
0.1  
0.4  
0.1  
0.33  
1000  
5
V = V or V  
V
OL  
I
IH  
I
I
I
DIR or OE V = V  
or 0  
5.5 V  
5.5 V  
5.5 V  
1000  
10  
nA  
µA  
µA  
I
I
CC  
A or B  
V
O
= V or 0  
CC  
0.01  
OZ  
CC  
V = V  
I
or 0,  
I
O
= 0  
160  
80  
CC  
One input at 0.5 V or 2.4 V,  
Other inputs at 0 or V  
†
5.5 V  
1.4  
3
2.4  
10  
3
2.9  
10  
mA  
pF  
∆I  
CC  
CC  
4.5 V  
to 5.5 V  
‡
C
DIR or OE  
10  
i
†
‡
This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or V  
.
CC  
Parameter C does not apply to transceiver I/O ports.  
i
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
T
A
= 25°C  
TYP  
16  
SN54HCT245 SN74HCT245  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
V
UNIT  
ns  
CC  
MIN  
MAX  
22  
MIN  
MAX  
33  
MIN  
MAX  
28  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
t
t
t
t
A or B  
OE  
B or A  
A or B  
A or B  
A or B  
pd  
en  
dis  
t
14  
20  
30  
25  
25  
46  
69  
58  
ns  
22  
41  
62  
52  
26  
40  
60  
50  
ns  
OE  
23  
36  
54  
45  
9
12  
18  
15  
ns  
8
11  
16  
14  
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
SN54HCT245, SN74HCT245  
OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCLS020E – MARCH 1984 – REVISED AUGUST 2003  
switching characteristics over recommended operating free-air temperature range, C = 150 pF  
L
(unless otherwise noted) (see Figure 1)  
T
A
= 25°C  
TYP  
20  
SN54HCT245 SN74HCT245  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
V
UNIT  
ns  
CC  
MIN  
MAX  
30  
MIN  
MAX  
45  
MIN  
MAX  
38  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
4.5 V  
5.5 V  
t
pd  
t
en  
t
t
A or B  
OE  
B or A  
A or B  
A or B  
18  
27  
41  
34  
36  
59  
89  
74  
ns  
30  
53  
80  
67  
17  
42  
63  
53  
ns  
14  
38  
57  
48  
operating characteristics, T = 25°C  
A
PARAMETER  
TEST CONDITIONS  
TYP  
UNIT  
C
Power dissipation capacitance per transceiver  
No load  
40  
pF  
pd  
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
SN54HCT245, SN74HCT245  
OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCLS020E – MARCH 1984 – REVISED AUGUST 2003  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
PARAMETER  
R
C
S1  
S2  
L
L
50 pF  
or  
150 pF  
t
Open  
Closed  
Closed  
Open  
S1  
S2  
PZH  
Test  
Point  
t
t
1 kΩ  
1 kΩ  
en  
R
t
L
PZL  
From Output  
Under Test  
t
t
Open  
Closed  
Open  
PHZ  
PLZ  
50 pF  
C
dis  
L
Closed  
(see Note A)  
50 pF  
or  
150 pF  
t
or t  
––  
Open  
Open  
pd  
t
LOAD CIRCUIT  
Input  
3 V  
2.7 V  
2.7 V  
1.3 V  
0.3 V  
1.3 V  
0.3 V  
0 V  
t
t
r
f
VOLTAGE WAVEFORM  
INPUT RISE AND FALL TIMES  
3 V  
0 V  
Output  
Control  
(Low-Level  
Enabling)  
3 V  
0 V  
Input  
1.3 V  
1.3 V  
1.3 V  
1.3 V  
t
t
PLH  
PHL  
90%  
t
t
PLZ  
PZL  
V
V
OH  
In-Phase  
Output  
≈V  
CC  
Output  
Waveform 1  
(See Note B)  
90%  
t
1.3 V  
10%  
1.3 V  
10%  
1.3 V  
10%  
t
OL  
V
OL  
OH  
t
r
f
f
t
t
t
PHL  
90%  
PLH  
PZH  
PHZ  
Out-of-  
Phase  
Output  
V
V
OH  
V
Output  
Waveform 2  
(See Note B)  
90%  
t
90%  
1.3 V  
10%  
1.3 V  
10%  
1.3 V  
OL  
≈0 V  
t
r
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY AND OUTPUT RISE AND FALL TIMES  
NOTES: A.  
C includes probe and test-fixture capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following  
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.  
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
are the same as t  
are the same as t  
are the same as t  
.
dis  
PLZ  
PZL  
PLH  
PHZ  
PZH  
PHL  
.
en  
.
pd  
Figure 1. Load Circuit and Voltage Waveforms  
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
5962-8550601VRA  
ACTIVE  
CDIP  
CFP  
J
20  
20  
20  
20  
TBD  
TBD  
TBD  
A42  
Call TI  
N / A for Pkg Type  
N / A for Pkg Type  
N / A for Pkg Type  
-55 to 125  
5962-8550601VR  
A
SNV54HCT245J  
5962-8550601VSA  
85506012A  
ACTIVE  
ACTIVE  
W
25  
1
-55 to 125  
-55 to 125  
5962-8550601VS  
A
SNV54HCT245W  
LCCC  
FK  
POST-PLATE  
85506012A  
SNJ54HCT  
245FK  
8550601RA  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
CDIP  
CDIP  
CFP  
J
J
20  
20  
20  
20  
20  
20  
1
1
1
1
1
1
TBD  
TBD  
TBD  
TBD  
TBD  
A42  
A42  
N / A for Pkg Type  
N / A for Pkg Type  
N / A for Pkg Type  
N / A for Pkg Type  
N / A for Pkg Type  
N / A for Pkg Type  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
8550601RA  
SNJ54HCT245J  
JM38510/65553BRA  
JM38510/65553BSA  
M38510/65553BRA  
M38510/65553BSA  
SN54HCT245J  
JM38510/  
65553BRA  
W
J
Call TI  
A42  
JM38510/  
65553BSA  
CDIP  
CFP  
JM38510/  
65553BRA  
W
J
Call TI  
A42  
JM38510/  
65553BSA  
CDIP  
TBD  
TBD  
SN54HCT245J  
SN74HCT245DBLE  
SN74HCT245DBR  
OBSOLETE  
ACTIVE  
SSOP  
SSOP  
DB  
DB  
20  
20  
Call TI  
Call TI  
-40 to 85  
-40 to 85  
2000  
2000  
2000  
25  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-1-260C-UNLIM  
HT245  
SN74HCT245DBRE4  
SN74HCT245DBRG4  
SN74HCT245DW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SSOP  
SSOP  
SOIC  
SOIC  
SOIC  
DB  
DB  
20  
20  
20  
20  
20  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
HT245  
Green (RoHS  
& no Sb/Br)  
HT245  
DW  
DW  
DW  
Green (RoHS  
& no Sb/Br)  
HCT245  
HCT245  
HCT245  
SN74HCT245DWE4  
SN74HCT245DWG4  
25  
Green (RoHS  
& no Sb/Br)  
25  
Green (RoHS  
& no Sb/Br)  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
-40 to 85  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
SN74HCT245DWR  
SN74HCT245DWRE4  
SN74HCT245DWRG4  
SN74HCT245N  
ACTIVE  
SOIC  
SOIC  
SOIC  
PDIP  
DW  
20  
20  
20  
20  
2000  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
N / A for Pkg Type  
HCT245  
ACTIVE  
ACTIVE  
ACTIVE  
DW  
DW  
N
2000  
2000  
20  
Green (RoHS  
& no Sb/Br)  
-40 to 85  
HCT245  
Green (RoHS  
& no Sb/Br)  
-40 to 85  
HCT245  
Pb-Free  
(RoHS)  
-40 to 85  
SN74HCT245N  
SN74HCT245N3  
SN74HCT245NE4  
OBSOLETE  
ACTIVE  
PDIP  
PDIP  
N
N
20  
20  
TBD  
Call TI  
Call TI  
-40 to 85  
-40 to 85  
20  
2000  
2000  
2000  
70  
Pb-Free  
(RoHS)  
CU NIPDAU  
N / A for Pkg Type  
SN74HCT245N  
HCT245  
HCT245  
HCT245  
HT245  
SN74HCT245NSR  
SN74HCT245NSRE4  
SN74HCT245NSRG4  
SN74HCT245PW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SO  
SO  
NS  
NS  
NS  
PW  
PW  
PW  
20  
20  
20  
20  
20  
20  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
Green (RoHS  
& no Sb/Br)  
SO  
Green (RoHS  
& no Sb/Br)  
TSSOP  
TSSOP  
TSSOP  
Green (RoHS  
& no Sb/Br)  
SN74HCT245PWE4  
SN74HCT245PWG4  
70  
Green (RoHS  
& no Sb/Br)  
HT245  
70  
Green (RoHS  
& no Sb/Br)  
HT245  
SN74HCT245PWLE  
SN74HCT245PWR  
OBSOLETE  
ACTIVE  
TSSOP  
TSSOP  
PW  
PW  
20  
20  
TBD  
Call TI  
Call TI  
-40 to 85  
-40 to 85  
2000  
2000  
2000  
250  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
Level-1-260C-UNLIM  
HT245  
HT245  
HT245  
HT245  
HT245  
HT245  
SN74HCT245PWRE4  
SN74HCT245PWRG4  
SN74HCT245PWT  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
PW  
PW  
PW  
PW  
PW  
20  
20  
20  
20  
20  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
SN74HCT245PWTE4  
SN74HCT245PWTG4  
250  
Green (RoHS  
& no Sb/Br)  
250  
Green (RoHS  
& no Sb/Br)  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
SNJ54HCT245FK  
ACTIVE  
LCCC  
FK  
20  
1
TBD  
POST-PLATE  
N / A for Pkg Type  
-55 to 125  
85506012A  
SNJ54HCT  
245FK  
SNJ54HCT245J  
SNJ54HCT245W  
ACTIVE  
ACTIVE  
CDIP  
CFP  
J
20  
20  
1
1
TBD  
TBD  
A42  
N / A for Pkg Type  
N / A for Pkg Type  
-55 to 125  
-55 to 125  
8550601RA  
SNJ54HCT245J  
W
Call TI  
SNJ54HCT245W  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 3  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Sep-2013  
OTHER QUALIFIED VERSIONS OF SN54HCT245, SN54HCT245-SP, SN74HCT245 :  
Catalog: SN74HCT245, SN54HCT245  
•
Military: SN54HCT245  
•
Space: SN54HCT245-SP  
•
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
•
Military - QML certified for Military and Defense Applications  
•
Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application  
•
Addendum-Page 4  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
1-Jul-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
SN74HCT245DBR  
SN74HCT245DWR  
SN74HCT245NSR  
SN74HCT245PWR  
SN74HCT245PWT  
SSOP  
SOIC  
DB  
DW  
NS  
20  
20  
20  
20  
20  
2000  
2000  
2000  
2000  
250  
330.0  
330.0  
330.0  
330.0  
330.0  
16.4  
24.4  
24.4  
16.4  
16.4  
8.2  
10.8  
8.2  
7.5  
13.3  
13.0  
7.1  
2.5  
2.7  
2.5  
1.6  
1.6  
12.0  
12.0  
12.0  
8.0  
16.0  
24.0  
24.0  
16.0  
16.0  
Q1  
Q1  
Q1  
Q1  
Q1  
SO  
TSSOP  
TSSOP  
PW  
PW  
6.95  
6.95  
7.1  
8.0  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
1-Jul-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN74HCT245DBR  
SN74HCT245DWR  
SN74HCT245NSR  
SN74HCT245PWR  
SN74HCT245PWT  
SSOP  
SOIC  
DB  
DW  
NS  
20  
20  
20  
20  
20  
2000  
2000  
2000  
2000  
250  
367.0  
367.0  
367.0  
364.0  
367.0  
367.0  
367.0  
367.0  
364.0  
367.0  
38.0  
45.0  
45.0  
27.0  
38.0  
SO  
TSSOP  
TSSOP  
PW  
PW  
Pack Materials-Page 2  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°–ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest  
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complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale  
supplied at the time of order acknowledgment.  
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary  
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily  
performed.  
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and  
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Applications  
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amplifier.ti.com  
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