SN54HCT374_07 [TI]
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS; 八路边沿触发D型触发器具有三态输出型号: | SN54HCT374_07 |
厂家: | TEXAS INSTRUMENTS |
描述: | OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
文件: | 总19页 (文件大小:587K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢃ
ꢉ
ꢀ
ꢁ
ꢈ
ꢃ
ꢊ ꢅꢆꢋꢌ ꢍꢎꢏ ꢍ ꢐꢆꢑ ꢒꢏ ꢏꢍ ꢑꢍꢎ ꢎꢐꢆ ꢓꢔ ꢍ ꢕ ꢌꢒ ꢔ ꢐꢕ ꢌꢊ ꢔ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢃ
ꢀ
ꢀ
ꢖ ꢒꢆ ꢄ ꢇ ꢐꢀꢆꢋꢆ ꢍ ꢊ ꢗꢆ ꢔꢗ ꢆ
SCLS005D − MARCH 1984 − REVISED AUGUST 2003
SN54HCT374 . . . J OR W PACKAGE
SN74HCT374 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
D
D
Operating Voltage Range of 4.5 V to 5.5 V
High-Current 3-State True Outputs Can
Drive Up To 15 LSTTL Loads
D
D
D
D
D
D
D
Low Power Consumption, 80-µA Max I
Typical t = 22 ns
pd
6-mA Output Drive at 5 V
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
V
CC
8Q
8D
1
2
3
4
5
6
7
8
9
20
19
18
CC
17 7D
16 7Q
15 6Q
14
Low Input Current of 1 µA Max
Inputs Are TTL-Voltage Compatible
Eight D-Type Flip-Flops in a Single Package
Full Parallel Access for Loading
6D
13 5D
12 5Q
11 CLK
GND 10
description/ordering information
These 8-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
SN54HCT374 . . . FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18
8D
7D
7Q
2D
2Q
3Q
3D
4D
4
5
6
7
8
17
16
The eight flip-flops of the ’HCT374 devices are
edge-triggered D-type flip-flops. On the positive
transition of the clock (CLK) input, the Q outputs
are set to the logic levels that were set up at the
data (D) inputs.
15 6Q
14
9 10 11 12 13
6D
An output-enable (OE) input places the eight
outputs in either a normal logic state (high or low
logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without interface or pullup components.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
Tube of 20
Tube of 25
Reel of 2000
Reel of 2000
Reel of 2000
Tube of 70
Reel of 2000
Reel of 250
Tube of 20
Tube of 85
Tube of 55
SN74HCT374N
SN74HCT374N
SN74HCT374DW
SN74HCT374DWR
SN74HCT374NSR
SN74HCT374DBR
SN74HCT374PW
SN74HCT374PWR
SN74HCT374PWT
SNJ54HCT374J
SOIC − DW
HCT374
SOP − NS
HCT374
HT374
−40°C to 85°C
SSOP − DB
TSSOP − PW
HT374
CDIP − J
CFP − W
LCCC − FK
SNJ54HCT374J
SNJ54HCT374W
SNJ54HCT374FK
SNJ54HCT374W
SNJ54HCT374FK
−55°C to 125°C
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ꢔ
ꢔ
ꢑ
ꢊ
ꢧ
ꢎ
ꢢ
ꢞ
ꢗ
ꢅ
ꢠ
ꢆ
ꢡ
ꢫ
ꢒ
ꢛ
ꢊ
ꢙ
ꢜ
ꢁ
ꢚ
ꢎ
ꢋ
ꢆ
ꢋ
ꢘ
ꢙ
ꢣ
ꢢ
ꢚ
ꢛ
ꢡ
ꢡ
ꢜ
ꢝ
ꢞ
ꢞ
ꢙ
ꢟ
ꢟ
ꢘ
ꢘ
ꢤ
ꢛ
ꢛ
ꢜ
ꢙ
ꢙ
ꢛ
ꢘ
ꢠ
ꢠ
ꢤ
ꢠ
ꢡ
ꢢ
ꢜ
ꢜ
ꢣ
ꢣ
ꢙ
ꢟ
ꢞ
ꢝ
ꢠ
ꢠ
ꢠ
ꢙ
ꢛ
ꢚ
ꢤ
ꢢ
ꢥ
ꢠ
ꢠ
ꢦ
ꢘ
ꢡ
ꢞ
ꢠ
ꢟ
ꢘ
ꢟ
ꢬ
ꢛ
ꢜ
ꢙ
ꢢ
ꢧ
ꢞ
ꢙ
ꢧ
ꢟ
ꢟ
ꢣ
ꢠ
ꢣ
ꢨ
Copyright 2003, Texas Instruments Incorporated
ꢊ ꢙ ꢤ ꢜ ꢛꢧ ꢢꢡ ꢟꢠ ꢡꢛ ꢝꢤ ꢦꢘ ꢞꢙ ꢟ ꢟꢛ ꢮꢒ ꢌꢐ ꢔꢑ ꢕ ꢐꢇꢯꢂ ꢇꢂꢉ ꢞꢦꢦ ꢤꢞ ꢜ ꢞ ꢝꢣ ꢟꢣꢜ ꢠ ꢞ ꢜ ꢣ ꢟꢣ ꢠꢟꢣ ꢧ
ꢜ
ꢛ
ꢡ
ꢟ
ꢛ
ꢜ
ꢝ
ꢟ
ꢛ
ꢠ
ꢤ
ꢘ
ꢚ
ꢘ
ꢡ
ꢣ
ꢜ
ꢟ
ꢩ
ꢟ
ꢣ
ꢜ
ꢛ
ꢚ
ꢆ
ꢣ
ꢪ
ꢞ
ꢒ
ꢙ
ꢝ
ꢣ
ꢠ
ꢟ
ꢞ
ꢙ
ꢧ
ꢜ
ꢧ
ꢞ
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ
ꢜ
ꢞ
ꢙ
ꢟ
ꢬ
ꢨ
ꢔ
ꢜ
ꢛ
ꢧ
ꢟ
ꢘ
ꢛ
ꢡ
ꢣ
ꢠ
ꢘ
ꢙ
ꢭ
ꢧ
ꢛ
ꢣ
ꢛ
ꢟ
ꢙ
ꢣ
ꢡ
ꢣ
ꢠ
ꢞ
ꢜ
ꢘ
ꢦ
ꢘ
ꢙ
ꢡ
ꢦ
ꢢ
ꢢ ꢙꢦ ꢣꢠꢠ ꢛ ꢟꢩꢣ ꢜ ꢫꢘ ꢠꢣ ꢙ ꢛꢟꢣ ꢧꢨ ꢊ ꢙ ꢞꢦ ꢦ ꢛ ꢟꢩꢣ ꢜ ꢤꢜ ꢛ ꢧꢢꢡ ꢟꢠ ꢉ ꢤꢜ ꢛ ꢧꢢꢡ ꢟꢘꢛ ꢙ
ꢟ
ꢤ
ꢜ
ꢛ
ꢡ
ꢣ
ꢠ
ꢠ
ꢘ
ꢙ
ꢭ
ꢧ
ꢛ
ꢣ
ꢠ
ꢙ
ꢛ
ꢟ
ꢙ
ꢣ
ꢡ
ꢣ
ꢠ
ꢠ
ꢞ
ꢜ
ꢘ
ꢦ
ꢬ
ꢘ
ꢙ
ꢡ
ꢦ
ꢢ
ꢧ
ꢣ
ꢟ
ꢣ
ꢠ
ꢘ
ꢙ
ꢭ
ꢛ
ꢚ
ꢞ
ꢦ
ꢦ
ꢤ
ꢞ
ꢜ
ꢞ
ꢝ
ꢣ
ꢟ
ꢣ
ꢜ
ꢠ
ꢨ
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢃꢉ ꢀꢁꢈ ꢃ ꢄꢅ ꢆꢇ ꢈ ꢃ
ꢊꢅ ꢆꢋ ꢌ ꢍꢎ ꢏꢍꢐ ꢆꢑ ꢒꢏ ꢏꢍ ꢑꢍ ꢎ ꢎꢐꢆ ꢓ ꢔꢍ ꢕꢌ ꢒ ꢔꢐꢕ ꢌ ꢊ ꢔꢀ
ꢖꢒ ꢆ ꢄ ꢇ ꢐꢀꢆꢋꢆ ꢍ ꢊꢗꢆ ꢔ ꢗꢆꢀ
SCLS005D − MARCH 1984 − REVISED AUGUST 2003
description/ordering information (continued)
OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
Q
OE
L
CLK
D
H
L
↑
↑
H
L
L
L
H or L
X
X
X
Q
0
H
Z
logic diagram (positive logic)
1
OE
11
CLK
C1
1D
2
1Q
3
1D
To Seven Other Channels
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
CC
Output clamp current, I
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA
Package thermal impedance, θ (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
JA
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢃ
ꢉ
ꢀ
ꢁ
ꢈ
ꢃ
ꢊ ꢅꢆꢋꢌ ꢍꢎꢏ ꢍ ꢐꢆꢑ ꢒꢏ ꢏꢍ ꢑꢍꢎ ꢎꢐꢆ ꢓꢔ ꢍ ꢕ ꢌꢒ ꢔ ꢐꢕ ꢌꢊ ꢔ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢃ
ꢀ
ꢀ
ꢖ
ꢒ
ꢆ
ꢄ
ꢇ
ꢐ
ꢀ
ꢆ
ꢋ
ꢆ
ꢍ
ꢊ
ꢗ
ꢆ
ꢔ
ꢗ
ꢆ
SCLS005D − MARCH 1984 − REVISED AUGUST 2003
recommended operating conditions (see Note 3)
SN54HCT374
SN74HCT374
MIN NOM MAX
UNIT
MIN NOM
MAX
V
V
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
IH
IL
I
High-level input voltage
Low-level input voltage
Input voltage
V
V
= 4.5 V to 5.5 V
= 4.5 V to 5.5 V
CC
0.8
0.8
V
CC
0
0
V
V
0
0
V
V
V
CC
CC
Output voltage
V
O
CC
CC
∆t/∆v
Input transition rise/fall time
Operating free-air temperature
500
125
500
85
ns
°C
T
A
−55
−40
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54HCT374 SN74HCT374
A
PARAMETER
TEST CONDITIONS
V
UNIT
V
CC
MIN
TYP
MAX
MIN
4.4
MAX
MIN
4.4
MAX
I
I
I
I
= −20 µA
= −6 mA
= 20 µA
= 6 mA
4.4 4.499
OH
OH
OL
OL
V
V = V or V
IH
4.5 V
4.5 V
OH
OL
I
IL
3.98
4.3
0.001
0.17
0.1
3.7
3.84
0.1
0.26
100
0.5
8
0.1
0.4
0.1
0.33
1000
5
V
V = V or V
V
I
IH
IL
I
I
I
V = V
I
or 0
5.5 V
5.5 V
5.5 V
1000
10
nA
µA
µA
I
CC
V
= V
or 0
or 0,
0.01
OZ
CC
O CC
V = V
I
I
O
= 0
160
80
CC
One input at 0.5 V or 2.4 V,
Other inputs at 0 or V
†
5.5 V
1.4
3
2.4
10
3
2.9
10
mA
pF
∆I
CC
CC
4.5 V
to 5.5 V
C
10
i
†
This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or V
.
CC
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
T
= 25°C
SN54HCT374 SN74HCT374
A
V
UNIT
MHz
ns
CC
MIN
MAX
31
MIN
MAX
21
MIN
MAX
25
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
f
t
t
t
Clock frequency
clock
36
23
28
16
14
20
17
10
10
24
22
30
27
10
10
20
18
25
23
10
10
Pulse duration, CLK high or low
w
ns
Setup time, data before CLK↑
Hold time, data after CLK↑
su
h
ns
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢃꢉ ꢀꢁꢈ ꢃ ꢄꢅ ꢆꢇ ꢈ ꢃ
ꢊꢅ ꢆꢋ ꢌ ꢍꢎ ꢏꢍꢐ ꢆꢑ ꢒꢏ ꢏꢍ ꢑꢍ ꢎ ꢎꢐꢆ ꢓ ꢔꢍ ꢕꢌ ꢒ ꢔꢐꢕ ꢌ ꢊ ꢔꢀ
ꢖꢒ ꢆ ꢄ ꢇ ꢐꢀꢆꢋꢆ ꢍ ꢊꢗꢆ ꢔ ꢗꢆꢀ
SCLS005D − MARCH 1984 − REVISED AUGUST 2003
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
36
SN54HCT374 SN74HCT374
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
MHz
ns
CC
MIN
31
MAX
MIN
21
MAX
MIN
25
MAX
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
f
t
t
t
t
max
pd
en
dis
t
36
40
23
28
30
36
32
30
27
30
27
12
11
54
49
45
41
45
41
18
16
45
41
38
34
38
34
15
14
CLK
OE
Any Q
Any Q
Any Q
Any Q
25
26
ns
23
23
ns
OE
22
10
ns
9
switching characteristics over recommended operating free-air temperature range, C = 150 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
40
SN54HCT374 SN74HCT374
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
ns
CC
MIN
MAX
46
MIN
MAX
69
MIN
MAX
58
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
t
pd
t
en
t
t
CLK
OE
Any Q
Any Q
Any Q
35
41
62
52
34
40
60
50
ns
29
36
54
45
18
42
63
53
ns
16
38
57
48
operating characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
TYP
UNIT
C
Power dissipation capacitance per flip-flop
No load
85
pF
pd
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢃ
ꢉ
ꢀ
ꢁ
ꢈ
ꢃ
ꢊ ꢅꢆꢋꢌ ꢍꢎꢏ ꢍ ꢐꢆꢑ ꢒꢏ ꢏꢍ ꢑꢍꢎ ꢎꢐꢆ ꢓꢔ ꢍ ꢕ ꢌꢒ ꢔ ꢐꢕ ꢌꢊ ꢔ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢃ
ꢀ
ꢀ
ꢖ ꢒꢆ ꢄ ꢇ ꢐꢀꢆꢋꢆ ꢍ ꢊ ꢗꢆ ꢔ ꢗꢆ
SCLS005D − MARCH 1984 − REVISED AUGUST 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
PARAMETER
R
C
S1
S2
L
L
50 pF
or
150 pF
t
Open
Closed
Closed
Open
PZH
S1
S2
Test
Point
t
t
1 kΩ
1 kΩ
en
t
t
t
R
PZL
PHZ
PLZ
L
From Output
Under Test
Open
Closed
Open
50 pF
dis
C
L
Closed
(see Note A)
50 pF
or
150 pF
t
or t
−−
Open
Open
pd
t
LOAD CIRCUIT
3 V
Reference
Input
1.3 V
3 V
0 V
High-Level
0 V
1.3 V
1.3 V
1.3 V
Pulse
t
t
h
su
3 V
0 V
t
Data
Input
w
2.7 V
2.7 V
1.3 V
0.3 V
1.3 V
0.3 V
3 V
0 V
Low-Level
Pulse
1.3 V
t
t
r
f
VOLTAGE WAVEFORMS
SETUP AND HOLD AND INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
Output
Control
(Low-Level
Enabling)
3 V
0 V
3 V
0 V
Input
1.3 V
1.3 V
1.3 V
1.3 V
t
t
PLH
PHL
90%
t
t
PLZ
PZL
V
V
OH
≈V
CC
In-Phase
Output
Output
Waveform 1
(See Note B)
90%
t
1.3 V
10%
1.3 V
10%
1.3 V
1.3 V
10%
t
OL
V
OL
OH
t
r
f
f
t
t
t
PHL
90%
PLH
PZH
PHZ
Out-of-
Phase
Output
V
V
OH
V
Output
Waveform 2
(See Note B)
90%
t
90%
1.3 V
10%
1.3 V
10%
OL
≈0 V
t
r
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT RISE AND FALL TIMES
NOTES: A.
C includes probe and test-fixture capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
O
r
f
D. For clock inputs, f
is measured when the input duty cycle is 50%.
E. The outputs are measured one at a time with one input transition per measurement.
max
F.
G.
H.
t
t
t
and t
and t
and t
are the same as t
.
dis
PLZ
PZL
PLH
PHZ
PZH
PHL
are the same as t
.
en
are the same as t .
pd
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
10-May-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
CDIP
CFP
Drawing
5962-8550701VRA
5962-8550701VSA
85507012A
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
J
W
FK
J
20
20
20
20
20
20
20
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
LCCC
CDIP
CDIP
CDIP
SSOP
POST-PLATE N / A for Pkg Type
8550701RA
A42 SNPB
A42 SNPB
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
JM38510/65652BRA
SN54HCT374J
J
J
SN74HCT374DBR
DB
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HCT374DBRE4
SN74HCT374DW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
DB
DW
DW
DW
DW
DW
DW
N
20
20
20
20
20
20
20
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HCT374DWE4
SN74HCT374DWG4
SN74HCT374DWR
SN74HCT374DWRE4
SN74HCT374DWRG4
SN74HCT374N
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74HCT374N3
SN74HCT374NE4
OBSOLETE
ACTIVE
PDIP
PDIP
N
N
20
20
TBD
Call TI
Call TI
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74HCT374NSR
SN74HCT374NSRE4
SN74HCT374PW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
NS
NS
20
20
20
20
20
20
20
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
PW
PW
PW
PW
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HCT374PWE4
SN74HCT374PWR
SN74HCT374PWRE4
SN74HCT374PWT
SN74HCT374PWTE4
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SNJ54HCT374FK
SNJ54HCT374J
ACTIVE
ACTIVE
LCCC
CDIP
FK
J
20
20
1
1
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-May-2007
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-May-2007
TAPE AND REEL INFORMATION
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-May-2007
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
330
330
330
330
(mm)
16
SN74HCT374DBR
SN74HCT374DWR
SN74HCT374DWR
SN74HCT374NSR
SN74HCT374PWR
DB
DW
DW
NS
20
20
20
20
20
MLA
MLA
TAI
8.2
10.8
10.8
8.2
7.5
13.0
13.1
13.0
7.1
2.5
2.7
12
12
12
12
8
16
24
24
24
16
Q1
Q1
Q1
Q1
Q1
24
24
2.65
2.5
MLA
MLA
24
PW
16
6.95
1.6
TAPE AND REEL BOX INFORMATION
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
SN74HCT374DBR
SN74HCT374DWR
SN74HCT374DWR
SN74HCT374NSR
SN74HCT374PWR
DB
DW
DW
NS
20
20
20
20
20
MLA
MLA
TAI
342.9
333.2
346.0
333.2
342.9
336.6
333.2
346.0
333.2
336.6
28.58
31.75
41.0
MLA
MLA
31.75
28.58
PW
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-May-2007
Pack Materials-Page 3
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,
improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
Customers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s
standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily
performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should
provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask
work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services
are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such
products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under
the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is
accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an
unfair and deceptive business practice. TI is not responsible or liable for such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service
voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business
practice. TI is not responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would
reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement
specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications
of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related
requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any
applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its
representatives against any damages arising out of the use of TI products in such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is
solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in
connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products
are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any
non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Data Converters
DSP
Applications
Audio
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/audio
Automotive
Broadband
Digital Control
Military
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
interface.ti.com
logic.ti.com
Logic
Power Mgmt
Microcontrollers
RFID
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lpw
Telephony
Low Power
Wireless
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2007, Texas Instruments Incorporated
相关型号:
SN54HCT377FKR
HCT SERIES, OCTAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CQCC20, CERAMIC, LCC-20
TI
SN54HCT377WR
HCT SERIES, OCTAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDFP20, CERAMIC, FP-20
TI
©2020 ICPDF网 联系我们和版权申明