SN54LV06AW [TI]
LV/LV-A/LVX/H SERIES, HEX 1-INPUT INVERT GATE, CDFP14, CERAMIC, DFP-14;
| 型号： | SN54LV06AW |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LV/LV-A/LVX/H SERIES, HEX 1-INPUT INVERT GATE, CDFP14, CERAMIC, DFP-14 CD 输入元件 逻辑集成电路 |
| 文件： | 总6页 (文件大小：103K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54LV06A, SN74LV06A
HEX INVERTER BUFFERS/DRIVERS
WITH OPEN-DRAIN OUTPUTS
SCES336C – MAY 2000 – REVISED AUGUST 2000
SN54LV06A . . . J OR W PACKAGE
SN74LV06A . . . D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
EPIC (Enhanced-Performance Implanted
CMOS) Process
2-V to 5.5-V V
Operation
CC
1A
1Y
2A
2Y
3A
V
1
2
3
4
5
6
7
14
13
12
11
10
9
Typical V
OLP
(Output Ground Bounce)
= 3.3 V, T = 25°C
CC
6A
6Y
5A
5Y
4A
4Y
<0.8 V at V
CC
A
Typical V
>2.3 V at V
(Output V
= 3.3 V, T = 25°C
Undershoot)
OHV
CC
OH
A
Outputs Are Disabled During Power Up and
Power Down With Inputs Tied to GND
3Y
GND
8
Support Mixed-Mode Voltage Operation on
All Ports
SN54LV06A . . . FK PACKAGE
(TOP VIEW)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
3
2
1 20 19
18
6Y
NC
5A
NC
5Y
2A
NC
2Y
4
5
6
7
8
– 1000-V Charged-Device Model (C101)
17
16
15
14
Package Options Include Plastic
Small-Outline (D, NS), Shrink Small-Outline
(DB), Thin Very Small-Outline (DGV), Thin
Shrink Small-Outline (PW), and Ceramic
Flat (W) Packages, Ceramic Chip Carriers
(FK), and DIPs (J)
NC
3A
9 10 11 12 13
description
NC – No internal connection
These hex inverter buffers/drivers are designed
for 2-V to 5.5-V V operation.
CC
The ’LV06A devices perform the Boolean function Y = A in positive logic.
The open-drain outputs require pullup resistors to perform correctly and can be connected to other open-drain
outputs to implement active-low wired-OR or active-high wired-AND functions.
These devices are fully specified for partial-power-down applications using I . The I circuitry disables the
off
off
outputs, preventing damaging current backflow through the devices when they are powered down.
The SN54LV06A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LV06A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each buffer/driver)
INPUT
A
OUTPUT
Y
H
L
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments.
Copyright 2000, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LV06A, SN74LV06A
HEX INVERTER BUFFERS/DRIVERS
WITH OPEN-DRAIN OUTPUTS
SCES336C – MAY 2000 – REVISED AUGUST 2000
†
logic symbol
2
1
1A
3
1
1Y
4
6
8
2A
5
2Y
3Y
4Y
3A
9
4A
11
10
12
5A
13
5Y
6Y
6A
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, DGV, J, NS, PW, and W packages.
logic diagram, each inverter (positive logic)
A
Y
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Output voltage range, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
O
CC
Voltage range applied to any output in the power-off state, V (see Note 1) . . . . . . . . . . . . . . . . –0.5 V to 7 V
O
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA
IK
I
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –35 mA
Continuous current through V
Package thermal impedance, θ (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LV06A, SN74LV06A
HEX INVERTER BUFFERS/DRIVERS
WITH OPEN-DRAIN OUTPUTS
SCES336C – MAY 2000 – REVISED AUGUST 2000
recommended operating conditions (see Note 4)
SN54LV06A
MIN MAX
SN74LV06A
MIN MAX
UNIT
V
V
Supply voltage
2
5.5
2
5.5
V
CC
V
V
V
V
V
V
V
V
= 2 V
1.5
1.5
CC
CC
CC
CC
CC
CC
CC
CC
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2 V
V
CC
V
CC
V
CC
× 0.7
V
CC
V
CC
V
CC
× 0.7
High-level input voltage
V
V
IH
× 0.7
× 0.7
× 0.7
× 0.7
0.5
× 0.3
× 0.3
× 0.3
5.5
5.5
50
0.5
× 0.3
× 0.3
× 0.3
5.5
5.5
50
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
V
V
CC
CC
CC
CC
CC
CC
V
IL
Low-level input voltage
V
V
V
V
V
V
Input voltage
0
0
0
0
V
V
I
Output voltage
O
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
µA
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
2
2
I
Low-level output current
OL
8
8
mA
16
16
0
0
0
200
100
20
0
0
0
200
100
20
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
T
A
–55
125
–40
85
°C
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LV06A
SN74LV06A
PARAMETER
TEST CONDITIONS
UNIT
V
CC
MIN
TYP
MAX
0.1
0.4
0.44
0.55
±1
MIN
TYP
MAX
0.1
0.4
0.44
0.55
±1
I
I
I
I
= 50 µA
2 V to 5.5 V
2.3 V
OL
OL
OL
OL
= 2 mA
= 8 mA
= 16 mA
V
OL
V
3 V
4.5 V
I
I
I
I
V = 5.5 V or GND
0 V to 5.5 V
5.5 V
µA
µA
µA
µA
pF
I
I
V = V
,
V
= V
±2.5
20
±2.5
20
OH
CC
off
I
IL
OH
= 0
CC
V = V
or GND,
I
O
5.5 V
I
CC
V or V = 0 to 5.5 V
0 V
5
5
I
O
C
V = V
or GND
3.3 V
1.6
1.6
i
I
CC
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LV06A, SN74LV06A
HEX INVERTER BUFFERS/DRIVERS
WITH OPEN-DRAIN OUTPUTS
SCES336C – MAY 2000 – REVISED AUGUST 2000
switching characteristics over recommended operating free-air temperature range,
V
= 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
5.4
SN54LV06A
SN74LV06A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
ns
MIN
MAX
10.4
10.4
15.2
MIN
1
MAX
13
MIN
1
MAX
13
t
A
A
A
A
Y
Y
Y
Y
PLH
C
C
= 15 pF
= 50 pF
L
L
t
7.2
1
13
1
13
PHL
t
9.7
1
18
1
18
PLH
ns
t
9.3
15.2
1
18
1
18
PHL
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
4.1
SN54LV06A
SN74LV06A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
ns
MIN
MAX
7.1
MIN
1
MAX
8.5
8.5
12
MIN
1
MAX
8.5
8.5
12
t
A
A
A
A
Y
Y
Y
Y
PLH
C
C
= 15 pF
= 50 pF
L
L
t
4.9
7.1
1
1
PHL
t
7.1
10.6
1
1
PLH
ns
t
6.4
10.6
1
12
1
12
PHL
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating free-air temperature range,
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
3
SN54LV06A
SN74LV06A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
ns
MIN
MAX
5.5
MIN
1
MAX
6.5
MIN
1
MAX
6.5
t
A
A
A
A
Y
Y
Y
Y
PLH
C
C
= 15 pF
= 50 pF
L
L
t
3.3
5.5
1
6.5
1
6.5
PHL
t
4.8
7.5
1
8.5
1
8.5
PLH
ns
t
4.4
7.5
1
8.5
1
8.5
PHL
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
noise characteristics, V
= 3.3 V, C = 50 pF, T = 25°C (see Note 5)
CC
L
A
SN74LV06A
PARAMETER
UNIT
MIN
TYP
0.5
MAX
0.8
V
V
V
V
V
Quiet output, maximum dynamic V
Quiet output, minimum dynamic V
V
V
V
V
V
OL(P)
OL(V)
OH(V)
IH(D)
IL(D)
OL
–0.1
3.3
–0.8
OL
Quiet output, minimum dynamic V
High-level dynamic input voltage
Low-level dynamic input voltage
OH
2.31
0.99
NOTE 5: Characteristics are for surface-mount packages only.
operating characteristics, T = 25°C
A
3.3 V
5 V
2.6
4.7
C
Power dissipation capacitance
C
= 50 pF,
L
f = 10 MHz
pF
pd
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LV06A, SN74LV06A
HEX INVERTER BUFFERS/DRIVERS
WITH OPEN-DRAIN OUTPUTS
SCES336C – MAY 2000 – REVISED AUGUST 2000
PARAMETER MEASUREMENT INFORMATION
V
CC
V
CC
R
= 1 kΩ
50% V
50% V
Input
L
CC
CC
t
0 V
From Output
Under Test
Test
Point
t
PHL
PLH
≈V
C
CC
L
50% V
(see Note A)
Output
CC
V
OL
+ 0.3 V
V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
LOAD CIRCUIT FOR
OPEN-DRAIN OUTPUTS
NOTES: A.
C
includes probe and jig capacitance.
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 2000, Texas Instruments Incorporated
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