SN54LV125AFK [TI]
QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS; 具有三态输出翻两番总线缓冲器GATES
| 型号： | SN54LV125AFK |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS |
| 文件： | 总17页 (文件大小：512K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢇ ꢂ ꢈꢉ ꢀꢁꢊ ꢃꢄꢅ ꢆꢇ ꢂꢈ
ꢋ ꢌꢈꢍꢎ ꢌꢏꢄ ꢐ ꢑꢌꢀ ꢑꢌꢒ ꢒ ꢐꢎ ꢓ ꢈꢔꢐ ꢀ
ꢕ ꢖꢔ ꢗ ꢘ ꢙꢀꢔꢈꢔ ꢐ ꢚ ꢌꢔ ꢏꢌ ꢔꢀ
SCES124L − DECEMBER 1997 − REVISED APRIL 2005
D
D
D
D
D
2-V to 5.5-V V
Operation
D
D
D
I
Supports Partial-Power-Down Mode
CC
off
Operation
Max t of 6 ns at 5 V
pd
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Typical V
<0.8 V at V
(Output Ground Bounce)
OLP
CC
= 3.3 V, T = 25°C
A
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
Typical V
>2.3 V at V
(Output V
Undershoot)
OHV
CC
OH
= 3.3 V, T = 25°C
A
Support Mixed-Mode Voltage Operation on
All Ports
− 1000-V Charged-Device Model (C101)
SN54LV125A . . . J OR W PACKAGE
SN74LV125A . . . D, DB, DGV, N, NS,
OR PW PACKAGE
SN74LV125A . . . RGY PACKAGE
(TOP VIEW)
SN54LV125A . . . FK PACKAGE
(TOP VIEW)
(TOP VIEW)
1
14
3
2
1
20 19
18
1OE
1A
V
CC
13 4OE
1
2
3
4
5
6
7
14
4A
NC
4Y
1Y
NC
4
5
6
7
8
1A
1Y
13 4OE
12 4A
2
3
4
5
6
17
16
12
11
10
9
1Y
4A
2OE
NC
11
10
9
2OE
2A
4Y
2OE
2A
4Y
15 NC
14
9 10 11 12 13
3OE
3A
3OE
3A
3OE
2A
2Y
2Y
7
8
8
GND
3Y
NC − No internal connection
description/ordering information
The ‘LV125A quadruple bus buffer gates are designed for 2-V to 5.5-V V
operation.
CC
These devices feature independent line drivers with 3-state outputs. Each output is disabled when the
associated output-enable (OE) input is high.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
Tube of 25
SN74LV125AN
SN74LV125AN
LV125A
QFN − RGY
Reel of 1000
Tube of 50
SN74LV125ARGYR
SN74LV125AD
SOIC − D
LV125A
Reel of 2500
Reel of 2000
Reel of 2000
Tube of 90
SN74LV125ADR
SN74LV125ANSR
SN74LV125ADBR
SN74LV125APW
SN74LV125APWR
SN74LV125APWT
SN74LV125ADGVR
SNJ54LV125AJ
SOP − NS
74LV125A
LV125A
−40°C to 85°C
SSOP − DB
Reel of 2000
Reel of 250
Reel of 2000
Tube of 25
TSSOP − PW
LV125A
TVSOP − DGV
CDIP − J
LV125A
SNJ54LV125AJ
SNJ54LV125AW
SNJ54LV125AFK
−55°C to 125°C
CFP − W
Tube of 150
Tube of 55
SNJ54LV125AW
SNJ54LV125AFK
LCCC − FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2005, Texas Instruments Incorporated
ꢌ
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ꢠ
ꢡ
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ꢤ
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ꢛ
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ꢦ
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ꢍ ꢈꢔꢈ ꢝꢥ ꢨ ꢠꢩ ꢣ ꢦ ꢛꢝ ꢠꢥ ꢡ ꢢꢩ ꢩ ꢤ ꢥꢛ ꢦꢞ ꢠꢨ ꢪꢢꢫ ꢬꢝꢡ ꢦꢛ ꢝꢠꢥ ꢟꢦ ꢛꢤ ꢭ ꢏꢩ ꢠꢟꢢ ꢡꢛ ꢞ ꢡꢠ ꢥꢨꢠꢩ ꢣ ꢛꢠ
ꢞ ꢪꢤ ꢡ ꢝ ꢨꢝ ꢡ ꢦ ꢛ ꢝꢠ ꢥꢞ ꢪꢤ ꢩ ꢛ ꢜꢤ ꢛ ꢤ ꢩꢣ ꢞ ꢠꢨ ꢔꢤꢮ ꢦꢞ ꢖꢥꢞ ꢛꢩ ꢢꢣ ꢤꢥꢛ ꢞ ꢞꢛ ꢦꢥ ꢟꢦꢩ ꢟ ꢯ ꢦꢩ ꢩ ꢦ ꢥꢛꢰꢭ
ꢏꢩ ꢠ ꢟꢢꢡ ꢛ ꢝ ꢠꢥ ꢪꢩ ꢠ ꢡ ꢤ ꢞ ꢞ ꢝꢥ ꢱ ꢟ ꢠꢤꢞ ꢥꢠꢛ ꢥꢤ ꢡꢤ ꢞꢞ ꢦꢩ ꢝꢬ ꢰ ꢝꢥꢡ ꢬꢢꢟ ꢤ ꢛꢤ ꢞꢛ ꢝꢥꢱ ꢠꢨ ꢦꢬ ꢬ
ꢪꢦ ꢩ ꢦ ꢣ ꢤ ꢛ ꢤ ꢩ ꢞ ꢭ
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢂꢈ ꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆ ꢇꢂ ꢈ
ꢋꢌ ꢈ ꢍꢎ ꢌ ꢏꢄ ꢐ ꢑ ꢌꢀ ꢑꢌ ꢒꢒ ꢐꢎ ꢓ ꢈꢔꢐ ꢀ
ꢕꢖ ꢔ ꢗ ꢘ ꢙꢀꢔꢈꢔ ꢐ ꢚꢌꢔ ꢏꢌ ꢔꢀ
SCES124L − DECEMBER 1997 − REVISED APRIL 2005
description/ordering information (continued)
To ensure the high-impedance state during power up or power down, OE should be tied to V
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
through a pullup
CC
These devices are fully specified for partial-power-down applications using I . The I circuitry disables the
off
off
outputs, preventing damaging current backflow through the devices when they are powered down.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Y
OE
L
A
H
L
H
L
L
H
X
Z
logic diagram (positive logic)
10
9
1
3OE
3A
1OE
8
2
3
3Y
4Y
1A
1Y
2Y
13
12
4
4OE
4A
2OE
11
6
5
2A
Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, RGY, and W packages.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢇ ꢂ ꢈꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆꢇ ꢂꢈ
ꢋ ꢌꢈꢍꢎ ꢌꢏꢄ ꢐ ꢑꢌꢀ ꢑꢌꢒ ꢒ ꢐꢎ ꢓ ꢈꢔꢐ ꢀ
ꢕ ꢖꢔ ꢗ ꢘ ꢙꢀꢔꢈꢔ ꢐ ꢚ ꢌꢔ ꢏ ꢌꢔꢀ
SCES124L − DECEMBER 1997 − REVISED APRIL 2005
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Voltage range applied to any output in the high-impedance
or power-off state, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
O
O
Output voltage range, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
O
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA
Package thermal impedance, θ (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
JA
(see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
(see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
(see Note 3): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
(see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
(see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
(see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. The package thermal impedance is calculated in accordance with JESD 51-5.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢂꢈ ꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆ ꢇꢂ ꢈ
ꢋꢌ ꢈ ꢍꢎ ꢌ ꢏꢄ ꢐ ꢑ ꢌꢀ ꢑꢌ ꢒꢒ ꢐꢎ ꢓ ꢈꢔꢐ ꢀ
ꢕꢖ ꢔ ꢗ ꢘ ꢙꢀꢔꢈꢔ ꢐ ꢚꢌꢔ ꢏꢌ ꢔꢀ
SCES124L − DECEMBER 1997 − REVISED APRIL 2005
recommended operating conditions (see Note 5)
SN54LV125A
SN74LV125A
UNIT
MIN
2
MAX
MIN
2
MAX
V
V
Supply voltage
5.5
5.5
V
CC
V
V
V
V
V
V
V
V
= 2 V
1.5
1.5
CC
CC
CC
CC
CC
CC
CC
CC
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2 V
V
V
V
× 0.7
V
V
V
× 0.7
CC
CC
CC
CC
CC
CC
High-level input voltage
V
IH
× 0.7
× 0.7
× 0.7
× 0.7
0.5
0.5
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
V
V
V
× 0.3
× 0.3
× 0.3
5.5
V
V
V
× 0.3
× 0.3
× 0.3
5.5
CC
CC
CC
CC
CC
CC
V
IL
Low-level input voltage
V
V
V
V
Input voltage
0
0
0
0
0
0
I
High or low state
3-state
V
V
CC
5.5
CC
5.5
Output voltage
V
O
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
−50
−2
−50
−2
−8
−16
50
2
µA
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2 V
I
High-level output current
Low-level output current
OH
OL
−8
mA
−16
50
µA
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
2
I
8
8
mA
16
16
200
100
20
85
200
100
20
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
T
−55
125
−40
°C
A
NOTE 5: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
ꢏ ꢎꢚꢍ ꢌꢧ ꢔ ꢏꢎ ꢐꢅꢖ ꢐꢕ ꢝꢥ ꢨ ꢠꢩ ꢣ ꢦ ꢛꢝ ꢠꢥ ꢡ ꢠ ꢥꢡꢤ ꢩ ꢥꢞ ꢪꢩ ꢠꢟ ꢢꢡꢛ ꢞ ꢝꢥ ꢛꢜ ꢤ ꢨꢠ ꢩꢣ ꢦꢛ ꢝꢲꢤ ꢠꢩ
ꢟ ꢤ ꢞ ꢝ ꢱ ꢥ ꢪꢜ ꢦ ꢞ ꢤ ꢠꢨ ꢟꢤ ꢲ ꢤ ꢬ ꢠꢪ ꢣꢤ ꢥ ꢛꢭ ꢧ ꢜꢦ ꢩꢦ ꢡꢛ ꢤꢩ ꢝꢞ ꢛꢝ ꢡ ꢟꢦ ꢛꢦ ꢦꢥ ꢟ ꢠꢛ ꢜꢤꢩ
ꢞ ꢪ ꢤ ꢡ ꢝ ꢨꢝ ꢡ ꢦ ꢛ ꢝꢠ ꢥꢞ ꢦ ꢩ ꢤ ꢟꢤ ꢞ ꢝ ꢱꢥ ꢱꢠ ꢦ ꢬꢞ ꢭ ꢔꢤ ꢮꢦ ꢞ ꢖꢥꢞ ꢛꢩ ꢢꢣ ꢤꢥꢛ ꢞ ꢩ ꢤꢞ ꢤꢩ ꢲ ꢤꢞ ꢛꢜ ꢤ ꢩ ꢝꢱꢜ ꢛ ꢛꢠ
ꢡ ꢜ ꢦ ꢥ ꢱꢤ ꢠꢩ ꢟꢝ ꢞ ꢡ ꢠꢥ ꢛꢝ ꢥꢢ ꢤ ꢛ ꢜꢤ ꢞ ꢤ ꢪꢩ ꢠ ꢟꢢꢡ ꢛꢞ ꢯ ꢝꢛꢜ ꢠꢢꢛ ꢥꢠꢛ ꢝꢡꢤ ꢭ
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢇ ꢂ ꢈꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆꢇ ꢂꢈ
ꢋ ꢌꢈꢍꢎ ꢌꢏꢄ ꢐ ꢑꢌꢀ ꢑꢌꢒ ꢒ ꢐꢎ ꢓ ꢈꢔꢐ ꢀ
ꢕ ꢖꢔ ꢗ ꢘ ꢙꢀꢔꢈꢔ ꢐ ꢚ ꢌꢔ ꢏ ꢌꢔꢀ
SCES124L − DECEMBER 1997 − REVISED APRIL 2005
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LV125A
SN74LV125A
PARAMETER
TEST CONDITIONS
UNIT
V
CC
MIN
TYP
MAX
MIN
TYP
MAX
I
I
I
I
I
I
I
I
= −50 µA
= −2 mA
= −8 mA
= −16 mA
= 50 µA
= 2 mA
2 V to 5.5 V
2.3 V
V
−0.1
2
V
CC
−0.1
2
OH
OH
OH
OH
OL
OL
OL
OL
CC
V
V
V
OH
3 V
2.48
3.8
2.48
3.8
4.5 V
2 V to 5.5 V
2.3 V
0.1
0.4
0.44
0.55
1
0.1
0.4
0.44
0.55
1
V
OL
= 8 mA
3 V
= 16 mA
4.5 V
I
I
I
I
V = 5.5 V or GND
0 to 5.5 V
5.5 V
µA
µA
µA
µA
I
I
V
= V or GND
O CC
or GND,
5
5
OZ
CC
off
V = V
CC
I
O
= 0
5.5 V
20
20
I
V or V = 0 to 5.5 V
0
5
5
I
O
3.3 V
1.6
1.6
1.6
1.6
C
V = V
or GND
pF
i
I
CC
5 V
switching characteristics over recommended operating free-air temperature range,
V
= 2.5 V 0.2 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
6.8*
7*
SN54LV125A SN74LV125A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
MIN
MAX
13*
MIN
MAX
MIN
1
MAX
15.5
15.5
17
t
pd
A
Y
Y
Y
Y
Y
Y
1* 15.5*
1* 15.5*
t
t
t
OE
OE
A
C
C
= 15 pF
= 50 pF
13*
1
ns
en
dis
pd
L
L
5.1* 14.*7
1*
1
17*
18.5
18.5
20.5
1
8.7
8.8
7.3
16.5
16.5
18.2
2
1
18.5
18.5
20.5
2
t
en
OE
OE
1
1
ns
t
1
1
dis
t
sk(o)
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
4.8*
4.8*
4.1*
6.1
SN54LV125A SN74LV125A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
MIN
MAX
8*
MIN
1*
MAX
9.5*
9.5*
MIN
1
MAX
9.5
9.5
11.5
13
t
pd
A
Y
Y
Y
Y
Y
Y
t
t
t
OE
OE
A
C
C
= 15 pF
= 50 pF
8*
1*
1
ns
en
dis
pd
L
L
9.7*
11.5
11.5
13.2
1.5
1* 11.5*
1
1
1
1
13
13
15
1
t
en
OE
OE
6.2
1
13
ns
t
5.5
1
15
dis
t
1.5
sk(o)
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
ꢏꢎ ꢚ ꢍꢌ ꢧ ꢔ ꢏꢎ ꢐꢅ ꢖꢐꢕ ꢝꢥ ꢨ ꢠꢩ ꢣ ꢦꢛ ꢝꢠꢥ ꢡꢠ ꢥꢡꢤ ꢩ ꢥꢞ ꢪꢩ ꢠꢟ ꢢꢡꢛ ꢞ ꢝꢥ ꢛꢜ ꢤ ꢨꢠ ꢩꢣ ꢦꢛ ꢝꢲ ꢤ ꢠꢩ
ꢟꢤ ꢞ ꢝ ꢱꢥ ꢪꢜ ꢦ ꢞ ꢤ ꢠꢨ ꢟꢤ ꢲ ꢤ ꢬꢠ ꢪꢣꢤ ꢥꢛꢭ ꢧ ꢜꢦ ꢩꢦ ꢡꢛ ꢤꢩ ꢝꢞ ꢛꢝ ꢡ ꢟꢦ ꢛꢦ ꢦꢥ ꢟ ꢠꢛ ꢜꢤꢩ
ꢞ ꢪꢤ ꢡ ꢝ ꢨꢝ ꢡ ꢦ ꢛ ꢝꢠ ꢥꢞ ꢦ ꢩ ꢤ ꢟꢤ ꢞ ꢝ ꢱꢥ ꢱꢠꢦ ꢬꢞ ꢭ ꢔꢤꢮ ꢦꢞ ꢖꢥꢞ ꢛꢩ ꢢꢣ ꢤꢥꢛ ꢞ ꢩ ꢤꢞ ꢤꢩ ꢲ ꢤꢞ ꢛꢜ ꢤ ꢩ ꢝꢱꢜ ꢛ ꢛꢠ
ꢡ ꢜꢦ ꢥ ꢱꢤ ꢠꢩ ꢟꢝ ꢞ ꢡ ꢠꢥ ꢛꢝ ꢥꢢꢤ ꢛ ꢜꢤ ꢞ ꢤ ꢪꢩ ꢠꢟ ꢢꢡꢛ ꢞ ꢯ ꢝꢛꢜ ꢠꢢꢛ ꢥꢠꢛ ꢝꢡꢤ ꢭ
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢂꢈ ꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆ ꢇꢂ ꢈ
ꢋꢌ ꢈ ꢍꢎ ꢌ ꢏꢄ ꢐ ꢑ ꢌꢀ ꢑꢌ ꢒꢒ ꢐꢎ ꢓ ꢈꢔꢐ ꢀ
ꢕꢖ ꢔ ꢗ ꢘ ꢙꢀꢔꢈꢔ ꢐ ꢚꢌꢔ ꢏꢌ ꢔꢀ
SCES124L − DECEMBER 1997 − REVISED APRIL 2005
switching characteristics over recommended operating free-air temperature range,
V
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
3.4*
3.4*
3.2*
4.3
SN54LV125A SN74LV125A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
MIN
MAX
5.5*
5.1*
6.8*
7.5
MIN
1*
1*
1*
1
MAX
6.5*
6*
MIN
1
MAX
6.5
6
t
pd
A
Y
Y
Y
Y
Y
Y
t
t
t
OE
OE
A
C
C
= 15 pF
= 50 pF
1
ns
en
dis
pd
L
L
8*
1
8
8.5
8
1
8.5
8
t
en
OE
OE
4.4
7.1
1
1
ns
t
4
8.8
1
10
1
10
1
dis
t
1
sk(o)
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
noise characteristics, V
= 3.3 V, C = 50 pF, T = 25°C (see Note 6)
CC
L
A
SN74LV125A
PARAMETER
UNIT
MIN
TYP
0.4
−0.3
3
MAX
V
V
V
V
V
Quiet output, maximum dynamic V
Quiet output, minimum dynamic V
0.8
V
V
V
V
V
OL(P)
OL(V)
OH(V)
IH(D)
IL(D)
OL
−0.8
OL
Quiet output, minimum dynamic V
High-level dynamic input voltage
Low-level dynamic input voltage
OH
2.31
0.99
NOTE 6: Characteristics are for surface-mount packages only.
operating characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
= 50 pF, f = 10 MHz
V
TYP
15.5
17.6
UNIT
CC
3.3 V
C
Power dissipation capacitance
Outputs enabled
C
pF
pd
L
5 V
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢇ ꢂ ꢈꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆꢇ ꢂꢈ
ꢋ ꢌꢈꢍꢎ ꢌꢏꢄ ꢐ ꢑꢌꢀ ꢑꢌꢒ ꢒ ꢐꢎ ꢓ ꢈꢔꢐ ꢀ
ꢕ ꢖꢔ ꢗ ꢘ ꢙꢀꢔꢈꢔ ꢐ ꢚ ꢌꢔ ꢏ ꢌꢔꢀ
SCES124L − DECEMBER 1997 − REVISED APRIL 2005
PARAMETER MEASUREMENT INFORMATION
V
CC
Open
S1
R
= 1 kΩ
L
From Output
Under Test
Test
Point
From Output
Under Test
TEST
S1
GND
t
t
/t
Open
C
C
PLH PHL
/t
L
L
t
V
CC
(see Note A)
(see Note A)
PLZ PZL
/t
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
V
CC
50% V
CC
Timing Input
0 V
t
w
t
h
t
V
CC
su
V
CC
50% V
CC
50% V
CC
Input
Input
50% V
CC
50% V
CC
Data Input
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
CC
CC
Output
Control
50% V
CC
50% V
50% V
CC
50% V
CC
CC
0 V
0 V
t
t
t
t
t
PZL
PLZ
PLH
PHL
Output
Waveform 1
V
≈V
OH
CC
In-Phase
Output
50% V
50% V
CC
50% V
CC
CC
V
V
V
+ 0.3 V
S1 at V
(see Note B)
OL
CC
V
OL
OL
t
PHL
PLH
t
t
PZH
PHZ
Output
Waveform 2
S1 at GND
V
OH
V
OH
Out-of-Phase
Output
− 0.3 V
OH
50% V
CC
50% V
50% V
CC
CC
≈0 V
V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time, with one input transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
PLH
are the same as t
.
dis
PLZ
PZL
PHL
PHZ
PZH
are the same as t
.
en
are the same as t .
pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
9-Aug-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SN74LV125AD
ACTIVE
SOIC
D
14
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV125ADBLE
SN74LV125ADBR
OBSOLETE
ACTIVE
SSOP
SSOP
DB
DB
14
14
TBD
Call TI
Call TI
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV125ADBRE4
SN74LV125ADE4
SN74LV125ADGVR
SN74LV125ADGVRE4
SN74LV125ADR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SOIC
TVSOP
TVSOP
SOIC
SOIC
PDIP
DB
D
14
14
14
14
14
14
14
14
14
14
14
14
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
DGV
DGV
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV125ADRE4
SN74LV125AN
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
N
25
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN74LV125ANE4
SN74LV125ANSR
SN74LV125ANSRG4
SN74LV125APW
PDIP
N
25
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SO
NS
NS
PW
PW
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV125APWE4
SN74LV125APWG4
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV125APWLE
SN74LV125APWR
OBSOLETE TSSOP
PW
PW
14
14
TBD
Call TI
Call TI
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
QFN
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV125APWRE4
SN74LV125APWRG4
SN74LV125APWT
PW
PW
14
14
14
14
14
14
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PW
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV125APWTE4
SN74LV125APWTG4
SN74LV125ARGYR
SN74LV125ARGYRG4
PW
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PW
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
RGY
RGY
1000 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
QFN
1000 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
9-Aug-2005
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
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Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
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Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
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Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
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Amplifiers
amplifier.ti.com
www.ti.com/audio
Data Converters
dataconverter.ti.com
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www.ti.com/automotive
DSP
dsp.ti.com
Broadband
Digital Control
Military
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
Logic
interface.ti.com
logic.ti.com
Power Mgmt
Microcontrollers
power.ti.com
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Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
Telephony
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2005, Texas Instruments Incorporated
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