SN54LV132A_04 [TI]
QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS; 翻两番正与非门施密特触发器输入
| 型号： | SN54LV132A_04 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS |
| 文件： | 总11页 (文件大小：318K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢇ ꢈ ꢉꢊ ꢀꢁꢋ ꢃꢄꢅ ꢆꢇ ꢈꢉ
ꢌ ꢍꢉꢎꢏ ꢍꢐꢄ ꢑ ꢐꢒ ꢀꢓ ꢔ ꢓꢅꢑ ꢕꢁꢉꢁ ꢎ ꢖ ꢉꢔꢑ ꢀ
ꢗ ꢓꢔ ꢘ ꢀꢙ ꢘꢚꢓ ꢔꢔꢕꢔ ꢏꢓꢖ ꢖ ꢑ ꢏ ꢓ ꢁꢐ ꢍ ꢔꢀ
SCLS394G − APRIL 1998 − REVISED DECEMBER 2004
SN54LV132A . . . J OR W PACKAGE
SN74LV132A . . . D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
D
D
D
D
D
D
D
2-V to 5.5-V V
Operation
CC
Max t of 9 ns at 5 V
pd
Typical V
<0.8 V at V
(Output Ground Bounce)
OLP
CC
1A
1B
V
CC
13 4B
1
2
3
4
5
6
7
14
= 3.3 V, T = 25°C
A
Typical V
>2.3 V at V
(Output V
Undershoot)
OHV
CC
OH
12
11
10
9
1Y
4A
4Y
3B
3A
3Y
= 3.3 V, T = 25°C
A
2A
Support Mixed-Mode Voltage Operation on
All Ports
2B
2Y
Latch-Up Performance Exceeds 250 mA Per
JESD 17
8
GND
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
SN54LV132A . . . FK PACKAGE
(TOP VIEW)
− 1000-V Charged-Device Model (C101)
description/ordering information
3
2
1 20 19
18
4A
17 NC
1Y
NC
2A
4
5
6
7
8
The
positive-NAND gates designed for 2-V to 5.5-V
operation.
’LV132A
devices
are
quadruple
16
4Y
NC
3B
V
15
14
NC
2B
CC
The ’LV132A devices perform the Boolean
function Y = A • B or Y = A + B in positive logic.
9 10 11 12 13
Each circuit functions as a NAND gate, but
because of the Schmitt action, it has different input
threshold levels for positive- and negative-going
signals.
NC − No internal connection
These circuits are temperature compensated and
can be triggered from the slowest of input ramps
and still give clean jitter-free output signals.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
Tube of 25
SN74LV132AD
SOIC − D
LV132A
Reel of 2500
Reel of 2000
Reel of 2000
Tube of 90
SN74LV132ADR
SN74LV132ANSR
SN74LV132ADBR
SN74LV132APW
SN74LV132APWR
SN74LV132APWT
SN74LV132ADGVR
SNJ54LV132AJ
SOP − NS
74LV132A
LV132A
SSOP − DB
−40°C to 85°C
Reel of 2000
Reel of 250
Reel of 2000
Tube of 25
TSSOP − PW
LV132A
TVSOP − DGV
CDIP − J
LV132A
SNJ54LV132AJ
SNJ54LV132AW
SNJ54LV132AFK
−55°C to 125°C
CFP − W
Tube of 150
Tube of 55
SNJ54LV132AW
SNJ54LV132AFK
LCCC - FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2004, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢉ ꢊ ꢀꢁ ꢋꢃ ꢄꢅ ꢆ ꢇꢈ ꢉ
ꢌꢍ ꢉ ꢎꢏ ꢍ ꢐꢄ ꢑ ꢐ ꢒꢀ ꢓ ꢔꢓ ꢅ ꢑꢕ ꢁꢉꢁ ꢎ ꢖ ꢉꢔꢑ ꢀ
ꢗꢓ ꢔ ꢘ ꢀꢙ ꢘ ꢚꢓ ꢔ ꢔꢕꢔ ꢏꢓ ꢖ ꢖꢑ ꢏ ꢓ ꢁꢐ ꢍꢔ ꢀ
SCLS394G − APRIL 1998 − REVISED DECEMBER 2004
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
B
H
X
L
H
L
L
H
H
X
logic diagram (positive logic)
A
Y
B
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Voltage range applied to any output in the high-impedance
or power-off state, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
O
O
Output voltage range, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
O
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, θ (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢇ ꢈ ꢉꢊ ꢀꢁ ꢋꢃ ꢄꢅ ꢆꢇ ꢈꢉ
ꢌ ꢍꢉꢎꢏ ꢍꢐꢄ ꢑ ꢐꢒ ꢀꢓ ꢔ ꢓꢅꢑ ꢕꢁꢉꢁ ꢎ ꢖ ꢉꢔꢑ ꢀ
ꢗ ꢓꢔ ꢘ ꢀꢙ ꢘꢚꢓ ꢔꢔꢕꢔ ꢏꢓꢖ ꢖ ꢑ ꢏ ꢓ ꢁꢐ ꢍ ꢔꢀ
SCLS394G − APRIL 1998 − REVISED DECEMBER 2004
recommended operating conditions (see Note 4)
SN54LV132A
SN74LV132A
UNIT
MIN
2
MAX
MIN
2
MAX
V
V
V
Supply voltage
Input voltage
Output voltage
5.5
5.5
5.5
5.5
V
V
CC
0
0
I
0
V
CC
0
V
CC
V
O
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
−50
−2
−6
−12
50
2
−50
−2
−6
−12
50
2
µA
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2 V
I
High-level output current
OH
OL
mA
µA
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
I
Low-level output current
6
6
mA
12
125
12
85
T
Operating free-air temperature
−55
−40
°C
A
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LV132A
SN74LV132A
PARAMETER
TEST CONDITIONS
UNIT
V
CC
MIN
TYP
MAX
1.75
2.31
3.5
MIN
TYP
MAX
1.75
2.31
3.5
2.5 V
3.3 V
5 V
V
T+
Positive-going
V
input threshold voltage
2.5 V
3.3 V
5 V
0.75
0.99
1.5
0.75
0.99
1.5
V
T−
Negative-going
input threshold voltage
V
V
2.5 V
3.3 V
5 V
0.25
0.33
0.5
1
1.32
2
0.25
0.33
0.5
1
1.32
2
∆V
T
T+
Hysteresis (V − V
)
T−
I
I
I
I
I
I
I
I
= −50 µA
= −2 mA
= −6 mA
= −12 mA
= 50 µA
= 2 mA
2 V to 5.5 V
2.3 V
3 V
V
CC
− 0.1
2
V
CC
− 0.1
2
OH
OH
OH
OH
OL
OL
OL
OL
V
V
V
OH
2.48
3.8
2.48
3.8
4.5 V
2 V to 5.5 V
2.3 V
3 V
0.1
0.4
0.44
0.55
1
0.1
0.4
0.44
0.55
1
V
OL
= 6 mA
= 12 mA
4.5 V
0 to 5.5 V
5.5 V
0
I
I
I
V = 5.5 V or GND
µA
µA
µA
pF
I
I
V = V
CC
or GND,
I = 0
O
20
20
CC
off
I
V or V = 0 to 5.5 V
5
5
I
O
C
V = V
or GND
3.3 V
1.9
1.9
i
I
CC
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3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢉ ꢊ ꢀꢁ ꢋꢃ ꢄꢅ ꢆ ꢇꢈ ꢉ
ꢌꢍ ꢉ ꢎꢏ ꢍ ꢐꢄ ꢑ ꢐ ꢒꢀ ꢓ ꢔꢓ ꢅ ꢑꢕ ꢁꢉꢁ ꢎ ꢖ ꢉꢔꢑ ꢀ
ꢗꢓ ꢔ ꢘ ꢀꢙ ꢘ ꢚꢓ ꢔ ꢔꢕꢔ ꢏꢓ ꢖ ꢖꢑ ꢏ ꢓ ꢁꢐ ꢍꢔ ꢀ
SCLS394G − APRIL 1998 − REVISED DECEMBER 2004
switching characteristics over recommended operating free-air temperature range,
V
= 2.5 V 0.2 V (unless otherwise noted) (see Figure 1)
CC
T = 25°C
A
SN54LV132A SN74LV132A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
MIN
TYP
MAX
MIN
1* 18.5*
23
MAX
MIN
1
MAX
18.5
23
t
pd
A or B
A or B
Y
Y
C
C
= 15 pF
= 50 pF
7.9* 16.5*
10.8 20.2
ns
ns
L
L
t
pd
1
1
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
CC
T = 25°C
A
SN54LV132A SN74LV132A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
MIN
TYP
MAX
MIN
1*
MAX
14*
MIN
1
MAX
14
t
pd
A or B
A or B
Y
Y
C
C
= 15 pF
= 50 pF
5.6* 11.9*
7.6 15.4
ns
ns
L
L
t
pd
1
17.5
1
17.5
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating free-air temperature range,
V
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
SN54LV132A SN74LV132A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
MIN
MAX
7.7*
9.7
MIN
1*
MAX
9*
MIN
1
MAX
9
t
pd
A or B
A or B
Y
Y
C
C
= 15 pF
= 50 pF
3.9*
ns
ns
L
L
t
pd
5.3
1
11
1
11
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
noise characteristics, V
= 3.3 V, C = 50 pF, T = 25°C (see Note 5)
CC
L
A
SN74LV132A
PARAMETER
UNIT
MIN
TYP
0.21
MAX
V
V
V
V
V
Quiet output, maximum dynamic V
0.8
V
V
V
V
V
OL(P)
OL(V)
OH(V)
IH(D)
IL(D)
OL
Quiet output, minimum dynamic V
Quiet output, minimum dynamic V
High-level dynamic input voltage
Low-level dynamic input voltage
−0.09
3.12
−0.8
OL
OH
2.31
0.99
NOTE 5: Characteristics are for surface-mount packages only.
operating characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
= 50 pF, f = 10 MHz
L
V
TYP
7.5
UNIT
CC
3.3 V
5 V
C
Power dissipation capacitance
C
pF
pd
11.2
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ꢥ
ꢡ ꢜ ꢦ ꢥ ꢰꢤ ꢠꢨ ꢟꢝ ꢞ ꢡ ꢠꢥ ꢛꢝ ꢥꢢ ꢤ ꢛ ꢜꢤ ꢞ ꢤ ꢩꢨ ꢠ ꢟꢢꢡ ꢛꢞ ꢮ ꢝꢛꢜ ꢠꢢꢛ ꢥꢠꢛ ꢝꢡꢤ ꢬ
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4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢇ ꢈ ꢉꢊ ꢀꢁ ꢋꢃ ꢄꢅ ꢆꢇ ꢈꢉ
ꢌ ꢍꢉꢎꢏ ꢍꢐꢄ ꢑ ꢐꢒ ꢀꢓ ꢔ ꢓꢅꢑ ꢕꢁꢉꢁ ꢎ ꢖ ꢉꢔꢑ ꢀ
ꢗ ꢓꢔ ꢘ ꢀꢙ ꢘꢚꢓ ꢔꢔꢕꢔ ꢏꢓꢖ ꢖ ꢑ ꢏ ꢓ ꢁꢐ ꢍ ꢔꢀ
SCLS394G − APRIL 1998 − REVISED DECEMBER 2004
PARAMETER MEASUREMENT INFORMATION
V
CC
Open
S1
R
= 1 kΩ
L
TEST
S1
From Output
Under Test
Test
Point
From Output
Under Test
GND
t
t
/t
Open
PLH PHL
/t
C
C
L
t
V
CC
L
PLZ PZL
/t
(see Note A)
(see Note A)
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
V
CC
50% V
CC
Timing Input
0 V
t
w
t
h
t
V
CC
su
V
CC
50% V
CC
50% V
CC
Input
Input
50% V
CC
50% V
CC
Data Input
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
CC
CC
Output
Control
50% V
CC
50% V
50% V
CC
50% V
CC
CC
0 V
0 V
t
t
t
t
t
PZL
PLZ
PLH
PHL
Output
Waveform 1
V
≈V
OH
CC
In-Phase
Output
50% V
50% V
CC
50% V
CC
CC
V
V
V
+ 0.3 V
S1 at V
(see Note B)
OL
CC
V
OL
OL
t
t
t
PHL
PLH
PZH
PHZ
Output
Waveform 2
S1 at GND
V
OH
V
OH
Out-of-Phase
Output
− 0.3 V
OH
50% V
CC
50% V
50% V
CC
CC
≈0 V
V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time, with one input transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
PLH
are the same as t
.
dis
PLZ
PZL
PHL
PHZ
PZH
are the same as t
.
en
are the same as t .
pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
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enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
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Applications
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amplifier.ti.com
www.ti.com/audio
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www.ti.com/wireless
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Post Office Box 655303 Dallas, Texas 75265
Copyright 2004, Texas Instruments Incorporated
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