SN54LVT16244B [TI]

3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS; 3.3 -V ABT 16位缓冲器/驱动器,具有三态输出
SN54LVT16244B
型号: SN54LVT16244B
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
3.3 -V ABT 16位缓冲器/驱动器,具有三态输出

驱动器 输出元件
文件: 总8页 (文件大小:123K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN54LVT16244B, SN74LVT16244B  
3.3-V ABT 16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS716 – MARCH 2000  
SN54LVT16244B . . . WD PACKAGE  
SN74LVT16244B . . . DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V  
Operation and Low Static-Power  
Dissipation  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
2OE  
1A1  
1A2  
GND  
1A3  
1A4  
2
3
Support Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
4
5
3.3-V V  
)
CC  
6
I
and Power-Up 3-State Support Hot  
7
V
V
off  
CC  
CC  
Insertion  
8
2Y1  
2Y2  
GND  
2Y3  
2Y4  
3Y1  
3Y2  
GND  
3Y3  
3Y4  
2A1  
2A2  
GND  
2A3  
2A4  
3A1  
3A2  
GND  
3A3  
3A4  
9
Support Unregulated Battery Operation  
Down to 2.7 V  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
A
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
V
V
CC  
CC  
– 1000-V Charged-Device Model (C101)  
4Y1  
4Y2  
GND  
4Y3  
4Y4  
4A1  
4A2  
GND  
4A3  
4A4  
3OE  
Package Options Include Plastic Shrink  
Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), and Thin Very  
Small-Outline (DGV) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
4OE  
description  
The ’LVT16244B devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) V operation, but  
CC  
with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four  
4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical  
active-low output-enable (OE) inputs.  
When V is between 0 and 1.5-V, the devices are in the high-impedance state during power up or power down.  
CC  
However, to ensure the high-impedance state above 1.5-V, OE should be tied to V  
through a pullup resistor;  
CC  
the minimum value of the resistor is determined by the current-sinking capability of the driver.  
These devices are fully specified for hot-insertion applications using I and power-up 3-state. The I circuitry  
off  
off  
disables the outputs, preventing damaging current backflow through the devices when they are powered down.  
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,  
which prevents driver conflict.  
The SN54LVT16244B is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74LVT16244B is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
Copyright 2000, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54LVT16244B, SN74LVT16244B  
3.3-V ABT 16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS716 – MARCH 2000  
FUNCTION TABLE  
(each 4-bit buffer)  
INPUTS  
OUTPUT  
Y
A
OE  
L
H
L
H
L
L
H
X
Z
logic symbol  
1
1OE  
EN1  
EN2  
EN3  
EN4  
48  
2OE  
25  
3OE  
24  
4OE  
47  
1A1  
46  
2
3
1
1
1
1
1
2
3
4
1Y1  
1Y2  
1Y3  
1Y4  
2Y1  
2Y2  
2Y3  
2Y4  
3Y1  
3Y2  
3Y3  
3Y4  
4Y1  
4Y2  
4Y3  
4Y4  
1A2  
44  
5
1A3  
43  
6
1A4  
41  
8
2A1  
40  
9
2A2  
38  
11  
12  
13  
14  
16  
17  
19  
20  
22  
23  
2A3  
37  
2A4  
36  
3A1  
35  
3A2  
33  
3A3  
32  
3A4  
30  
4A1  
29  
4A2  
27  
4A3  
26  
4A4  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54LVT16244B, SN74LVT16244B  
3.3-V ABT 16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS716 – MARCH 2000  
logic diagram (positive logic)  
1
25  
1OE  
3OE  
3A1  
47  
2
3
5
6
36  
35  
33  
32  
13  
14  
16  
17  
1A1  
1Y1  
1Y2  
1Y3  
1Y4  
3Y1  
3Y2  
3Y3  
3Y4  
46  
1A2  
3A2  
3A3  
3A4  
44  
1A3  
43  
1A4  
48  
24  
30  
2OE  
4OE  
4A1  
41  
8
9
19  
20  
22  
23  
2A1  
2Y1  
2Y2  
2Y3  
2Y4  
4Y1  
4Y2  
4Y3  
4Y4  
40  
29  
27  
26  
2A2  
4A2  
4A3  
4A4  
38  
11  
12  
2A3  
37  
2A4  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
I
Voltage range applied to any output in the high-impedance  
or power-off state, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V  
O
Voltage range applied to any output in the high state, V (see Note 1) . . . . . . . . . . . . . –0.5 V to V  
+ 0.5 V  
O
CC  
Current into any output in the low state, I : SN54LVT16244B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA  
O
SN74LVT16244B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA  
Current into any output in the high state, I (see Note 2): SN54LVT16244B . . . . . . . . . . . . . . . . . . . . . 48 mA  
O
SN74LVT16244B . . . . . . . . . . . . . . . . . . . . . 64 mA  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA  
IK  
OK  
I
Output clamp current, I  
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA  
O
Package thermal impedance, θ (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W  
JA  
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.  
2. This current flows only when the output is in the high state and V > V  
.
CC  
O
3. The package thermal impedance is calculated in accordance with JESD 51.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54LVT16244B, SN74LVT16244B  
3.3-V ABT 16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS716 – MARCH 2000  
recommended operating conditions (see Note 4)  
SN54LVT16244B  
SN74LVT16244B  
UNIT  
MIN  
2.7  
2
MAX  
MIN  
2.7  
2
MAX  
V
V
V
V
Supply voltage  
3.6  
3.6  
V
V
CC  
High-level input voltage  
Low-level input voltage  
Input voltage  
IH  
0.8  
5.5  
–24  
48  
0.8  
5.5  
–32  
64  
V
IL  
V
I
I
I
High-level output current  
Low-level output current  
Input transition rise or fall rate  
Power-up ramp rate  
mA  
mA  
ns/V  
µs/V  
°C  
OH  
OL  
t/v  
t/V  
Outputs enabled  
10  
10  
200  
–55  
200  
–40  
CC  
T
A
Operating free-air temperature  
125  
85  
NOTE 4: All unused inputs of the device must at V  
or GND to ensure proper device operation. Refer to the TI application report, Implications  
CC  
of Slow or Floating CMOS Inputs, literature number SCBA004.  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54LVT16244B, SN74LVT16244B  
3.3-V ABT 16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS716 – MARCH 2000  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
SN54LVT16244B  
SN74LVT16244B  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN TYP  
MAX  
MIN TYP  
MAX  
V
V
V
V
V
= 2.7 V,  
I = –18 mA  
–1.2  
–1.2  
V
IK  
CC  
CC  
CC  
I
= 2.7 V to 3.6 V,  
= 2.7 V,  
I
I
I
I
I
I
I
I
I
I
= –100 µA  
= –8 mA  
= –24 mA  
= –32 mA  
= 100 µA  
= 24 mA  
= 16 mA  
= 32 mA  
= 48 mA  
= 64 mA  
V
–0.2  
V
–0.2  
OH  
OH  
OH  
OH  
OL  
OL  
OL  
OL  
OL  
OL  
CC  
2.4  
CC  
2.4  
V
V
OH  
2
V
= 3 V  
CC  
CC  
2
0.2  
0.5  
0.2  
0.5  
0.4  
0.5  
V
= 2.7 V  
0.4  
V
OL  
0.5  
V
CC  
= 3 V  
0.55  
0.55  
10  
V
V
= 0 or 3.6 V,  
= 3.6 V,  
V = 5.5 V  
I
50  
±1  
1
CC  
Control inputs  
Data inputs  
V = V  
or GND  
±1  
CC  
I
CC  
CC  
I
I
µA  
V = V  
I
1
V
CC  
= 3.6 V  
V = 0  
I
–5  
–5  
I
I
I
V
V
V
V
= 0, V or V = 0 to 4.5 V  
±100  
5
µA  
µA  
µA  
off  
CC  
CC  
CC  
CC  
I
O
= 3.6 V,  
V
V
= 3 V  
5
OZH  
OZL  
O
= 3.6 V,  
= 0.5 V  
–5  
–5  
O
= 0 to 1.5 V, V = 0.5 V to 3 V,  
O
±100*  
±100*  
±100  
±100  
µA  
µA  
I
OZPU  
OZPD  
OE = don’t care  
V
= 1.5 V to 0, V = 0.5 V to 3 V,  
CC  
OE = don’t care  
O
I
Outputs high  
Outputs low  
0.19  
5
0.19  
5
V
= 3.6 V, I = 0,  
CC  
V = V  
O
I
mA  
CC  
or GND  
I
CC  
Outputs disabled  
0.19  
0.19  
V
= 3 V to 3.6 V, One input at V – 0.6 V,  
CC  
CC  
Other inputs at V  
0.2  
0.2  
mA  
I  
CC  
or GND  
CC  
C
C
V = 3 V or 0  
4
9
4
9
pF  
pF  
i
I
V
O
= 3 V or 0  
o
*On products compliant to MIL-PRF-38535, this parameter is not production tested.  
All typical values are at V  
= 3.3 V, T = 25°C.  
A
CC  
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V  
or GND.  
CC  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54LVT16244B, SN74LVT16244B  
3.3-V ABT 16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS716 – MARCH 2000  
switching characteristics over recommended operating free-air temperature range, C = 50 pF  
L
(unless otherwise noted) (see Figure 1)  
SN54LVT16244B  
= 3.3 V  
SN74LVT16244B  
FROM  
(INPUT)  
TO  
(OUTPUT)  
V
V
= 3.3 V  
V
CC  
CC  
V
CC  
= 2.7 V  
= 2.7 V  
PARAMETER  
UNIT  
CC  
MIN  
± 0.3 V  
± 0.3 V  
MIN  
1.1  
1.1  
1.1  
1.1  
1.6  
1.2  
MAX  
4.4  
3.6  
4.6  
5.4  
5.7  
5
MIN  
MAX  
4.6  
3.9  
5.4  
6.2  
6.2  
4.7  
MIN TYP  
MAX  
3.2  
3.2  
4
MAX  
3.7  
3.7  
5
t
t
t
t
t
t
t
1.2  
1.2  
1.2  
1.2  
2.2  
2
2.3  
2
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
sk(o)  
A
Y
Y
Y
ns  
ns  
2.6  
2.7  
3.3  
3.1  
OE  
OE  
4
5
4.5  
4.2  
0.5  
5
ns  
ns  
4.4  
All typical values are at V  
= 3.3 V, T = 25°C.  
A
CC  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54LVT16244B, SN74LVT16244B  
3.3-V ABT 16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS716 – MARCH 2000  
PARAMETER MEASUREMENT INFORMATION  
6 V  
Open  
S1  
500 Ω  
TEST  
/t  
S1  
From Output  
Under Test  
GND  
t
Open  
6 V  
PLH PHL  
t
/t  
PLZ PZL  
C
= 50 pF  
L
500 Ω  
t
/t  
GND  
(see Note A)  
PHZ PZH  
2.7 V  
0 V  
LOAD CIRCUIT  
Timing Input  
Data Input  
1.5 V  
t
w
t
t
h
su  
2.7 V  
0 V  
2.7 V  
0 V  
Input  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
VOLTAGE WAVEFORMS  
PULSE DURATION  
2.7 V  
0 V  
2.7 V  
0 V  
Output  
Control  
Input  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
t
t
PLZ  
PZL  
t
t
t
PHL  
PLH  
Output  
Waveform 1  
S1 at 6 V  
V
V
3 V  
OH  
Output  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
V
+ 0.3 V  
OL  
V
OL  
(see Note B)  
OL  
t
t
t
PZH  
PHZ  
PHL  
PLH  
Output  
Waveform 2  
S1 at GND  
V
V
V
OH  
OH  
V
– 0.3 V  
OH  
1.5 V  
VOLTAGE WAVEFORMS  
Output  
1.5 V  
0 V  
(see Note B)  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
Customers are responsible for their applications using TI components.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 2000, Texas Instruments Incorporated  

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