SN55463FK [TI]
DUAL PERIPHERAL DRIVERS; DUAL外设驱动程序
| 型号： | SN55463FK |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL PERIPHERAL DRIVERS |
| 文件： | 总13页 (文件大小：299K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN55461 THRU SN55463
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
SLRS022A – DECEMBER 1976 – REVISED OCTOBER 1995
SN55461, SN55462, SN55463 . . . JG PACKAGE
SN75461, SN75462, SN75463 . . . D OR P PACKAGE
(TOP VIEW)
PERIPHERAL DRIVERS FOR
HIGH-VOLTAGE, HIGH-CURRENT DRIVER
APPLICATIONS
• Characterized for Use to 300 mA
• High-Voltage Outputs
1A
1B
V
CC
1
2
3
4
8
7
6
5
2B
2A
2Y
1Y
• No Output Latch-Up at 30 V (After
Conducting 300 mA)
GND
• Medium-Speed Switching
SN55461, SN55462, SN55463 . . . FK PACKAGE
(TOP VIEW)
• Circuit Flexibility for Varied Applications
and Choice of Logic Function
• TTL-Compatible Diode-Clamped Inputs
• Standard Supply Voltages
3
2
1
20 19
18
• Plastic DIP (P) With Copper Lead Frame for
NC
2B
NC
1B
4
5
6
7
8
Cooler Operation and Improved Reliability
17
16
15
14
NC
2A
NC
1Y
• Package Options Include Plastic Small
Outline Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs
NC
NC
9 10 11 12 13
SUMMARY OF SERIES 55461/75461
DEVICE
SN55461
SN55462
SN55463
SN75461
SN75462
SN75463
LOGIC
AND
NAND
OR
PACKAGES
FK, JG
FK, JG
FK, JG
D, P
NC – No internal connection
AND
NAND
OR
D, P
D, P
description
These dual peripheral drivers are functionally interchangeable with SN55451B through SN55453B and
SN75451B through SN75453B peripheral drivers, but are designed for use in systems that require higher
breakdown voltages than those devices can provide at the expense of slightly slower switching speeds. Typical
applications include logic buffers, power drivers, relay drivers, lamp drivers, MOS drivers, line drivers, and
memory drivers.
The SN55461/SN75461, SN55462/SN75462, and SN55463/SN75463 are dual peripheral AND, NAND, and
OR drivers respectively (assuming positive logic), with the output of the gates internally connected to the bases
of the npn output transistors.
Series SN55461 drivers are characterized for operation over the full military temperature range of –55°C
to 125°C. Series SN75461 drivers are characterized for operation from 0°C to 70°C.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55461 THRU SN55463
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
SLRS022A – DECEMBER 1976 – REVISED OCTOBER 1995
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
SN55’
7
SN75’
7
UNIT
Supply voltage, V
CC
(see Note 1)
V
V
Input voltage, V
5.5
5.5
35
5.5
5.5
35
I
Intermitter voltage (see Note 2)
Off-state output voltage, V
V
V
O
Continuous collector or output current (see Note 3)
400
500
400
500
mA
mA
Peak collector or output current (t ≤ 10 ms, duty cycle ≤ 50%, see Note 4)
w
Continuous total power dissipation
See Dissipation Rating Table
Operating free-air temperature range, T
–55 to 125
0 to 70
°C
°C
°C
°C
°C
A
Storage temperature range, T
stg
–65 to 150
260
–65 to 150
Case temperature for 60 seconds, T
FK package
JG package
D or P package
C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
300
260
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Voltage values are with respect to network GND unless otherwise specified.
2. This is the voltage between two emitters A and B.
3. This value applies when the base-emitter resistance (R ) is equal to or less than 500 Ω.
BE
4. Both halves of these dual circuits may conduct rated current simultaneously; however, power dissipation averaged over a short time
interval must fall within the continuous dissipation rating.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T = 125°C
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
D
FK
JG
P
725 mW
5.8 mW/°C
11.0 mW/°C
8.4 mW/°C
8.0 mW/°C
464 mW
880 mW
672 mW
640 mW
–
1375 mW
275 mW
210 mW
–
1050 mW
1000 mW
recommended operating conditions
SN55’
SN75’
MIN NOM
UNIT
MIN NOM
MAX
MAX
Supply voltage, V
CC
4.5
2
5
5.5
4.75
2
5
5.25
V
V
High-level input voltage, V
IH
Low-level input voltage, V
0.8
0.8
70
V
IL
Operating free-air temperature, T
–55
125
0
°C
A
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55461 THRU SN55463
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
SLRS022A – DECEMBER 1976 – REVISED OCTOBER 1995
†
logic symbol
logic diagram (positive logic)
1
3
5
1A
2
&
3
5
1
2
1Y
2Y
1Y
2Y
1A
1B
1B
6
2A
7
6
7
2A
2B
2B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
4
GND
Pin numbers shown are for D, JG, and P packages.
schematic (each driver)
FUNCTION TABLE
(each driver)
V
Y
CC
A
L
B
L
Y
4 kΩ
1.6 kΩ
130 Ω
L (on state)
L (on state)
L (on state)
H (off state)
L
H
L
H
H
H
A
B
positive logic:
Y = AB or A + B
500 Ω
1 kΩ
GND
Resistor values shown are nominal.
electrical characteristics over recommended operating free-air temperature range
SN55461
SN75461
†
PARAMETER
Input clamp voltage
UNIT
V
TEST CONDITIONS
‡
‡
MIN TYP
MAX
MIN TYP
MAX
V
IK
V
= MIN,
I = –12 mA
–1.2
–1.5
–1.2
–1.5
CC
I
V
V
= MIN,
= 35 V
V
= MIN,
CC
OH
IH
I
High-level output current
300
0.5
0.8
100
µA
OH
V
= MIN,
= 100 mA
V
IL
= 0.8 V,
= 0.8 V,
CC
0.25
0.5
0.25
0.5
0.4
0.7
I
OL
V
Low-level output voltage
V
OL
V
= MIN,
V
IL
CC
= 300 mA
I
OL
I
I
I
I
I
Input current at maximum input voltage
High-level input current
V
CC
V
CC
V
CC
V
CC
V
CC
= MAX, V = 5.5 V
1
40
1
40
mA
µA
I
I
= MAX, V = 2.4 V
IH
I
Low-level input current
= MAX, V = 0.4 V
–1
8
–1.6
11
–1
8
–1.6
11
mA
mA
mA
IL
I
Supply current, outputs high
Supply current, outputs low
= MAX, V = 5 V
I
CCH
CCL
= MAX, V = 0
56
76
56
76
I
†
‡
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at V
= 5 V, T = 25°C.
A
CC
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
MIN
TYP
30
25
8
MAX
55
UNIT
t
t
t
t
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Transition time, low-to-high-level output
PLH
PHL
TLH
THL
40
I
R
≈ 200 mA,
= 50 Ω,
C = 15 pF,
L
See Figure 1
O
L
ns
20
Transition time, high-to-low-level output
10
20
SN55461
SN75461
V –10
S
V
= 30 V,
I
O
≈ 300 mA,
S
V
OH
High-level output voltage after switching
mV
See Figure 2
V
S
–10
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55461 THRU SN55463
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
SLRS022A – DECEMBER 1976 – REVISED OCTOBER 1995
†
logic symbol
logic diagram (positive logic)
1
3
5
1A
1B
2A
2B
&
3
5
1Y
2Y
1
1A
2
6
7
1Y
2Y
2
1B
6
2A
7
2B
4
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
GND
Pin numbers shown are for D, JG, and P packages.
schematic (each driver)
FUNCTION TABLE
(each driver)
V
CC
1.6 kΩ
4 kΩ
A
L
B
L
Y
130 Ω
1.6 kΩ
H (off state)
H (off state)
H (off state)
L (on state)
L
H
L
H
H
Y
A
B
H
positive logic:
Y = AB or A + B
500 Ω
1 kΩ
1 kΩ
GND
Resistor values shown are nominal.
electrical characteristics over recommended operating free-air temperature range
SN55462
SN75462
†
PARAMETER
Input clamp voltage
UNIT
V
TEST CONDITIONS
‡
TYP
‡
TYP
MIN
MAX MIN
MAX
V
IK
V
= MIN,
I = –12 mA
–1.2
–1.5
–1.2
–1.5
CC
I
V
V
= MIN,
= 35 V
V
= 0.8 V,
= MIN,
= MIN,
CC
OH
IL
I
High-level output current
300
0.5
0.8
100
µA
OH
V
= MIN,
= 100 mA
V
V
CC
IH
IH
0.25
0.5
0.25
0.5
0.4
0.7
I
OL
V
Low-level output voltage
V
OL
V
= MIN,
CC
= 300 mA
I
OL
I
I
I
I
I
Input current at maximum input voltage
High-level input current
V
CC
V
CC
V
CC
V
CC
V
CC
= MAX, V = 5.5 V
1
40
1
40
mA
µA
I
I
= MAX, V = 2.4 V
IH
I
Low-level input current
= MAX, V = 0.4 V
–1.1
13
–1.6
17
–1.1
13
–1.6
17
mA
mA
mA
IL
I
Supply current, outputs high
Supply current, outputs low
= MAX, V = 0
I
CCH
CCL
= MAX, V = 5 V
61
76
61
76
I
†
‡
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at V
= 5 V, T = 25°C.
A
CC
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
MIN
TYP
45
MAX
65
UNIT
t
t
t
t
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Transition time, low-to-high-level output
PLH
PHL
TLH
THL
30
50
I
R
≈ 200 mA,
= 50 Ω,
C = 15 pF,
L
See Figure 1
O
L
ns
13
25
Transition time, high-to-low-level output
10
20
SN55462
SN75462
V –10
S
V
= 30 V,
I
O
≈ 300 mA,
S
V
OH
High-level output voltage after switching
mV
See Figure 2
V
S
–10
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55461 THRU SN55463
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
SLRS022A – DECEMBER 1976 – REVISED OCTOBER 1995
†
logic symbol
logic diagram (positive logic)
1
3
5
≥1
1A
2
3
5
1
2
1Y
2Y
1Y
2Y
1A
1B
1B
6
2A
7
6
7
2A
2B
2B
4
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
GND
Pin numbers shown are for D, JG, and P packages.
schematic (each driver)
FUNCTION TABLE
(each driver)
V
CC
4 kΩ
1.6 kΩ
4 kΩ
130 Ω
A
L
B
L
Y
L (on state)
H (off state)
H (off state)
H (off state)
L
H
L
Y
H
H
A
B
H
positive logic:
Y = A + B or A B
500 Ω
1 kΩ
Resistor values shown are nominal.
GND
electrical characteristics over recommended operating free-air temperature range
SN55463
SN75463
†
PARAMETER
Input clamp voltage
UNIT
TEST CONDITIONS
‡
TYP
‡
TYP
MIN
MAX MIN
MAX
V
IK
V
= MIN, I = –12 mA
–1.2
–1.5
–1.2
–1.5
100
V
CC
I
V
V
= MIN,
= 35 V
V
IH
V
IL
V
IL
= MIN,
= 0.8 V,
= 0.8 V,
CC
OH
I
High-level output current
300
0.5
0.8
µA
OH
V
I
= MIN,
= 100 mA
CC
OL
0.25
0.5
0.25
0.5
0.4
0.7
V
OL
Low-level output voltage
V
V
I
= MIN,
CC
= 300 mA
OL
I
I
I
I
I
Input current at maximum input voltage
High-level input current
V
CC
V
CC
V
CC
V
CC
V
CC
= MAX, V = 5.5 V
1
40
1
40
mA
µA
I
I
= MAX, V = 2.4 V
IH
I
Low-level input current
= MAX, V = 0.4 V
–1
8
–1.6
11
–1
8
–1.6
11
mA
mA
mA
IL
I
Supply current, outputs high
Supply current, outputs low
= MAX, V = 5 V
I
CCH
CCL
= MAX, V = 0
58
76
58
76
I
†
‡
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at V
= 5 V, T = 25°C.
A
CC
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
MIN
TYP
30
25
8
MAX
55
UNIT
t
t
t
t
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Transition time, low-to-high-level output
PLH
PHL
TLH
THL
40
I
R
≈ 200 mA,
= 50 Ω,
C = 15 pF,
L
See Figure 1
O
L
ns
25
Transition time, high-to-low-level output
10
25
SN55463
SN75463
V –10
S
V
= 30 V,
I
O
≈ 300 mA,
S
V
OH
High-level output voltage after switching
mV
See Figure 2
V
S
–10
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55461 THRU SN55463
SN75461 THRU SN75463
DUAL PERIPHERAL DRIVERS
SLRS022A – DECEMBER 1976 – REVISED OCTOBER 1995
PARAMETER MEASUREMENT INFORMATION
≤ 5 ns
≤ 10 ns
3 V
90%
1.5 V
90%
1.5 V
Input
2.4 V
10 V
= 50 Ω
Input
’461
’463
10%
10%
0.5 µs
R
L
’461
’462
0 V
3 V
Output
≤ 5 ns
≤ 10 ns
Pulse
Generator
(see Note A)
Input
’462
Circuit
Under
Test
90%
90%
C
= 15 pF
1.5 V
1.5 V
L
(see Note B)
10%
10%
(see Note B)
0 V
t
t
PHL
90%
PLH
90%
V
OH
GND SUB
’463
50%
10%
50%
10%
Output
V
OL
0.4 V
t
t
TLH
THL
VOLTAGE WAVEFORMS
TEST CIRCUIT
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 1 MHz, Z ≈ 50 Ω.
O
B.
C includes probe and jig capacitance.
L
Figure 1. Test Circuit and Voltage Waveforms for Switching Times
V
S
= 30 V
≤ 5 ns
90%
≤ 10 ns
3 V
90%
1.5 V
Input
2 mH
1.5 V
Input
2.4 V
5 V
’461
’463
10%
90%
10%
40 µs
0 V
3 V
65 Ω
1N3064
’461
’462
≤ 5 ns
≤ 10 ns
Output
Pulse
Generator
(see Note A)
90%
1.5 V
Circuit
Under
Input
’462
1.5 V
Test
(see Note B)
10%
10%
C
= 15 pF
0 V
L
(see Note B)
V
OH
GND SUB
’463
Output
0.4 V
V
OL
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 12.5 kHz, Z = 50 Ω.
TEST CIRCUIT
O
B.
C includes probe and jig capacitance.
L
Figure 2. Test Circuit and Voltage Waveforms for Latch-Up Test
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
17-Oct-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
CDIP
CDIP
CDIP
CDIP
CDIP
SOIC
PDIP
SOIC
Drawing
JM38510/12908BPA
JM38510/12909BPA
SN55461JG
ACTIVE
JG
JG
JG
JG
JG
D
8
8
8
8
8
8
8
8
1
TBD
TBD
TBD
TBD
TBD
TBD
TBD
A42 SNPB
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Level-NC-NC-NC
Call TI
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
Call TI
SN55462JG
Call TI
SN55463JG
Call TI
SN75461D
Call TI
SN75461P
P
Call TI
SN75462D
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN75462DE4
SN75462DR
SN75462DRE4
SN75462P
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
PDIP
D
D
D
P
P
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN75462PE4
50
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN75463D
SN75463DR
SN75463P
OBSOLETE
OBSOLETE
ACTIVE
SOIC
SOIC
PDIP
D
D
P
8
8
8
TBD
TBD
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50
50
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SN75463PE4
ACTIVE
PDIP
P
8
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
SNJ55461FK
SNJ55461JG
SNJ55462FK
SNJ55462JG
SNJ55463JG
OBSOLETE
OBSOLETE
ACTIVE
LCCC
CDIP
LCCC
CDIP
CDIP
FK
JG
FK
JG
JG
20
8
TBD
TBD
TBD
TBD
TBD
Call TI
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20
8
1
1
POST-PLATE Level-NC-NC-NC
ACTIVE
A42 SNPB
Call TI
Level-NC-NC-NC
Call TI
OBSOLETE
8
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
17-Oct-2005
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.063 (1,60)
0.015 (0,38)
0.020 (0,51) MIN
0.200 (5,08) MAX
0.130 (3,30) MIN
Seating Plane
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.430 (10,92)
MAX
0.010 (0,25)
M
0.015 (0,38)
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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相关型号：
SN55464JG-00
0.5A 2 CHANNEL, NOR GATE BASED PRPHL DRVR, CDIP8, 0.300 INCH, HERMETIC SEALED, CERAMIC, DIP-8
TI
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