SN55LBC173MKGD1 [TI]
四路低功耗差分线路接收器 | KGD | 0 | -55 to 125;
| 型号： | SN55LBC173MKGD1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 四路低功耗差分线路接收器 | KGD | 0 | -55 to 125 信息通信管理 接口集成电路 |
| 文件： | 总12页 (文件大小：468K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN55LBC173-HIREL
www.ti.com.cn
ZHCSBQ1A –OCTOBER 2013–REVISED OCTOBER 2013
四路低功耗差动接收器
查询样品: SN55LBC173-HIREL
1
特性
2
•
符合 EIA 标准 RS-422-A，RS-423-A，
RS-485 和 CCITT V.11
•
•
•
输入灵敏度：±200mV
低功耗：20mA（最大值）
•
•
被设计成支持脉冲时长运行最短 20ns
开路故障安全设计
针对嘈杂环境中的长距离总线线路上的多点总线传
输
说明
SN55LBC173 是一款具有 3 态输出的单片四路差动线路接收器，此接收器被设计成符合 EIA 标准 RS-422-A，RS-
423-A，RS-485 和 CCITT V.11。 这个器件针对数据速率高达且超过每秒 1 千万位的平衡多点总线传输进行了优
化。 4 个接收器共用 2 个进行或操作的使能输入，一个在高电平时有效，一个在低电平时有效。 每个接收器在
12V 至 -7V 的共模输入电压范围内特有高输入阻抗、输入滞后以增加抗扰度，以及 ±200mV 的输入灵敏度。故障
安全设计确保了在输入为开路时，输出始终为高电平。 SN55LBC173 使用德州仪器 (TI) 已获专利的 LinBiCMOS™
技术进行设计，这个技术提供了低功耗、高开关速度和稳健耐用性。
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
LinBiCMOS is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
English Data Sheet: SGLS415
SN55LBC173-HIREL
ZHCSBQ1A –OCTOBER 2013–REVISED OCTOBER 2013
www.ti.com.cn
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION(1)
TA
PACKAGE
ORDERABLE PART NUMBER
TOP-SIDE MARKING
SN55LBC173MKGD1
NA
NA
–55°C to 125°C
KGD
SN55LBC173MKGD2
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
BARE DIE INFORMATION
BACKSIDE
POTENTIAL
BOND PAD
METALLIZATION COMPOSITION
BOND PAD
THICKNESS
DIE THICKNESS
BACKSIDE FINISH
10.5 mils.
Silicon with backgrind
Floating
AlSi(1%)Cu(0.5%)TiW
1850 nm
2
Copyright © 2013, Texas Instruments Incorporated
SN55LBC173-HIREL
www.ti.com.cn
ZHCSBQ1A –OCTOBER 2013–REVISED OCTOBER 2013
Table 1. Bond Pad Coordinates in Microns
DESCRIPTION
PAD NUMBER
X MIN
626.5
Y MIN
1695
1690.7
1432.1
614.1
392.1
132
X MAX
740.5
323
Y MAX
1809.5
1791.3
1539
1B
1A
1Y
G
1
2
222.5
3
167.9
274.8
278.3
273.5
379.7
805.3
1066.7
1337.7
1727.2
1865.6
1865.4
1857
4
171.4
721
2Y
2A
2B
GND
3B
3A
3Y
G
5
166.6
499
6
279.2
232.6
232.6
232.6
232.6
232.6
510.6
855.9
1515.3
1799
7
704.8
132
8
966.2
132
9
1237.2
1626.7
1758.7
1758.5
1750.1
1702.2
1296.7
1024.2
132
10
11
12
13
14
15
16
132
403.7
749
4Y
4A
4B
VCC
1408.4
1698.4
1698.4
1671.9
1802.7
1397.2
1124.7
1799
1772.5
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range unless otherwise noted
Value
UNIT
VCC
VI
Supply voltage range(2)
–0.3 to 7
±25
V
V
Input voltage range, (A or B inputs)
Differential input voltage(3)
VID
±25
V
Data and control voltage range
Operating free-air temperature range
Storage temperature range
–0.3 to 7
–55 to 125
–65 to 150
V
TA
°C
°C
Tstg
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.
RECOMMENDED OPERATING CONDITIONS
MIN TYP
MAX UNIT
VCC Supply voltage
4.75
–7
2
5
5.25
12
V
VIC
VIH
VIL
VID
IOH
IOL
TA
Common-mode input voltage
High-level input voltage
Low-level input voltage
Differential input voltage
High-level output current
Low-level output current
Operating free-air temperature
G inputs
0.8
6
–6
–8
16
mA
mA
°C
-55
125
Copyright © 2013, Texas Instruments Incorporated
3
SN55LBC173-HIREL
ZHCSBQ1A –OCTOBER 2013–REVISED OCTOBER 2013
www.ti.com.cn
MAX UNIT
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP(1)
VIT+
VIT–
Vhys
VIK
Positive-going input threshold voltage
IO = –8 mA
0.2
V
Negative-going input threshold voltage IO = 8 mA
–0.2
45
Hysteresis voltage (VIT+ – VIT–
Enable input clamp voltage
High-level output voltage
)
mV
II = – 18 mA
–0.9
–1.5
V
V
VOH
VID = –200 mV, IOH = –8 mA
VID = –200 mV, IOL = 8 mA
VID = –200 mV, IOL = 8 mA, TA = 125°
VO = 0 V to VCC
3.5
4.5
0.3
0.5
0.7
VOL
IOZ
Low-level output voltage
V
High-impedance-state output current
±20
1.15
1.15
–0.9
–0.9
±20
–20
–120
20
µA
VIH = 12 V, VCC = 5 V
VIH = 12 V, VCC = 0 V
0.7
0.8
Bus input
A or B inputs
current
II
Other inputs at 0 V
mA
VIH = –7 V, VCC = 5 V
VIH = –7 V, VCC = 0 V
VIH = 5 V
–0.5
–0.4
IIH
IIL
High-level input current
Low-level input current
Short-circuit output current
µA
µA
VIL = 0 V
IOS
VO = 0
–80
11
mA
Outputs enabled, IO = 0, VID = 5 V
Outputs disabled
ICC
Supply current
mA
0.9
1.4
(1) All typical values are at 25°C and with a 5 V supply.
SWITCHING CHARACTERISTICS
VCC = 5 V, CL = 15 pF, over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
11
TYP MAX UNIT
25°C
22
22
17
18
30
25
0.5
5
30
35
35
35
40
45
30
35
40
55
40
45
6
Propagation delay time, high-to-low-level VID = –1.5 V to 1.5 V,
output See Figure 1
tPHL
ns
ns
ns
ns
ns
ns
ns
ns
–55°C to 125°C
25°C
11
11
Propagation delay time, low-to-high-level VID = –1.5 V to 1.5 V,
tPLH
output
See Figure 1
–55°C to 125°C
25°C
11
tPZH Output enable time to high level
See Figure 2
–55°C to 125°C
25°C
tPZL
Output enable time to low level
See Figure 3
See Figure 2
See Figure 3
See Figure 1
See Figure 1
–55°C to 125°C
25°C
tPHZ Output disable time from high level
–55°C to 125°C
25°C
tPLZ
Output disable time from low level
–55°C to 125°C
25°C
tsk(p) Pulse skew (|tPHL – tPLH|)
–55°C to 125°C
25°C
7
10
16
tt
Transition time
–55°C to 125°C
4
Copyright © 2013, Texas Instruments Incorporated
SN55LBC173-HIREL
www.ti.com.cn
ZHCSBQ1A –OCTOBER 2013–REVISED OCTOBER 2013
PARAMETER MEASUREMENT INFORMATION
1.5 V
Generator
(see Note A)
Input
t
0 V
0 V
50 Ω
Output
= 15 pF
– 1.5V
C
t
L
(see Note B)
PLH
PHL
V
OH
90%
10%
Output
1.3 V
1.3 V
V
OL
t
t
t
t
2 V
VOLTAGE WAVEFORMS
TEST CIRCUIT
A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle ≤ 50%,
tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 1. tpd and tt Test Circuit and Voltage Waveforms
V
CC
Output
2 kΩ
1.5 V
S1
3 V
Input
1.3 V
1.3 V
C
= 15 pF
0 V
L
(see Note B)
t
t
PHZ
PZH
5 kΩ
See Note C
0.5 V
V
OH
S1 Closed
≈ 1.4 V
Output
1.3 V
S1 Open
2 V
0 V
Generator
(see Note A)
VOLTAGE WAVEFORMS
50 Ω
(see Note D)
TEST CIRCUIT
A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle ≤ 50%,
tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
C. All diodes are 1N916 or equivalent.
D. To test the active-low enable G, ground G and apply an inverted input waveform to G.
Figure 2. tPHZ and tPZH Test Circuit and Voltage Waveforms
Copyright © 2013, Texas Instruments Incorporated
5
SN55LBC173-HIREL
ZHCSBQ1A –OCTOBER 2013–REVISED OCTOBER 2013
www.ti.com.cn
PARAMETER MEASUREMENT INFORMATION (continued)
V
CC
Output
2 kΩ
–1.5V
3 V
0 V
Input
t
C
= 15 pF
1.3 V
1.3 V
L
(see Note B)
5 kΩ
See Note C
t
PZL
PLZ
S2 Open
S2 Closed
≈ 1.4 V
2 V
Output
1.3 V
Generator
(see Note A)
V
OL
S2
0.5 V
VOLTAGE WAVEFORMS
50 Ω
(see Note D)
TEST CIRCUIT
A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle ≤ 50%,
tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
C. All diodes are 1N916 or equivalent.
D. To test the active-low enable G, ground G and apply an inverted input waveform to G.
Figure 3. tPZL and tPLZ Test Circuit and Voltage Waveforms
6
Copyright © 2013, Texas Instruments Incorporated
SN55LBC173-HIREL
www.ti.com.cn
ZHCSBQ1A –OCTOBER 2013–REVISED OCTOBER 2013
DEVICE INFORMATION
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
EQUIVALENT OF A AND B INPUTS
TYPICAL OF ALL OUTPUTS
TYPICAL OF G AND G INPUTS
V
CC
V
CC
V
CC
100 kΩ
A Only
3 kΩ
Receiver
Input
Input
18 kΩ
Y Output
100 kΩ
B Only
12 kΩ
1 kΩ
FUNCTION TABLE (EACH RECIEVER)
DIFFERENTIAL INPUTS
A - B
ENABLES
OUTPUT
G
H
X
H
X
H
X
L
G
X
L
Y
H
H
?
VID ≥ 0.2 V
X
L
-0.2 < VID < 0.2 V
?
X
L
L
VID ≤ -0.2 V
X
L
H
X
L
Z
H
H
H
X
Open circuit
4
4
≥ 1
G
G
G
12
12
G
2
1
2
3
1A
1B
3
5
1A
1B
2A
2B
3A
3B
4A
4B
1Y
1Y
2Y
3Y
4Y
1
6
5
11
13
6
7
7
2Y
3Y
4Y
2A
2B
10
9
10
9
14
15
3A
3B
11
13
14
15
4A
4B
Figure 4. Logic Symbol
Figure 5. Logic Diagram (Positive Logic)
Copyright © 2013, Texas Instruments Incorporated
7
SN55LBC173-HIREL
ZHCSBQ1A –OCTOBER 2013–REVISED OCTOBER 2013
www.ti.com.cn
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
HIGH-LEVEL OUTPUT CURRENT
5.5
5
4.5
4
V
T
= 5 V
= 25°C
CC
V
CC
= 5.25 V
A
4.5
4
3.5
3
V
CC
= 5 V
3.5
3
V
CC
= 4.75 V
2.5
2
2.5
2
1.5
1
1.5
1
0.5
0
V
T
= 0.2 V
ID
= 25°C
0.5
0
A
0
10 20 30 40 50 60 70 80 90 100
0
– 4 – 8 – 12 – 16 – 20 – 24 – 28 – 32 – 36 – 40
V
ID
– Differential Input Voltage – mV
I
– High-Level Output Current – mA
OH
Figure 6.
Figure 7.
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
AVERAGE SUPPLY CURRENT
vs
FREQUENCY
660
600
540
480
420
360
300
240
180
120
60
14
T
= 25°C
A
T
= 25°C
A
V
= 5 V
CC
V
= 5 V
CC
12
10
8
V
= 200 mV
ID
6
4
2
0
0
10 K
0
3
6
9
12 15 18 21 24 27 30
100 K
2 M
10 M
100 M
I
– Low-Level Output Current – mA
OL
Figure 8.
Figure 9.
8
Copyright © 2013, Texas Instruments Incorporated
SN55LBC173-HIREL
www.ti.com.cn
ZHCSBQ1A –OCTOBER 2013–REVISED OCTOBER 2013
TYPICAL CHARACTERISTICS (continued)
BUS INPUT CURRENT
vs
PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
INPUT VOLTAGE
(COMPLEMENTARY INPUT AT 0 V)
1
0.8
24.5
24
V
= 5 V
T
V
= 25°C
CC
= 15 pF
A
C
V
= 5 V
L
CC
=
1.5 V
IO
0.6
0.4
t
PHL
23.5
23
0.2
0
– 0.2
– 0.4
– 0.6
– 0.8
– 1
t
PLH
22.5
22
The shaded region of this graph represents
more than 1 unit load per RS-485.
– 40 – 20
0
20
40
60
80
100
– 8 – 6 – 4 – 2
0
2
4
6
8
10 12
T
A
– Free-Air Temperature – °C
V – Input Voltage – V
I
Figure 10.
Figure 11.
Copyright © 2013, Texas Instruments Incorporated
9
PACKAGE OPTION ADDENDUM
www.ti.com
14-Jul-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
SN55LBC173MKGD1
SN55LBC173MKGD2
ACTIVE
ACTIVE
XCEPT
XCEPT
KGD
KGD
0
0
100
10
RoHS & Green
TBD
Call TI
N / A for Pkg Type
Call TI
-55 to 125
-55 to 125
Samples
Samples
Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
14-Jul-2022
Addendum-Page 2
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