SN65ELT22_1 [TI]
5-V Dual TTL-to-Differential PECL Translator; 5 -V双TTL至差分PECL转换器![SN65ELT22_1](http://pdffile.icpdf.com/pdf1/p00142/img/icpdf/SN65E_783236_icpdf.jpg)
型号: | SN65ELT22_1 |
厂家: | ![]() |
描述: | 5-V Dual TTL-to-Differential PECL Translator |
文件: | 总11页 (文件大小:397K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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SN65ELT22
www.ti.com ............................................................................................................................................................................................ SLLS924–DECEMBER 2008
5-V Dual TTL-to-Differential PECL Translator
1
FEATURES
PIN ASSIGNMENT
•
1.1-ns (max) Propagation Delay
Operating Range: VCC = 4.2V to 5.7V with
GND = 0 V
•
D or DGK PACKAGE
(TOP VIEW)
•
•
•
< 50-ps (typ) Output-to-Output Skew
Built-In Temperature Compensation
V
1
2
8
7
Q
Q
CC
0
Drop-In Compatible to the MC10ELT22,
MC100ELT22
D
D
0
1
0
APPLICATIONS
•
•
Data and Clock Transmission Over Backplane
Signaling Level Conversion for Clock or Data
6
5
3
4
Q
1
DESCRIPTION
GND
Q
1
The SN65ELT22 is a dual TTL-to-differential PECL
translator. It operates on +5-V supply and ground
only. The output is undetermined when the inputs are
left floating. The low output skew makes the device
an ideal solution for clock or data signal translation.
Table 1. Pin Descriptions
PIN
FUNCTION
TTL inputs
The SN65ELT22 is housed in an industry standard
SOIC-8 package and is also available in an optional
TSSOP-8 package.
D0, D1
Q0, Q0, Q1, Q1
VCC
PECL outputs
Positive supply
Ground
GND
ORDERING INFORMATION(1)
PART NUMBER
SN65ELT22D
PART MARKING
PACKAGE
LEAD FINISH
SN65ELT22
SN65ELT22
SOIC
NiPdAu
NiPdAu
SN65ELT22DGK
SOIC-TSSOP
(1) Leaded device options are not initially available; contact a sales representative for further details
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN65ELT22
SLLS924–DECEMBER 2008............................................................................................................................................................................................ www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS(1)
PARAMETER
Absolute PECL mode supply voltage, VCC
Input voltage, VIN
CONDITIONS
VALUE
UNIT
V
GND = 0 V
GND = 0 V
Continuous
Surge
6
GND + 0.025 < VIN < VCC – 0.025
V
50
Output current
mA
100
Operating temperature range
Storage temperature range
–40 to 85
–65 to 150
°C
°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
POWER DISSIPATION RATINGS
POWER RATING THERMAL RESISTANCE,
DERATING FACTOR
TA > 25°C
POWER RATING
TA = 85°C
(mW)
CIRCUIT BOARD
MODEL
JUNCTION-TO-AMBIENT
PACKAGE
TA < 25°C
(mW)
NO AIRFLOW
(mW/°C)
Low-K
High-K
Low-K
High-K
719
840
469
527
139
119
213
189
7
8
5
5
288
336
188
211
SOIC
SOIC-TSSOP
THERMAL CHARACTERISTICS
PARAMETER
MIN
TYP
79
MAX UNIT
SOIC
θJB
Junction-to-board thermal resistance
Junction-to-case thermal resistance
°C/W
SOIC-TSSOP
SOIC
120
98
θJC
°C/W
SOIC-TSSOP
74
KEY ATTRIBUTES
CHARACTERISTICS
VALUE
Level 1
Moisture sensitivity level
Flammability rating (oxygen index: 28 to 34)
UL 94 V-0 at 0.125 in
4 kV
Human body model
Charge device model
Machine model
Electrostatic discharge
2 kV
200 V
Meets or exceeds JEDEC Spec EIA/JESD78 latchup test
2
Submit Documentation Feedback
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): SN65ELT22
SN65ELT22
www.ti.com ............................................................................................................................................................................................ SLLS924–DECEMBER 2008
PECL DC CHARACTERISTICS
At VCC = 5.0 V, GND = 0.0 V (unless otherwise noted)(1)(2)
TA = –40°C
MIN TYP MAX MIN TYP MAX MIN TYP MAX
17.3 20 18.2 20 19.4 22 mA
TA = 25°C
TA = 85°C
PARAMETER
TEST CONDITIONS
UNIT
ICC
Power supply current
(3)
VOH
VOL
High-level output voltage
Low-level output voltage
See
3915 3954 4120 3915 3958 4120 3915 3961 4120 mV
3170 3236 3380 3170 3231 3380 3170 3229 3380 mV
(3)
See
(1) The device meets the specifications after thermal balance has been established when mounted in a socket or printed circuit board with
maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature
range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied
individually under normal operating conditions and not valid simultaneously.
(2) Input and output parameters vary 1:1 with VCC. VCC can vary +0.7 V /–0.8 V.
(3) Outputs are terminated through a 50-Ω resistor to VCC – 2.0 V.
TTL DC CHARACTERISTICS
At VCC = 4.2 V to 5.7 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
VIN = 2.7 V, VIN = (VCC – 0.025) V
VIN = VCC
MIN
TYP
MAX UNIT
IIH
High-level input current
High-level input current
Low-level input current
Input clamp diode voltage
High-level input voltage
Low-level input voltage
20
20
µA
µA
µA
V
IIHH
IIL
VIN = 0.5 V, VIN = (GND + 0.025) V
IIN = –18 mA
–200
VIK
VIH
VIL
–1.2
2.0
Vcc– 0.025
0.8
V
GND + 0.025
V
(1) The device meets the specifications after thermal balance has been established when mounted in a socket or printed circuit board with
maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature
range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied
individually under normal operating conditions and not valid simultaneously
AC CHARACTERISTICS
At VCC = 4.2 V to 5.7 V, GND = 0.0 V (unless otherwise noted)(1)
TA = –40°C
MIN TYP
TA = 25°C
TA = 85°C
PARAMETER
TEST CONDITIONS
UNIT
MAX MIN TYP MAX MIN TYP MAX
Max switching
fMAX
frequency(2)
,
500
490
470
MHz
see Figure 5
tPLH
tPHL
0.6 0.83
1.1
0.9
90
0.6 0.84
1.1
0.9
90
0.6 0.85
1.1
0.9
90
Propagation delay time 1.5 V to 50%
ns
ps
0.5
25
25
0.5
25
25
0.5
25
25
Within device skew
See(3)
tSKEW
(4)
Device-to-device skew
See
100
100
100
Random clock jitter
(RMS)
tJITTER
tr/tf
0.5
1.1
0.5
1.1
0.5
1.1
ps
ns
Output rise/fall times
Q (20%–80%)
0.7
0.7
0.7
(1) The device meets the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating
temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are
applied individually under normal operating conditions and not valid simultaneously.
(2) Maximum switching frequency measured at output amplitude of 300 mVpp
.
(3) Measured between outputs under the identical transitions and conditions on any one device.
(4) Device-to-device skew for identical transitions at identical VCC levels.
Copyright © 2008, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Link(s): SN65ELT22
SN65ELT22
SLLS924–DECEMBER 2008............................................................................................................................................................................................ www.ti.com
Typical Termination for Output Driver
Z
O
= 50 W
P
P
Driver
Receiver
N
N
Z
O
= 50 W
50 W
50 W
V
TT
= V
V
- 2 V
CC
TT
Figure 1. Typical Termination for Driver
1.5 V
1.5 V
IN
OUT
OUT
t
t
PHL
PLH
Figure 2. Output Propagation Delay
80%
20%
t
t
f
r
Figure 3. Output Rise and Fall Times
4
Submit Documentation Feedback
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): SN65ELT22
SN65ELT22
www.ti.com ............................................................................................................................................................................................ SLLS924–DECEMBER 2008
1.5V
1.5V
IN
Q
Q
O
O
t
t
PLH0
PHL0
Q1
Q1
t
t
PHL1
PLH1
Device Skew =
- t ), (t
Higher [(t
- t
)]
PLH1 PLH0 PLH1 PLH0
Figure 4. Device Skew
1000
900
800
700
600
500
400
300
200
100
0
VCC = 4.2 V
GND = 0 V
Vswing = 0.8 V–2 V
TA = 85°C
TA = 25°C
TA = –40°C
0
100
200
300
400
500
600
f – Frequency – MHz
Figure 5. Output Amplitude vs. Frequency
Copyright © 2008, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Link(s): SN65ELT22
PACKAGE OPTION ADDENDUM
www.ti.com
2-Jan-2009
PACKAGING INFORMATION
Orderable Device
SN65ELT22D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65ELT22DGK
SN65ELT22DGKR
SN65ELT22DR
MSOP
MSOP
SOIC
DGK
DGK
D
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Feb-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
SN65ELT22DGKR
SN65ELT22DR
MSOP
SOIC
DGK
D
8
8
2500
2500
330.0
330.0
12.4
12.4
5.3
6.4
3.4
5.2
1.4
2.1
8.0
8.0
12.0
12.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Feb-2009
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN65ELT22DGKR
SN65ELT22DR
MSOP
SOIC
DGK
D
8
8
2500
2500
346.0
346.0
346.0
346.0
29.0
29.0
Pack Materials-Page 2
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