SN65HVD1787DR [TI]
70-V Fault-Protected RS-485 Transceivers; 70 -V故障保护的RS - 485收发器
| 型号： | SN65HVD1787DR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 70-V Fault-Protected RS-485 Transceivers |
| 文件： | 总19页 (文件大小：669K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN65HVD1785, SN65HVD1786
SN65HVD1787, SN65HVD1791
SN65HVD1792, SN65HVD1793
www.ti.com ................................................................................................................................................... SLLS872C–JANUARY 2008–REVISED MARCH 2008
70-V Fault-Protected RS-485 Transceivers
1
FEATURES
•
Bus-Pin Fault Protection to > ±70 V
•
Low Power Consumption
•
Common-Mode Voltage Range (–20 V to 25 V)
More Than Doubles TIA/EIA 485 Requirement
–
–
Low Standby Supply Current, 1 µA Typ
ICC 5 mA Quiescent During Operation
•
Bus I/O Protection
APPLICATIONS
–
±16 kV JEDEC HBM Protection
•
Designed for RS-485 and RS-422 Networks
•
•
Reduced Unit Load for Up to 256 Nodes
Failsafe Receiver for Open-Circuit,
Short-Circuit and Idle-Bus Conditions
DESCRIPTION
These devices are designed to survive overvoltage faults such as direct shorts to power supplies, mis-wiring
faults, connector failures, cable crushes, and tool mis-applications. They are also robust to ESD events, with high
levels of protection to human-body model specifications.
These devices combine a differential driver and a differential receiver, which operate from a single power supply.
In the 'HVD1785, 'HVD1786, and 'HVD1787, the driver differential outputs and the receiver differential inputs are
connected internally to form a bus port suitable for half-duplex (two-wire bus) communication. In the 'HVD1791,
the driver differential outputs and the receiver differential inputs are separate pins, to form a bus port suitable for
full-duplex (four-wire bus) communication. These ports feature a wide common-mode voltage range, making the
devices suitable for multipoint applications over long cable runs. These devices are characterized from –40°C to
105°C.
VFAULT up to 70 V
M0092-01
PRODUCT SELECTION GUIDE
PART NUMBER
SN65HVD1785
DUPLEX
Half
SIGNALING RATE
115 kbps
NODES
Up to 256
CABLE LENGTH
1500 m
SN65HVD1786
Half
1 Mbps
Up to 256
Up to 64
Up to 256
Up to 256
Up to 64
150 m
50 m
SN65HVD1787
Half
10 Mbps
115 kbps
1 Mbps
SN65HVD1791
Full
1500 m
150 m
50 m
SN65HVD1792 (Preview)
SN65HVD1793 (Preview)
Full
Full
10 Mbps
For similar features with 3.3 V supply operation, see the SN65HVD1781 (SLLS877).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
SN65HVD1785, SN65HVD1786
SN65HVD1787, SN65HVD1791
SN65HVD1792, SN65HVD1793
SLLS872C–JANUARY 2008–REVISED MARCH 2008................................................................................................................................................... www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
SN65HVD1791, 1792, 1793
D Package
(Top View)
SN65HVD1785, 1786, 1787
D or P Package
(Top View)
VCC
VCC
VCC
NC
R
1
2
3
4
5
6
7
14
13
12
11
10
9
R
RE
DE
D
1
2
3
4
8
7
6
5
B
A
B
RE
DE
A
GND
P0066-02
D
Z
GND
GND
Y
Logic Diagram (Positive Logic)
8
NC
3
4
DE
D
NC - No internal connection
P0005-02
Logic Diagram (Positive Logic)
4
2
1
RE
R
DE
6
9
A
Y
Z
5
Bus
7
D
10
B
S0299-01
3
2
RE
R
12
11
A
B
S0300-01
DEVICE INFORMATION
DRIVER FUNCTION TABLE
Input
Enable
Outputs
B
D
DE
A
H
L
H
H
L
H
Z
Z
L
Actively drive bus High
Actively drive bus Low
Driver disabled
L
X
H
L
Z
Z
H
X
OPEN
H
Driver disabled by default
OPEN
Actively drive bus High by default
RECEIVER FUNCTION TABLE
Differential Input
VID = VA – VB
VIT+ < VID
Enable
Output
RE
L
R
H
Receive valid bus High
Indeterminate bus state
Receive valid bus Low
Receiver disabled
VIT– < VID < VIT+
VID < VIT–
L
?
L
L
X
H
X
L
Z
OPEN
H
X
Receiver disabled by default
Fail-safe high output
Fail-safe high output
Fail-safe high output
Open-circuit bus
Short-circuit bus
Idle (terminated) bus
L
H
L
H
2
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Product Folder Link(s): SN65HVD1785, SN65HVD1786 SN65HVD1787, SN65HVD1791 SN65HVD1792, SN65HVD1793
SN65HVD1785, SN65HVD1786
SN65HVD1787, SN65HVD1791
SN65HVD1792, SN65HVD1793
www.ti.com ................................................................................................................................................... SLLS872C–JANUARY 2008–REVISED MARCH 2008
ABSOLUTE MAXIMUM RATINGS(1)
VALUE
UNIT
V
VCC Supply voltage
Voltage range at A and B inputs
–0.5 to 7
–70 to 70
V
Input voltage range at any logic pin
–0.3 to VCC + 0.3
V
Voltage input range, transient pulse, A and B, through 100 Ω
Receiver output current
–100 to 100
V
–24 to 24
mA
°C
TJ
Junction temperature
170
Continuous total power dissipation
See Dissipation Rating Table
IEC 60749-26 ESD (human-body model), bus terminals and GND
JEDEC Standard 22, Test Method A114 (human-body model), bus terminals and GND
JEDEC Standard 22, Test Method A114 (human-body model), all pins
JEDEC Standard 22, Test Method C101 (charged-device model), all pins
JEDEC Standard 22, Test Method A115 (machine model), all pins
±16
±16
±4
kV
kV
kV
kV
V
±2
±400
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
PACKAGE DISSIPATION RATINGS
JEDEC THERMAL
MODEL
TA < 25°C
RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 85°C
RATING
TA = 105°C
RATING
PACKAGE
High-K
Low-K
High-K
Low-K
High-K
Low-K
905 mW
516 mW
1315 mW
744 mW
2119 mW
976 mW
7.25 mW/°C
4.1 mW/°C
10.5 mW/°C
6 mW/°C
470 mW
268 mW
684 mW
387 mW
1100 mW
508 mW
325 mW
186 mW
474 mW
268 mW
763 mW
352 mW
SOIC (D) 8-pin
SOIC (D) 14-pin
PDIP (P) 8-pin
16.9 mW/°C
7.8 mW/°C
RECOMMENDED OPERATING CONDITIONS
MIN
4.5
–20
2
NOM
MAX
UNIT
V
VCC
VI
Supply voltage
5
5.5
25
Input voltage at any bus terminal (separately or common mode)(1)
High-level input voltage (driver, driver enable, and receiver enable inputs)
Low-level input voltage (driver, driver enable, and receiver enable inputs)
Differential input voltage
V
VIH
VIL
VID
VCC
0.8
25
V
0
V
–25
–60
–8
V
Output current, driver
60
mA
mA
Ω
IO
Output current, receiver
8
RL
CL
Differential load resistance
54
60
50
Differential load capacitance
pF
kbps
HVD1785, HVD1791
115
1
1/tUI
Signaling rate
HVD1786, HVD1792
HVD1787, HVD1793
Mbps
10
Operating free-air temperature (See
application section for thermal information)
–40
–40
105
TA
TJ
°C
°C
Junction temperature
150
(1) By convention, the least positive (most negative) limit is designated as minimum in this data sheet.
Copyright © 2008, Texas Instruments Incorporated
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Product Folder Link(s): SN65HVD1785, SN65HVD1786 SN65HVD1787, SN65HVD1791 SN65HVD1792, SN65HVD1793
SN65HVD1785, SN65HVD1786
SN65HVD1787, SN65HVD1791
SN65HVD1792, SN65HVD1793
SLLS872C–JANUARY 2008–REVISED MARCH 2008................................................................................................................................................... www.ti.com
ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
RS-485 with
TA ≤ 85°C
1.5
common-mode load,
VCC > 4.75 V, see
Figure 1
TA ≤ 105°C
1.4
|VOD
|
Driver differential output voltage magnitude
V
RL = 54 Ω, 4.75 V ≤ VCC ≤ 5.25 V
RL = 100 Ω, 4.75 V ≤ VCC ≤ 5.25 V
1.5
2
2
2.5
Change in magnitude of driver differential output
voltage
Δ|VOD
|
RL = 54 Ω
–0.2
1
0
VCC/2
0
0.2
3
V
V
VOC(SS) Steady-state common-mode output voltage
Change in differential driver output
common-mode voltage
ΔVOC
–100
100
mV
Peak-to-peak driver common-mode output
Center of two 27-Ω load resistors, See
Figure 2
VOC(PP)
voltage
500
23
mV
pF
COD
Differential output capacitance
Positive-going receiver differential input voltage
threshold
VIT+
–100
–10
mV
Negative-going receiver differential input
voltage threshold
VIT–
VHYS
VOH
VCM = –20 V to 25 V
–200
30
–150
50
mV
mV
V
Receiver differential input voltage threshold
hysteresis (VIT+ – VIT–
)
VCC
– 0.3
Receiver high-level output voltage
Receiver low-level output voltage
IOH = –8 mA
IOL = 8 mA
2.4
T
A ≤ 85°C
0.2
0.2
0.4
0.5
VOL
II
V
TA ≤ 105°C
Driver input, driver enable, and receiver enable
input current
–100
100
µA
IOZ
IOS
Receiver output high-impedance current
Driver short-circuit output current
VO = 0 V or VCC, RE at VCC
–1
1
250
125
µA
–250
mA
VI = 12 V
VI = –7 V
VI = 12 V
VI = –7 V
,
75
85, 86,
91, 92
–100
–400
–40
VCC = 4.5 to 5.5 V or
VCC = 0 V, DE at 0 V
II
Bus input current (disabled driver)
µA
500
87, 93
DE = VCC
RE = GND,
no load
Driver and receiver
enabled
4
3
2
6
5
4
DE = VCC
RE = VCC
no load
,
,
Driver enabled,
receiver disabled
mA
ICC
Supply current (quiescent)
Supply current (dynamic)
DE = GND,
RE = GND,
no load
Driver disabled,
receiver enabled
DE = GND,
D = open
RE = VCC
Driver and receiver
disabled
0.5
5
µA
,
no load
See TYPICAL CHARACTERISTICS section
4
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Product Folder Link(s): SN65HVD1785, SN65HVD1786 SN65HVD1787, SN65HVD1791 SN65HVD1792, SN65HVD1793
SN65HVD1785, SN65HVD1786
SN65HVD1787, SN65HVD1791
SN65HVD1792, SN65HVD1793
www.ti.com ................................................................................................................................................... SLLS872C–JANUARY 2008–REVISED MARCH 2008
SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
DRIVER (HVD1785 AND HVD1791)
tr, tf
Driver differential output rise/fall time
0.4
1.7
0.8
2.6
2
µs
µs
tPHL, tPLH
Driver propagation delay
RL = 54 Ω, CL = 50 pF, See Figure 3
Driver differential output pulse skew,
tSK(P)
20
250
ns
|tPHL – tPLH
|
tPHZ, tPLZ
Driver disable time
0.1
0.2
3
5
3
µs
See Figure 4 and
Receiver enabled
Figure 5
tPZH, tPZL
Driver enable time
µs
Receiver disabled
12
DRIVER (HVD1786 AND HVD1792)
tr, tf
Driver differential output rise/fall time
50
300
200
ns
ns
tPHL, tPLH
Driver propagation delay
RL = 54 Ω, CL = 50 pF, See Figure 3
Driver differential output pulse skew,
tSK(P)
25
ns
|tPHL – tPLH
|
tPHZ, tPLZ
Driver disable time
3
300
10
µs
ns
µs
See Figure 4 and
Receiver enabled
Figure 5
tPZH, tPZL
Driver enable time
Receiver disabled
DRIVER (HVD1787 AND HVD1793)
tr, tf
Driver differential output rise/fall time
3
30
50
ns
ns
tPHL, tPLH
Driver propagation delay
RL = 54 Ω, CL = 50 pF, See Figure 3
Driver differential output pulse skew,
tSK(P)
10
ns
|tPHL – tPLH
|
tPHZ, tPLZ
Driver disable time
3
300
9
µs
ns
µs
See Figure 4 and
Receiver enabled
Figure 5
tPZH, tPZL
Driver enable time
Receiver disabled
RECEIVER (ALL DEVICES UNLESS OTHERWISE NOTED)
tr, tf
Receiver output rise/fall time
4
15
200
70
ns
ns
85, 86, 91, 92
100
tPHL, tPLH
Receiver propagation delay time
CL = 15 pF,
See Figure 6
87, 93
85, 86, 91, 92
87, 93
6
20
Receiver output pulse skew,
tSK(P)
ns
|tPHL – tPLH
|
5
tPLZ, tPHZ
Receiver disable time
Receiver enable time
Driver enabled, See Figure 7
Driver enabled, See Figure 7
Driver disabled, See Figure 8
15
80
3
100
300
9
ns
ns
µs
tPZL(1), tPZH(1)
tPZL(2), tPZH(2)
Copyright © 2008, Texas Instruments Incorporated
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Product Folder Link(s): SN65HVD1785, SN65HVD1786 SN65HVD1787, SN65HVD1791 SN65HVD1792, SN65HVD1793
SN65HVD1785, SN65HVD1786
SN65HVD1787, SN65HVD1791
SN65HVD1792, SN65HVD1793
SLLS872C–JANUARY 2008–REVISED MARCH 2008................................................................................................................................................... www.ti.com
THERMAL INFORMATION
PARAMETER
TEST CONDITIONS
JEDEC high-K model
VALUE
138
242
59
UNIT
SOIC-8
DIP-8
JEDIC low-K model
JEDEC high-K model
JEDIC low-K model
JEDEC high-K model
JEDIC low-K model
RθJA Junction-to-ambient thermal resistance (no airflow)
°C/W
128
95
SOIC-14
168
62
SOIC-8
DIP-8
RθJB Junction-to-board thermal resistance
RθJC Junction-to-case thermal resistamce
39
°C/W
°C/W
SOIC-14
SOIC-8
DIP-8
40
61
61
SOIC-14
44
VCC = 5.5 V, TJ = 150°C, RL = 300 Ω,
CL = 50 pF (driver), CL = 15 pF (receiver)
5-V supply, unterminated(1)
85, 91
290
85, 91
86
VCC = 5.5 V, TJ = 150°C, RL = 100 Ω,
CL = 50 pF (driver), CL = 15 pF (receiver)
5-V supply, RS-422 load(1)
320
400
PD
Power dissipation
mW
87
85, 91
86
VCC = 5.5 V, TJ = 150°C, RL = 54 Ω,
CL = 50 pF (driver), CL = 15 pF (receiver)
5-V supply, RS-485 load(1)
87
TSD Thermal-shutdown junction temperature
170
°C
(1) Driver and receiver enabled, 50% duty cycle square-wave signal at signaling rate: HVD1785, 1791 at 115 kbps, HVD1786 at 1 Mbps,
HVD1787 at 10 Mbps)
PARAMETER MEASUREMENT INFORMATION
Input generator rate is 100 kbps, 50% duty cycle, rise and fall times less than 6 nsec, output impedance 50 Ω.
375 W ±1%
VCC
DE
A
B
D
VOD
0 V or 3 V
60 W ±1%
+
_
–20 V < V(test) < 25 V
375 W ±1%
S0301-01
Figure 1. Measurement of Driver Differential Output Voltage With Common-Mode Load
VCC
VA
A
B
27 W ±1%
DE
A
B
VB
D
Input
VOC(PP)
VOC
DVOC(SS)
CL = 50 pF ±20%
27 W ±1%
VOC
CL Includes Fixture and
Instrumentation Capacitance
S0302-01
Figure 2. Measurement of Driver Differential and Common-Mode Output With RS-485 Load
6
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Product Folder Link(s): SN65HVD1785, SN65HVD1786 SN65HVD1787, SN65HVD1791 SN65HVD1792, SN65HVD1793
SN65HVD1785, SN65HVD1786
SN65HVD1787, SN65HVD1791
SN65HVD1792, SN65HVD1793
www.ti.com ................................................................................................................................................... SLLS872C–JANUARY 2008–REVISED MARCH 2008
PARAMETER MEASUREMENT INFORMATION (continued)
3 V
VCC
DE
VI
50%
50%
CL = 50 pF ±20%
A
B
D
tPLH
tPHL
VOD
CL Includes Fixture
» 2 V
and Instrumentation
Capacitance
Input
Generator
RL = 54 W
±1%
90%
90%
VI
VOD
50 W
0 V
10%
0 V
10%
» –2 V
tr
tf
S0303-01
Figure 3. Measurement of Driver Differential Output Rise and Fall Times and Propagation Delays
3 V
A
S1
VO
D
VI
50%
50%
3 V
B
0 V
DE
0.5 V
RL = 110 W
± 1%
CL = 50 pF ±20%
tPZH
VOH
90%
Input
Generator
CL Includes Fixture
50 W
VI
and Instrumentation
Capacitance
VO
50%
» 0 V
tPHZ
S0304-01
NOTE: D at 3 V to test non-inverting output, D at 0 V to test inverting output.
Figure 4. Measurement of Driver Enable and Disable Times With Active High Output and Pulldown Load
3 V
RL = 110 W
±1%
» 3 V
A
B
VI
50%
50%
S1
D
VO
3 V
0 V
tPZL
tPLZ
DE
CL = 50 pF ±20%
» 3 V
Input
Generator
VI
50 W
CL Includes Fixture
VO
50%
and Instrumentation
Capacitance
10%
VOL
S0305-01
NOTE: D at 0 V to test non-inverting output, D at 3 V to test inverting output.
Figure 5. Measurement of Driver Enable and Disable Times With Active-Low Output and Pullup Load
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Product Folder Link(s): SN65HVD1785, SN65HVD1786 SN65HVD1787, SN65HVD1791 SN65HVD1792, SN65HVD1793
SN65HVD1785, SN65HVD1786
SN65HVD1787, SN65HVD1791
SN65HVD1792, SN65HVD1793
SLLS872C–JANUARY 2008–REVISED MARCH 2008................................................................................................................................................... www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
A
VO
R
Input
Generator
50 W
VI
B
1.5 V
0 V
CL = 15 pF ±20%
RE
CL Includes Fixture
and Instrumentation
Capacitance
3 V
VI
50%
50%
0 V
tPLH
tPHL
VOH
90% 90%
VO
50%
10%
50%
10%
VOL
tr
tf
S0306-01
Figure 6. Measurement of Receiver Output Rise and Fall Times and Propagation Delays
3 V
DE
VCC
A
B
VO
1 kW ± 1%
CL = 15 pF ±20%
R
D
0 V or 3 V
S1
RE
CL Includes Fixture
and Instrumentation
Capacitance
Input
Generator
50 W
VI
3 V
VI
50%
50%
0 V
tPZH(1)
tPHZ
VOH
D at 3 V
S1 to GND
90%
VO
50%
» 0 V
tPZL(1)
tPLZ
VCC
D at 0 V
S1 to VCC
VO
50%
10%
VOL
S0307-01
Figure 7. Measurement of Receiver Enable/Disable Times With Driver Enabled
8
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Product Folder Link(s): SN65HVD1785, SN65HVD1786 SN65HVD1787, SN65HVD1791 SN65HVD1792, SN65HVD1793
SN65HVD1785, SN65HVD1786
SN65HVD1787, SN65HVD1791
SN65HVD1792, SN65HVD1793
www.ti.com ................................................................................................................................................... SLLS872C–JANUARY 2008–REVISED MARCH 2008
PARAMETER MEASUREMENT INFORMATION (continued)
VCC
A
VO
0 V or 1.5 V
1.5 V or 0 V
1 kW ± 1%
CL = 15 pF ±20%
R
S1
B
RE
CL Includes Fixture
and Instrumentation
Capacitance
Input
Generator
50 W
VI
3 V
VI
50%
0 V
tPZH(2)
VOH
A at 1.5 V
B at 0 V
S1 to GND
VO
50%
GND
VCC
tPZL(2)
A at 0 V
B at 1.5 V
S1 to VCC
VO
50%
VOL
S0308-01
Figure 8. Measurement of Receiver Enable Times With Driver Disabled
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Product Folder Link(s): SN65HVD1785, SN65HVD1786 SN65HVD1787, SN65HVD1791 SN65HVD1792, SN65HVD1793
SN65HVD1785, SN65HVD1786
SN65HVD1787, SN65HVD1791
SN65HVD1792, SN65HVD1793
SLLS872C–JANUARY 2008–REVISED MARCH 2008................................................................................................................................................... www.ti.com
TYPICAL CHARACTERISTICS
DRIVER OUTPUT CURRENT
vs
RMS SUPPLY CURRENT
vs
SUPPLY VOLTAGE
SIGNALING RATE
70
60
50
40
30
20
10
0
120
100
80
T = 25°C
A
T = 25°C
A
DE at V
CC
RE at V
DE at V
CC
D at V
CC
CC
R = 54 Ω
L
R = 54 Ω
L
C = 50 pF
L
V
CC
= 5 V
60
−10
40
0.0 0.6 1.2 1.8 2.4 3.0 3.6 4.2 4.8 5.4
0
2
4
6
8
10
V
CC
− Supply Voltage − V
Signaling Rate − Mbps
G001
G002
Figure 9.
Figure 10.
BUS PIN CURRENT
vs
BUS PIN VOLTAGE
2.0
1.5
1.0
0.5
0.0
−0.5
−1.0
−1.5
−2.0
−90
−60
−30
0
30
60
90
V
IN
− Bus Pin Voltage − V
G004
Figure 11.
10
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Product Folder Link(s): SN65HVD1785, SN65HVD1786 SN65HVD1787, SN65HVD1791 SN65HVD1792, SN65HVD1793
SN65HVD1785, SN65HVD1786
SN65HVD1787, SN65HVD1791
SN65HVD1792, SN65HVD1793
www.ti.com ................................................................................................................................................... SLLS872C–JANUARY 2008–REVISED MARCH 2008
ADDITIONAL OPTIONS
The SN65HVD17xx family also has options for J1708 applications, for always-enabled full-duplex versions
(industry-standard SN65LBC179 footprint) and for inverting-polarity versions, which allow users to correct a
reversal of the bus wires without re-wiring. Contact your local Texas Instruments representative for information
on these options.
PART NUMBER
SN65HVD17xx
FOOTPRINT/FUNCTION
Half-duplex (176 pinout)
SLOW
85
MEDIUM
FAST
87
86
89
92
95
98
09
Full-duplex no enables (179 pinout)
Full-duplex with enables (180 pinout)
Half-duplex with cable invert
Full-duplex with cable invert and enables
J1708
88
90
91
93
94
96
97
99
08
10
D Package
(Top View)
1
R
VCC
R
RE
DE
D
1
2
3
4
8
7
6
5
2
RE
B
A
6
A
4
3
D
GND
7
B
P0066-03
DE
S0309-01
Figure 12. SN65HVD1708E Transceiver for J1708 Applications
PW Package
(Top View)
5
Y
3
D
6
Z
VCC
1
2
3
4
8
7
6
5
A
B
Z
Y
R
D
8
A
2
R
GND
7
B
P0074-01
S0310-01
Figure 13. SN65HVD17xx Always-Enabled Driver Receiver
Copyright © 2008, Texas Instruments Incorporated
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Product Folder Link(s): SN65HVD1785, SN65HVD1786 SN65HVD1787, SN65HVD1791 SN65HVD1792, SN65HVD1793
SN65HVD1785, SN65HVD1786
SN65HVD1787, SN65HVD1791
SN65HVD1792, SN65HVD1793
SLLS872C–JANUARY 2008–REVISED MARCH 2008................................................................................................................................................... www.ti.com
D Package
(Top View)
1
R
VCC
R
INV
DE
D
1
2
3
4
8
7
6
5
2
INV
B
6
7
A
A
B
4
3
GND
D
DE
D Package
(Top View)
1
2
RINV
R
VCC
VCC
RINV
R
1
2
3
4
5
6
7
14
13
12
11
10
9
12
11
A
B
A
B
Z
Y
RE
DE
3
RE
D
9
8
5
Y
Z
DINV
D
GND
GND
10
8
DINV
4
P0066-04
DE
S0311-01
Figure 14. SN65HVD17xx Options With Inverting Feature to Correct for Miswired Cables
12
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): SN65HVD1785, SN65HVD1786 SN65HVD1787, SN65HVD1791 SN65HVD1792, SN65HVD1793
PACKAGE OPTION ADDENDUM
www.ti.com
4-Apr-2008
PACKAGING INFORMATION
Orderable Device
SN65HVD1785D
SN65HVD1785DR
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65HVD1785P
SN65HVD1786D
PREVIEW
ACTIVE
PDIP
SOIC
P
D
8
8
50
TBD
Call TI
Call TI
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65HVD1786DR
ACTIVE
SOIC
D
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65HVD1786P
SN65HVD1787D
PREVIEW
ACTIVE
PDIP
SOIC
P
D
8
8
TBD
Call TI
Call TI
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65HVD1787DR
ACTIVE
SOIC
D
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN65HVD1787P
SN65HVD1791D
SN65HVD1791DR
PREVIEW
PREVIEW
PREVIEW
PDIP
SOIC
SOIC
P
D
D
8
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
14
14
50
2500
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Apr-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
SN65HVD1785DR
SN65HVD1786DR
SN65HVD1787DR
SOIC
SOIC
SOIC
D
D
D
8
8
8
2500
2500
2500
330.0
330.0
330.0
12.4
12.4
12.4
6.4
6.4
6.4
5.2
5.2
5.2
2.1
2.1
2.1
8.0
8.0
8.0
12.0
12.0
12.0
Q1
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Apr-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN65HVD1785DR
SN65HVD1786DR
SN65HVD1787DR
SOIC
SOIC
SOIC
D
D
D
8
8
8
2500
2500
2500
346.0
346.0
346.0
346.0
346.0
346.0
29.0
29.0
29.0
Pack Materials-Page 2
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.430 (10,92)
MAX
0.010 (0,25)
M
0.015 (0,38)
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
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