SN65LBC174A-EP [TI]
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER; 四路RS - 485差分线路驱动器
| 型号： | SN65LBC174A-EP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER |
| 文件： | 总19页 (文件大小：552K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN65LBC174A-EP
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER
www.ti.com
SLLS732–OCTOBER 2006–REVISED DECEMBER 2006
FEATURES
•
Controlled Baseline
20-PIN DW PACKAGE
(TOP VIEW)
–
One Assembly/Test Site, One Fabrication
Site
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1A
1Y
NC
V
CC
4A
4Y
NC
4Z
3,4EN
3Z
NC
3Y
•
•
Extended Temperature Performance of –55°C
to 125°C
Enhanced Diminishing Manufacturing Sources
(DMS) Support
1Z
1,2EN
2Z
NC
2Y
2A
GND
•
•
•
Enhanced Product-Change Notification
(1)
Qualification Pedigree
Designed for TIA/EIA-485, TIA/EIA-422, and
ISO 8482 Applications
3A
(2)
•
•
•
•
•
•
Signaling Rates up to 30 Mbps
Propagation Delay Times <11 ns
Low Standby Power Consumption 1.5 mA Max
Output ESD Protection Exceeds 13 kV
Driver Positive- and Negative-Current Limiting
logic diagram (positive logic)
Power-Up and Power-Down Glitch Free for
Line-Insertion Applications
2
1Y
1
1A
4
1Z
5
•
•
Thermal Shutdown Protection
1,2EN
8
Industry Standard Pinout, Compatible With
SN75174, MC3487, DS96174, LTC487, and
MAX3042
2Y
2Z
9
2A
6
12
14
3Y
3Z
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
11
15
19
3A
3,4EN
4A
18
16
4Y
4Z
(2) The signaling rate of a line is the number of voltage
transitions that are made per second, expressed in the unit
bits per second (bps).
DESCRIPTION/ORDERING INFORMATION
The SN65LBC174A-EP is a quadruple differential line driver with 3-state outputs, designed for TIA/EIA-485
(RS-485), TIA/EIA-422 (RS-422), and ISO 8482 applications.
This device is optimized for balanced multipoint bus transmission at signaling rates up to 30-million bits per
second (Mbps). The transmission media may be printed-circuit-board traces, backplanes, or cables. The ultimate
rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise
coupling to the environment.
Each driver features current limiting and thermal-shutdown circuitry, making it suitable for high-speed multipoint
applications in noisy environments. The device is designed using LinBiCMOS™ technology, facilitating low
power consumption and robustness.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN65LBC174A-EP
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER
www.ti.com
SLLS732–OCTOBER 2006–REVISED DECEMBER 2006
The two enable (EN) inputs provide pair-wise driver enabling, or can be externally tied together to provide
enable control of all four drivers with one signal. When disabled or powered off, the driver outputs present a high
impedance to the bus for reduced system loading.
The SN65LBC174A-EP is characterized for operation over the temperature range of –55°C to 125°C.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
–55°C to 125°C
20-pin SOIC – DW
SN65LBC174AMDWREP
65LBC174EP
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE(1)
(each driver)
OUTPUTS
INPUT
A
ENABLE
G
Y
L
Z
H
L
L
H
H
H
OPEN
L
H
H
L
H
L
OPEN
OPEN
OPEN
L
H
L
H
H
H
Z
OPEN
X
L
Z
(1) H = high level, L = low level, X = irrelevant,
Z = high impedance (off)
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
Y or Z Output
A or EN Input
V
CC
V
CC
16 V
16 V
20 V
100 kΩ
1 kΩ
Input
Output
16 V
16 V
17 V
9 V
2
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SN65LBC174A-EP
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER
www.ti.com
SLLS732–OCTOBER 2006–REVISED DECEMBER 2006
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.3
–10
–30
MAX UNIT
VCC Supply voltage range(2)
6
15
30
V
V
V
V
Voltage range at any bus (dc)
Voltage range at any bus (transient pulse through 100 Ω, see Figure 8)
VI
Input voltage range at any A or EN terminal
–0.5 VCC + 0.5
Y, Z, and GND
All pins
13
5
Human-Body Model(3)
Charged-Device Model(4)
Electrostatic discharge
kV
All pins
1
Tstg
Storage temperature range(5)
Continuous power dissipation
–65
150
°C
See Dissipation Rating Table
260 °C
Lead temperature 1,6 mm (1/16 in) from case for 10 s
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to GND.
(3) Tested in accordance with JEDEC standard 22, Test Method A114-A.
(4) Tested in accordance with JEDEC standard 22, Test Method C101.
(5) Long-term high-temperature storage and/or extended use at maximum recommended operating conditions may result in a reduction of
overall device life. See http://www.ti.com/ep_quality for additional information on enhanced plastic packaging.
DISSIPATION RATING TABLE
JEDEC BOARD
MODEL
T
A ≤ 25°C
DERATING FACTOR(1)
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 125°C
POWER RATING
PACKAGE
POWER RATING
Low K
High K
1483 mW
11.86 mW/°C
22 mW/°C
949 mW
297 mW
553 mW
20-pin DW
2753 mW
1762 mW
(1) This is the inverse of the junction-to-ambient thermal resistance when board mounted with no air flow.
3
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SN65LBC174A-EP
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER
www.ti.com
SLLS732–OCTOBER 2006–REVISED DECEMBER 2006
Recommended Operating Conditions
MIN
4.75
–7
NOM
MAX UNIT
VCC
Supply voltage
5
5.25
12
V
V
Voltage at any bus terminal
High-level input voltage
Low-level input voltage
Output current
Y, Z
VIH
VIL
A, EN
A, EN
2
VCC
0.8
60
V
0
V
–60
–55
mA
°C
TA
Operating free-air temperature
125
Electrical Characteristics
over recommended operating conditions
PARAMETER
TEST CONDITIONS
MIN TYP(1) MAX
UNIT
V
VIK
VO
Input clamp voltage
II = –18 mA
–1.5
0
–0.77
Open-circuit output voltage
Y or Z, No load
VCC
VCC
2.5
V
No load (open circuit)
3
Steady-state differential output
voltage magnitude(2)
|VOD(SS)
|
RL = 54 Ω, See Figure 1
With common-mode loading, See Figure 2
0.8
0.8
1.6
1.6
V
2.5
Change in steady-state differential output
voltage between logic states
∆VOD(SS)
See Figure 1
See Figure 3
See Figure 3
–0.1
2
0.1
2.8
V
V
Steady-state common-mode output
voltage
VOC(SS)
2.4
Change in steady-state common-mode
output voltage between logic states
∆VOC(SS)
–0.04
-–70
0.04
70
V
II
Input current
A, G, G
µA
VI = 0 V
IOS
Short-circuit output current
–200
200
mA
µA
VI = VCC
VTEST = –7 V to 12 V,
See Figure 7
IOZ
High-impedance-state output current
Output current with power off
EN at 0 V
–50
–10
50
10
IO(OFF)
VCC = 0 V
All drivers enabled
All drivers disabled
25
VI = 0 V or VCC
No load
,
ICC
Supply current
mA
1.5
(1) All typical values are at VCC = 5 V and 25°C.
(2) The minimum VOD may not fully comply with TIA/EIA-485-A at operating temperatures below 0°C. System designers should take the
possibility of lower output signal into account in determining the maximum signal transmission distance.
4
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SN65LBC174A-EP
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER
www.ti.com
SLLS732–OCTOBER 2006–REVISED DECEMBER 2006
Switching Characteristics
over recommended operating conditions
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
TA=25°C
4.0
4.0
4.0
4.0
3
8
11 ns
16 ns
11 ns
16 ns
11 ns
24 ns
11 ns
24 ns
tPLH Propagation delay time, low- to high-level output
TA= -55°C to 125°C
TA=25°C
8
tPHL Propagation delay time, high- to low-level output
TA= -55°C to 125°C
TA=25°C
7.5
7.5
tr
tf
Differential output voltage rise time
Differential output voltage fall time
TA= -55°C to 125°C
TA=25°C
3
RL = 54 Ω, CL = 50 pF,
See Figure 4
3
TA= -55°C to 125°C
3
0.6
0.6
2
tsk(p) Pulse skew |tPLH – tPHL
|
ns
tsk(o) Output skew(1)
tsk(pp) Part-to-part skew(2)
ns
ns
3
Propagation delay time, high impedance to
high-level output
tPZH
tPHZ
tPZL
tPLZ
25 ns
25 ns
30 ns
20 ns
See Figure 5
See Figure 6
Propagation delay time, high-level output to high
impedance
Propagation delay time, high impedance to
low-level output
Propagation delay time, low-level output to high
impedance
(1) Output skew (tsk(o)) is the magnitude of the time delay difference between the outputs of a single device with all of the inputs connected
together.
(2) Part-to-part skew (tsk(pp)) is the magnitude of the difference in propagation delay times between any specified terminals of two devices
when both devices operate with the same input signals, the same supply voltages, at the same temperature, and have identical
packages and test circuits.
5
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SN65LBC174A-EP
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER
www.ti.com
SLLS732–OCTOBER 2006–REVISED DECEMBER 2006
PARAMETER MEASUREMENT INFORMATION
I
OY
Y
Z
I
I
A
V
V
OD
54 Ω
I
V
OY
OZ
GND
V
I
OZ
Figure 1. Test Circuit, VOD Without Common-Mode Loading
375 Ω
Y
A
V
OD
V
TEST
= −7 V to 12 V
Input
60 Ω
375 Ω
Z
V
TEST
V
I
Figure 2. Test Circuit, VOD With Common-Mode Loading
27 Ω
Y
A
27 Ω
Z
V
OC
Signal
Generator
(B)
C
L
= 50 pF
50 Ω
(A)
A. PRR = 1 MHz, 50% duty cycle, tr < 6 ns, tf < 6 ns, ZO = 50 Ω
B. Includes probe and jig capacitance
Figure 3. VOC Test Circuit
6
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SN65LBC174A-EP
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER
www.ti.com
SLLS732–OCTOBER 2006–REVISED DECEMBER 2006
PARAMETER MEASUREMENT INFORMATION (continued)
Y
Z
A
(B)
V
OD
R
L
= 54 Ω
C = 50 pF
L
Signal
Generator
50 Ω
(A)
3 V
1.5 V
0 V
Input
t
t
PHL
PLH
≈ 1.5 V
90%
0 V
10%
Output
≈ −1.5 V
t
r
t
f
A. PRR = 1 MHz, 50% duty cycle, tr < 6 ns, tf < 6 ns, ZO = 50 Ω
B. Includes probe and jig capacitance
Figure 4. Output Switching Test Circuit and Waveforms
7
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SN65LBC174A-EP
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER
www.ti.com
SLLS732–OCTOBER 2006–REVISED DECEMBER 2006
PARAMETER MEASUREMENT INFORMATION (continued)
Y
Z
S1
A
Output
(B)
(C)
3 V or 0 V
C = 50 pF
L
R = 110 Ω
L
Input
EN
Signal
Generator
50 Ω
(A)
3 V
1.5 V
0 V
Input
t
PZH
0.5 V
V
OH
2.3 V
0 V
Output
t
PHZ
A. PRR = 1 MHz, 50% duty cycle, tr < 6 ns, tf < 6 ns, ZO = 50 Ω
B. Includes probe and jig capacitance
C. 3 V if testing Y output, 0 V if testing Z output
Figure 5. Enable Timing Test Circuit and Waveforms, tPZH and tPHZ
8
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SN65LBC174A-EP
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER
www.ti.com
SLLS732–OCTOBER 2006–REVISED DECEMBER 2006
PARAMETER MEASUREMENT INFORMATION (continued)
5 V
R
L
= 110 Ω
Y
Z
S1
A
Output
(C)
0 V or 3 V
(B)
C
L
= 50 pF
Input
EN
Signal
Generator
50 Ω
(A)
3 V
1.5 V
0 V
Input
t
PZL
t
PLZ
5 V
Output
2.3 V
V
OL
0.5 V
A. PRR = 1 MHz, 50% duty cycle, tr < 6 ns, tf < 6 ns, ZO = 50 Ω
B. Includes probe and jig capacitance
C. 3 V if testing Y output, 0 V if testing Z output
Figure 6. Enable Timing Test Circuit and Waveforms, tPZL and tPLZ
Y
I
O
V
I
Z
V
TEST
Voltage Source
= −7 V to 12 V
V
TEST
Slew Rate ≤1.2 V/µs
Figure 7. Test Circuit, Short-Circuit Output Current
9
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SN65LBC174A-EP
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER
www.ti.com
SLLS732–OCTOBER 2006–REVISED DECEMBER 2006
PARAMETER MEASUREMENT INFORMATION (continued)
Y
Z
V
TEST
100 Ω
0 V
15 µs
−V
TEST
Pulse Generator
15-µs Duration,
1% Duty Cycle
1.5 ms
Figure 8. Test Circuit Waveform, Transient Overvoltage Test
10
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SN65LBC174A-EP
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER
www.ti.com
SLLS732–OCTOBER 2006–REVISED DECEMBER 2006
TYPICAL CHARACTERISTICS
DIFFERENTIAL OUTPUT VOLTAGE
DIFFERENTIAL OUTPUT VOLTAGE
vs
vs
OUTPUT CURRENT
FREE-AIR TEMPERATURE
2.5
4
3.5
3
V
CC
= 5.25 V
2
V
CC
= 5 V
V
CC
= 5.25 V
2.5
2
1.5
V
CC
= 5 V
V
CC
= 4.75 V
1
0.5
0
1.5
V
= 4.75 V
CC
1
0.5
0
0
20
40
60
80
100
−60 −40 −20
0
20
40
60
80
100
I
O
− Output Current − mA
T − Free-Air Temperature − °C
A
Figure 9.
Figure 10.
PROPAGATION DELAY TIME
vs
SUPPLY CURRENT (FOUR CHANNELS)
vs
FREE-AIR TEMPERATURE
SIGNALING RATE
144
142
140
138
136
134
132
130
128
8.5
8
R = 54 Ω
C = 50 pF
L
(Each Channel)
L
V
CC
= 5.25 V
7.5
V
CC
= 4.75 V
7
6.5
6
5.5
5
−40
−20
0
20
40
60
80
1
10
100
T − Free-Air Temperature − °C
A
Signaling Rate − Mbps
Figure 11.
Figure 12.
11
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SN65LBC174A-EP
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER
www.ti.com
SLLS732–OCTOBER 2006–REVISED DECEMBER 2006
TYPICAL CHARACTERISTICS (continued)
DIFFERENTIAL OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
3
R
L
= 54 Ω
2.5
2
1.5
1
0.5
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5 6
V
CC
− Supply Voltage − V
Figure 13.
R
L
= 54 Ω
C = 50 pF
L
Figure 14. Eye Pattern, Pseudo-Random Data at 30 Mbps
12
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SN65LBC174A-EP
QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER
www.ti.com
SLLS732–OCTOBER 2006–REVISED DECEMBER 2006
APPLICATION INFORMATION
TMS320F243
DSP
SN65LBC174A-EP
SN65LBC175A-EP
TMS320F241
DSP
(Controller)
(Embedded
Application)
SPISIMO
SPISIMO
IOPA1
IOPA1
(Enable)
SPISTE
SPISTE
SPICLK
SPICLK
IOPA2
IOPA0
IOPA2
(Enable)
IOPA0
(Handshake
/Status)
SPISOMI
SPISOMI
Figure 15. Typical Application Circuit, DSP-to-DSP Link Via Serial Peripheral Interface
13
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PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
SN65LBC174AMDWREP
V62/07611-01XE
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
DW
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
DW
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN65LBC174A-EP :
Catalog: SN65LBC174A
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN65LBC174AMDWREP SOIC
DW
20
2000
330.0
24.4
10.8
13.1
2.65
12.0
24.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC DW 20
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 45.0
SN65LBC174AMDWREP
2000
Pack Materials-Page 2
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