SN65LVEL11D [TI]

3.3 V ECL 1:2 Fanout Buffer; 3.3 V ECL 1 : 2扇出缓冲器
SN65LVEL11D
型号: SN65LVEL11D
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

3.3 V ECL 1:2 Fanout Buffer
3.3 V ECL 1 : 2扇出缓冲器

时钟驱动器 逻辑集成电路 光电二极管
文件: 总12页 (文件大小:438K)
中文:  中文翻译
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SN65LVEL11  
www.ti.com ............................................................................................................................................................................................ SLLS927DECEMBER 2008  
3.3 V ECL 1:2 Fanout Buffer  
1
FEATURES  
DESCRIPTION  
1:2 ECL Fanout Buffer  
Operating Range  
The SN65LVEL11 is a fully differential 1:2 ECL fanout  
buffer. The device includes circuitry to maintain a  
known logic level when inputs are in open condition.  
The SN65LVEL11 is functionally equivalent to  
SN65EL11 with improved performance. The  
SN65LVEL11 is housed in an industry standard  
SOIC-8 package and is also available in the  
TSSOP-8 package option.  
PECL VCC = 3.0 V to 3.8 V With  
VEE = 0 V  
NECL: VCC = 0 V with VEE = –3.0  
to –3.8V  
5 ps Skew Between Outputs  
Support for Clock Frequencies > 2.0 GHz  
265 ps Typical Propagation Delay  
PINOUT ASSIGNMENT  
Deterministic Output Value for Open Input  
Conditions or When Inputs = VEE  
Q
V
CC  
1
2
8
7
0
0
Built-in Temperature Compensation  
Drop in Compatible to MC10LVEL11,  
MC100LVEL11  
Q
D
Built-In Input Pull Down Resistors  
Q
Q
D
V
3
4
6
5
1
APPLICATIONS  
Data and Clock Transmission Over Backplane  
1
EE  
Signaling Level Conversion  
Table 1. Pin Description  
PIN  
FUNCTION  
D, D  
PECL/ECL data inputs  
PECL/ECL outputs  
Positive supply  
Q0, Q0, Q1, Q1  
VCC  
VEE  
Negative supply  
ORDERING INFORMATION(1)  
PART NUMBER  
SN65LVEL11D  
PART MARKING  
PACKAGE  
LEAD FINISH  
NiPdAu  
SN65LVEL11  
SN65LVEL11  
SOIC  
SN65LVEL11DGK  
SOIC-TSSOP  
NiPdAu  
(1) Leaded device options not initially available. Contact TI sales representative for further details.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2008, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
SN65LVEL11  
SLLS927DECEMBER 2008............................................................................................................................................................................................ www.ti.com  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
ABSOLUTE MAXIMUM RATINGS(1)  
PARAMETER  
CONDITION  
VEE = 0 V  
VALUE  
UNIT  
Absolute PECL mode supply voltage, VCC  
Absolute NECL mode power supply, VEE  
PECL mode input voltage  
6
V
V
V
V
VCC = 0 V  
–6  
VEE = 0 V; VI VCC  
VCC = 0 V; VI VEE  
Continuous  
6
–6  
NECL mode input voltage  
50  
Output current  
mA  
Surge  
100  
Operating temperature range  
Storage temperature range  
–40 to 85  
–65 to 150  
°C  
°C  
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating  
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
POWER DISSIPATION RATINGS  
POWER RATING THERMAL RESISTANCE,  
DERATING FACTOR  
TA > 25°C  
POWER RATING  
TA = 85°C  
(mW)  
CIRCUIT BOARD  
MODEL  
JUNCTION TO AMBIENT  
PACKAGE  
TA < 25°C  
(mW)  
NO AIRFLOW  
(mW/°C)  
SOIC  
Low-K  
High-K  
Low-K  
High-K  
719  
840  
469  
527  
139  
119  
213  
189  
7
8
5
5
288  
336  
188  
211  
SOIC-TSSOP  
THERMAL CHARACTERISTICS  
PARAMETER  
Junction-to Board Thermal Resistance  
PACKAGE  
SOIC  
VALUE  
UNIT  
θJB  
79  
120  
98  
°C/W  
SOIC-TSSOP  
SOIC  
θJC  
Junction-to Case Thermal Resistance  
°C/W  
SOIC-TSSOP  
74  
KEY ATTRIBUTES  
CHARACTERISTICS  
VALUE  
Internal input pull down resistor  
Moisture sensitivity level  
75 kΩ  
Level 1  
Flammability rating (Oxygen Index: 28 to 34)  
ESD-HBM  
UL 94 V-0 at 0.125 in  
4 kV  
ESD-machine model  
200 V  
ESD-charge device model  
2 kV  
Meets or exceeds JEDEC Spec EIA/JESD78 latchup test  
2
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Copyright © 2008, Texas Instruments Incorporated  
Product Folder Link(s): SN65LVEL11  
SN65LVEL11  
www.ti.com ............................................................................................................................................................................................ SLLS927DECEMBER 2008  
LVPECL DC CHARACTERISTICS(1) (VCC = 3.3 V, VEE = 0.0 V(2)  
–40°C  
MIN TYP  
20  
25°C  
MIN TYP  
20  
85°C  
CHARACTERISTICS  
UNIT  
MAX  
25  
MAX  
25  
MIN TYP MAX  
ICC  
Power Supply Current  
21  
25  
2420  
1680  
2420  
1825  
mA  
mV  
mV  
mV  
mV  
V
(3)  
VOH  
VOL  
VIH  
VIL  
Output HIGH Voltage  
2215  
2420  
1680  
2420  
1825  
2215 2286  
1470 1584  
2135  
2420  
1680  
2420  
1825  
2215  
1470  
2135  
1490  
Output LOW Voltage(3)  
1470  
Input High Voltage (Single-Ended)  
Input LOW Voltage (Single-Ended)  
2135  
1490  
1490  
VIHCMR Input HIGH voltage common mode range  
(4)  
(Differential)  
Vpp < 500 mV  
1.2  
1.4  
3.1  
3.1  
1.1  
1.3  
3.1  
3.1  
1.1  
1.3  
3.1  
3.1  
Vpp > 500 mV  
IIH  
IIL  
Input HIGH Current  
Input LOW current  
150  
150  
150  
µA  
µA  
D
D
0.5  
0.5  
0.5  
–600  
–600  
–600  
(1) Device will meet the specifications after thermal balance has been established when mounted in a socket or printed circuit board with  
maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature  
range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied  
individually under normal operating conditions and not valid simultaneously.  
(2) Input and output parameters vary 1:1 with VCC. VEE can vary ±0.3 V  
(3) Outputs are terminated through a 50 resistor to VCC – 2.0 V.  
(4) VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the  
differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies  
between VPP min and 1 V.  
(2)  
LVPNECL DC CHARACTERISTICS(1) (VEE = –3.3 V; VCC = 0.0 V;)  
–40°C  
MIN TYP  
20  
25°C  
85°C  
TYP  
21  
CHARACTERISTICS  
UNIT  
MAX  
25  
MIN  
TYP  
MAX  
25  
MIN  
MAX  
25  
IEE  
Power supply current  
20  
–1013  
–1722  
mA  
mV  
mV  
mV  
mV  
V
(3)  
VOH  
VOL  
VIH  
Output HIGH voltage  
–1085  
–880  
–1620  
–880  
–1475  
–1085  
–1830  
–1165  
–1810  
–880  
–1620  
–880  
–1475  
–1085  
–1830  
–1165  
–1810  
–880  
–1620  
–880  
–1475  
Output LOW voltage(3)  
–1830  
–1165  
–1810  
Input high voltage (Single-Ended)  
Input LOW voltage (Single-Ended)  
Input HIGH voltage common mode range  
VIL  
VIHCMR  
(4)  
(Differential)  
Vpp < 500 mV  
–2.1  
–1.9  
–0.2  
–0.2  
150  
–2.2  
–2.0  
–0.2  
–0.2  
150  
–2.2  
–2.0  
–0.2  
–0.2  
150  
Vpp > 500 mV  
IIH  
IIL  
Input HIGH current  
Input LOW current  
µA  
µA  
D
D
0.5  
0.5  
0.5  
–600  
–600  
–600  
(1) Device will meet the specifications after thermal balance has been established when mounted in a socket or printed circuit board with  
maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating temperature  
range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied  
individually under normal operating conditions and not valid simultaneously.  
(2) Input and output parameters vary 1:1 with VCC. VEE can vary ±0.3 V.  
(3) Outputs are terminated through a 50 resistor to VCC – 2.0 V.  
(4) VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the  
differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies  
between VPP min and 1 V.  
Copyright © 2008, Texas Instruments Incorporated  
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3
Product Folder Link(s): SN65LVEL11  
SN65LVEL11  
SLLS927DECEMBER 2008............................................................................................................................................................................................ www.ti.com  
AC CHARACTERISTICS (1)(VCC = 3.3 V; VEE = 0.0 V or VCC = 0.0 V; VEE = –3.3 V)(2)  
–40°C  
TYP MAX  
25°C  
MIN TYP MAX  
2.7  
85°C  
TYP MAX  
CHARACTERISTIC  
UNIT  
MIN  
MIN  
fMAX  
Max switching frequency(3) See Figure 6  
2.9  
2.4  
GHz  
ps  
tPLH/tPHL Propagation delay to output  
Within device skew(4)  
235  
350  
18  
235  
350  
18  
235  
350  
18  
10  
10  
5
10  
10  
5
10  
10  
5
ps  
tSKEW  
Device to device skew(5)  
Duty cycle skew(6)  
25  
25  
25  
ps  
15  
15  
15  
ps  
tJITTER  
VPP  
Random clock jitter (RMS)  
Input swing(7)  
0.2  
0.2  
0.2  
ps  
200  
150  
1000  
300  
200  
150  
1000  
300  
200  
150  
1000  
300  
mV  
ps  
tr/tf  
Output rise/fall times Q (20%–80%)  
(1) Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board  
with maintained transverse airflow greater than 500 lfpm. Electrical parameters are assured only over the declared operating  
temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are  
applied individually under normal operating conditions and not valid simultaneously.  
(2) VEE can vary ±0.3 V  
(3) Maximum switching frequency measured at output amplitude of 300 mVpp.  
(4) Within-device skew is defined as identical transitions on similar paths through a device.  
(5) Device-Device Skew is defined as identical transitions at identical Vcc levels.  
(6) Duty cycle skew is the difference between a tPLH and tPHL propagation delay through a device.  
(7) VPP(min) is the minimum input swing for which AC parameters are assured.  
Typical Termination for Output Driver  
Z
O
= 50 W  
P
P
Driver  
Receiver  
N
N
Z
O
= 50 W  
50 W  
50 W  
V
TT  
= V  
V
- 2 V  
CC  
TT  
Figure 1. Termination for Output Driver  
D
D
Q
Q
t
t
PLH  
PHL  
Figure 2. Propagation Delay  
4
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Copyright © 2008, Texas Instruments Incorporated  
Product Folder Link(s): SN65LVEL11  
SN65LVEL11  
www.ti.com ............................................................................................................................................................................................ SLLS927DECEMBER 2008  
D
V
V
PP(min)  
PP(max)  
D
Figure 3. Input Voltage Swing  
80%  
20%  
t
t
f
r
Figure 4. Output Rise and Fall Times  
D
D
Q
Q
0
0
t
t
PLH0  
PHL0  
Q
1
Q
1
t
t
PHL1  
PLH1  
Device Skew =  
- t  
Higher [(t  
), (t - t )]  
PLH1 PLH0  
PHL1 PHL0  
Figure 5. Device Skew  
Copyright © 2008, Texas Instruments Incorporated  
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5
Product Folder Link(s): SN65LVEL11  
SN65LVEL11  
SLLS927DECEMBER 2008............................................................................................................................................................................................ www.ti.com  
1000  
V
V
= 3.3 V,  
= 0 V  
CC  
EE  
900  
800  
700  
600  
T
= -40°C  
500  
400  
300  
200  
100  
0
A
T
= 25°C  
A
T
= 85°C  
A
0
500 1000 1500 2000 2500 3000 3500 4000 4500  
f - Frequency - MHz  
Figure 6. Output Amplitude vs Frequency  
6
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Copyright © 2008, Texas Instruments Incorporated  
Product Folder Link(s): SN65LVEL11  
PACKAGE OPTION ADDENDUM  
www.ti.com  
15-Dec-2008  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SN65LVEL11D  
ACTIVE  
SOIC  
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN65LVEL11DGK  
SN65LVEL11DGKR  
SN65LVEL11DR  
PREVIEW  
PREVIEW  
ACTIVE  
MSOP  
MSOP  
SOIC  
DGK  
DGK  
D
8
8
8
80  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
2500  
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Dec-2008  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
SN65LVEL11DR  
SOIC  
D
8
2500  
330.0  
12.4  
6.4  
5.2  
2.1  
8.0  
12.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Dec-2008  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SOIC  
SPQ  
Length (mm) Width (mm) Height (mm)  
346.0 346.0 29.0  
SN65LVEL11DR  
D
8
2500  
Pack Materials-Page 2  
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