SN7407D [TI]

HEX BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS; HEX缓冲器/带集电极开路高压输出驱动程序


型号：	SN7407D
厂家：	TEXAS INSTRUMENTS
描述：	HEX BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS HEX缓冲器/带集电极开路高压输出驱动程序输出元件高压驱动
文件：	总13页 (文件大小：474K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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SDLS032G − DECEMBER 1983 − REVISED MAY 2004

SN5407, SN5417 . . . J OR W PACKAGE

SN7407, SN7417 . . . D, N, OR NS PACKAGE

(TOP VIEW)

Convert TTL Voltage Levels to MOS Levels

High Sink-Current Capability

Input Clamping Diodes Simplify System

Design

Open-Collector Driver for Indicator Lamps

and Relays

Inputs Fully Compatible With Most TTL

Circuits

GND

description/ordering information

These TTL hex buffers/drivers feature

high-voltage open-collector outputs for interfacing

with high-level circuits (such as MOS) or for

driving high-current loads (such as lamps or

relays) and also are characterized for use as

buffers for driving TTL inputs. The SN5407 and

SN7407 have minimum breakdown voltages of

30 V, and the SN5417 and SN7417 have

minimum breakdown voltages of 15 V. The

maximum sink current is 30 mA for the SN5407

and SN5417 and 40 mA for the SN7407 and

SN7417.

SN5407 . . . FK PACKAGE

(TOP VIEW)

1 20 19

15 NC

9 10 11 12 13

These devices perform the Boolean function

Y = A in positive logic.

NC − No internal connection

ORDERING INFORMATION

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

†

PACKAGE

Tube

SN7407D

7407

7417

Tape and reel

Tube

SN7407DR

SN7417D

SOIC − D

Tape and reel

SN7417DR

SN7407N

0°C to 70°C

SN7407N

SN7417N

SN7407

PDIP − N

Tube

SN7417N

SN7407NSR

SN7417NSR

SNJ5407J

SNJ5417J

SNJ5407W

SNJ5407FK

SOP − NS

Tape and reel

SN7417

SNJ5407J

SNJ5417J

SNJ5407W

SNJ5407FK

CDIP − J

CFP − W

Tube

−55°C to 125°C

LCCC − FK Tube

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB

design guidelines are available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SDLS032G − DECEMBER 1983 − REVISED MAY 2004

description/ordering information (continued)

These circuits are completely compatible with most TTL families. Inputs are diode clamped to minimize

transmission-line effects, which simplifies design. Typical power dissipation is 145 mW, and average

propagation delay time is 14 ns.

logic diagram, each buffer/driver (positive logic)

schematic

6 kΩ

3.4 kΩ

1.6 kΩ

Input A

Output Y

100 Ω

1 kΩ

GND

Resistor values shown are nominal.

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V

Input voltage, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V

Output voltage, V (see Notes 1 and 2): SN5407, SN7407 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V

SN5417, SN7417 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V

Package thermal impedance, θ (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W

N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W

NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

Storage temperature range, T

stg

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values are with respect to GND.

2. This is the maximum voltage that should be applied to any output when it is in the off state.

3. The package thermal impedance is calculated in accordance with JESD 51-7.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SDLS032G − DECEMBER 1983 − REVISED MAY 2004

recommended operating conditions (see Note 4)

MIN NOM

MAX

5.5

UNIT

SN5407, SN5417

SN7407, SN7417

4.5

4.75

Supply voltage

5.25

High-level input voltage

Low-level input voltage

0.8

SN5407, SN7407

SN5417, SN7417

SN5407, SN5417

SN7407, SN7417

SN5407, SN5417

SN7407, SN7417

High-level output voltage

Low-level output current

Operating free-air temperature

°C

−55

125

NOTE 4: All unused inputs of the device must be held at V

or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

‡

†

PARAMETER

MIN TYP

MAX

−1.5

0.25

0.4

0.7

UNIT

TEST CONDITIONS

= MIN,

I = −12 mA

= 30 V (SN5407, SN7407)

= 15 V (SN5417, SN7417)

= 2 V

= 16 mA

= 30 mA (SN5407, SN5417)

= 40 mA (SN7407, SN7417)

= MIN,

= 0.8 V

= MAX,

= MAX

V = 5.5 V

µA

= 2.4 V

= 0.4 V

−1.6

CCH

CCL

†

‡

For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

All typical values are at V = 5 V, T = 25°C.

switching characteristics, V

= 5 V, T = 25°C (see Figure 1)

FROM

PARAMETER

(OUTPUT)

TEST CONDITIONS

MIN

TYP

MAX

UNIT

(INPUT)

PLH

PHL

PLH

PHL

= 110 Ω,

= 150 Ω,

= 15 pF

= 50 pF

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SDLS032G − DECEMBER 1983 − REVISED MAY 2004

PARAMETER MEASUREMENT INFORMATION

From Output

Under Test

Test Point

(see Note A)

LOAD CIRCUIT

3 V

0 V

1.5 V

Input

PHL

PLH

PHL

In-Phase

Output

High-Level

Pulse

1.5 V

PLH

Low-Level

Pulse

Out-of-Phase

Output

1.5 V

VOLTAGE WAVEFORMS

PULSE WIDTHS

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

NOTES: A.

B. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily.

C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 7 ns, t ≤ 7 ns.

C includes probe and jig capacitance.

D. The outputs are measured one at a time, with one input transition per measurement.

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

28-Feb-2005

PACKAGING INFORMATION

Orderable Device

Status ⁽¹⁾

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

CDIP

CFP

Drawing

JM38510/00803BCA

JM38510/00803BDA

SN5407J

ACTIVE

None

Call TI

Level-NC-NC-NC

CDIP

SOIC

SN5417J

SN7407D

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

SN7407DR

ACTIVE

SOIC

2500

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

SN7407J

SN7407N

OBSOLETE

ACTIVE

CDIP

PDIP

None

Call TI

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

SN7407N3

OBSOLETE

ACTIVE

PDIP

None

Call TI

SN7407NSR

2000

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

SN7417D

SN7417DR

SN7417N

ACTIVE

SOIC

PDIP

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

2500

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

SN7417N3

OBSOLETE

ACTIVE

PDIP

None

Call TI

SN7417NSR

2000

Pb-Free

(RoHS)

CU NIPDAU Level-2-260C-1 YEAR/

Level-1-235C-UNLIM

SNJ5407FK

SNJ5407J

SNJ5407W

SNJ5417J

ACTIVE

LCCC

CDIP

CFP

None

Call TI

Level-NC-NC-NC

CDIP

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional

product content details.

None: Not yet available Lead (Pb-Free).

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,

including bromine (Br) or antimony (Sb) above 0.1% of total product weight.

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

28-Feb-2005

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 2

MECHANICAL DATA

MLCC006B – OCTOBER 1996

FK (S-CQCC-N**)

LEADLESS CERAMIC CHIP CARRIER

28 TERMINAL SHOWN

NO. OF

TERMINALS

18 17 16 15 14 13 12

MIN

MAX

MIN

MAX

0.342

(8,69)

0.358

(9,09)

0.307

(7,80)

0.358

(9,09)

0.442

(11,23)

0.458

(11,63)

0.406

(10,31)

0.458

(11,63)

B SQ

0.640

(16,26)

0.660

(16,76)

0.495

(12,58)

0.560

(14,22)

A SQ

0.739

(18,78)

0.761

(19,32)

0.495

(12,58)

0.560

(14,22)

0.938

(23,83)

0.962

(24,43)

0.850

(21,6)

0.858

(21,8)

1.141

(28,99)

1.165

(29,59)

1.047

(26,6)

1.063

(27,0)

26 27 28

0.080 (2,03)

0.064 (1,63)

0.020 (0,51)

0.010 (0,25)

0.020 (0,51)

0.010 (0,25)

0.055 (1,40)

0.045 (1,14)

0.035 (0,89)

0.045 (1,14)

0.035 (0,89)

0.028 (0,71)

0.022 (0,54)

0.050 (1,27)

4040140/D 10/96

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. This package can be hermetically sealed with a metal lid.

D. The terminals are gold plated.

E. Falls within JEDEC MS-004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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Mailing Address:

Texas Instruments

Post Office Box 655303 Dallas, Texas 75265

SN7407D [TI]

相关型号：

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